[llvm] [AMDGPU][GlobalIsel] Introduce isRegType to check for legal types, instead of checking bit width. (PR #68189)

[via llvm-commits]

github-actions[bot] wrote:


<!--LLVM CODE FORMAT COMMENT: {clang-format}-->

:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

<details>
<summary>
You can test this locally with the following command:
</summary>

``````````bash
git-clang-format --diff 503bc5f66111f7e4fc79972bb9bfec8bb5606bab a7077d7eff7bfc7b952aa9a1c67765983044d797 -- llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
``````````

</details>

<details>
<summary>
View the diff from clang-format here.
</summary>

``````````diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index e770ef92d0c0..c489ac850232 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -338,7 +338,7 @@ static bool typeInSet(LLT Ty, std::initializer_list<LLT> TypesInit) {
   return llvm::is_contained(Types, Ty);
 }
 
-static LLT GetAddrSpacePtr(unsigned AS, const GCNTargetMachine &TM){
+static LLT GetAddrSpacePtr(unsigned AS, const GCNTargetMachine &TM) {
   return LLT::pointer(AS, TM.getPointerSizeInBits(AS));
 }
 
@@ -363,8 +363,9 @@ static bool isRegType(LLT Ty, const GCNTargetMachine &TM) {
          typeInSet(Ty, AllPtrTypes) || Ty.isPointer();
 }
 
-static LegalityPredicate isRegType(unsigned TypeIdx, const GCNTargetMachine &TM){
-  return [TypeIdx, &TM] (const LegalityQuery &Query) {
+static LegalityPredicate isRegType(unsigned TypeIdx,
+                                   const GCNTargetMachine &TM) {
+  return [TypeIdx, &TM](const LegalityQuery &Query) {
     return isRegType(Query.Types[TypeIdx], TM);
   };
 }
@@ -669,7 +670,8 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST_,
 
   const LLT GlobalPtr = GetAddrSpacePtr(AMDGPUAS::GLOBAL_ADDRESS, TM);
   const LLT ConstantPtr = GetAddrSpacePtr(AMDGPUAS::CONSTANT_ADDRESS, TM);
-  const LLT Constant32Ptr = GetAddrSpacePtr(AMDGPUAS::CONSTANT_ADDRESS_32BIT, TM);
+  const LLT Constant32Ptr =
+      GetAddrSpacePtr(AMDGPUAS::CONSTANT_ADDRESS_32BIT, TM);
   const LLT LocalPtr = GetAddrSpacePtr(AMDGPUAS::LOCAL_ADDRESS, TM);
   const LLT RegionPtr = GetAddrSpacePtr(AMDGPUAS::REGION_ADDRESS, TM);
   const LLT FlatPtr = GetAddrSpacePtr(AMDGPUAS::FLAT_ADDRESS, TM);
@@ -857,10 +859,9 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST_,
       .scalarize(0);
 
   getActionDefinitionsBuilder(G_BITCAST)
-    // Don't worry about the size constraint.
-    .legalIf(all(isRegType(0, TM), isRegType(1, TM)))
-    .lower();
-
+      // Don't worry about the size constraint.
+      .legalIf(all(isRegType(0, TM), isRegType(1, TM)))
+      .lower();
 
   getActionDefinitionsBuilder(G_CONSTANT)
     .legalFor({S1, S32, S64, S16, GlobalPtr,

``````````

</details>


https://github.com/llvm/llvm-project/pull/68189