[llvm] da9f908 - [RISCV][GlobalISel] Legalize G_FRAME_INDEX (#67746)

[via llvm-commits]

Author: Nitin John Raj
Date: 2023-10-04T13:27:23-07:00
New Revision: da9f9082ea5e0ca511a8be05cce3f41b75d944be

URL: https://github.com/llvm/llvm-project/commit/da9f9082ea5e0ca511a8be05cce3f41b75d944be
DIFF: https://github.com/llvm/llvm-project/commit/da9f9082ea5e0ca511a8be05cce3f41b75d944be.diff

LOG: [RISCV][GlobalISel] Legalize G_FRAME_INDEX (#67746)

G_FRAME_INDEX is legal for pointers.

Added: 
    llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-frame-index.mir
    llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-frame-index.mir

Modified: 
    llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
index f12e868e74264f6..4479bccfd45e396 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
@@ -169,6 +169,8 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) {
 
   getActionDefinitionsBuilder(G_ABS).lower();
 
+  getActionDefinitionsBuilder(G_FRAME_INDEX).legalFor({p0});
+
   getLegacyLegalizerInfo().computeTables();
 }
 

diff  --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-frame-index.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-frame-index.mir
new file mode 100644
index 000000000000000..1e1879ac21b9082
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-frame-index.mir
@@ -0,0 +1,29 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
+# RUN: | FileCheck %s
+--- |
+
+  define ptr @alloca32() {
+  entry:
+    %ptr0 = alloca i32, align 4
+    ret ptr %ptr0
+  }
+
+...
+---
+name:            alloca32
+stack:
+  - { id: 0, name: ptr0, type: default, offset: 0, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+body:             |
+  bb.1.entry:
+    ; CHECK-LABEL: name: alloca32
+    ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.ptr0
+    ; CHECK-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
+    ; CHECK-NEXT: PseudoRET implicit $x10
+    %0:_(p0) = G_FRAME_INDEX %stack.0.ptr0
+    $x10 = COPY %0(p0)
+    PseudoRET implicit $x10
+
+...

diff  --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-frame-index.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-frame-index.mir
new file mode 100644
index 000000000000000..6d083d8bde3cfce
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-frame-index.mir
@@ -0,0 +1,29 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
+# RUN: | FileCheck %s
+--- |
+
+  define ptr @alloca64() {
+  entry:
+    %ptr0 = alloca i64, align 4
+    ret ptr %ptr0
+  }
+
+...
+---
+name:            alloca64
+stack:
+  - { id: 0, name: ptr0, type: default, offset: 0, size: 4, alignment: 4,
+      stack-id: default, callee-saved-register: '', callee-saved-restored: true,
+      debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
+body:             |
+  bb.1.entry:
+    ; CHECK-LABEL: name: alloca64
+    ; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.ptr0
+    ; CHECK-NEXT: $x10 = COPY [[FRAME_INDEX]](p0)
+    ; CHECK-NEXT: PseudoRET implicit $x10
+    %0:_(p0) = G_FRAME_INDEX %stack.0.ptr0
+    $x10 = COPY %0(p0)
+    PseudoRET implicit $x10
+
+...