The Week Of Monday 2 February 2026 Archives by date

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Starting: Mon Feb 2 00:00:37 PST 2026
Ending: Sun Feb 8 23:58:42 PST 2026
Messages: 6598

• [llvm] [PowerPC] Fix miscompilation when using 32-bit ucmp on 64-bit PowerPC (PR #178979)   Matt Arsenault via llvm-commits
• [llvm] b4797d4 - [PowerPC] Fix miscompilation when using 32-bit ucmp on 64-bit PowerPC (#178979)   via llvm-commits
• [llvm] [PowerPC] Fix miscompilation when using 32-bit ucmp on 64-bit PowerPC (PR #178979)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] Fix miscompilation when using 32-bit ucmp on 64-bit PowerPC (PR #178979)   Matt Arsenault via llvm-commits
• [lld] [ELF] Support DW_EH_PE_sdata8 encoding in .eh_frame_hdr (PR #179089)   Fangrui Song via llvm-commits
• [lld] [ELF] Support DW_EH_PE_sdata8 encoding in .eh_frame_hdr (PR #179089)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] Fix miscompilation when using 32-bit ucmp on 64-bit PowerPC (PR #178979)   via llvm-commits
• [llvm] [PowerPC] Fix miscompilation when using 32-bit ucmp on 64-bit PowerPC (PR #178979)   Matt Arsenault via llvm-commits
• [llvm] [PowerPC] Fix miscompilation when using 32-bit ucmp on 64-bit PowerPC (PR #178979)   Matt Arsenault via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] - Fix the simplification of GEP index when its operand is an XOR constant. (PR #175724)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Always set flags for overflowing ops etc via VPIRFlags. (PR #179138)   Luke Lau via llvm-commits
• [llvm] `dwarf2yaml.cpp` optimizations (PR #179048)   James Henderson via llvm-commits
• [llvm] `dwarf2yaml.cpp` optimizations (PR #179048)   James Henderson via llvm-commits
• [llvm] `dwarf2yaml.cpp` optimizations (PR #179048)   James Henderson via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   via llvm-commits
• [llvm] a667526 - [MachineFunctionPass] Preserve more IR analyses (#178871)   via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   via llvm-commits
• [llvm] [MachineFunctionPass] Preserve more IR analyses (PR #178871)   Nikita Popov via llvm-commits
• [llvm] 8d0830e - [LoopCacheAnalysis] Remove tryDelinearizeFixedSize (NFCI) (#177552)   via llvm-commits
• [llvm] [LoopCacheAnalysis] Remove tryDelinearizeFixedSize (NFCI) (PR #177552)   Ryotaro Kasuga via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   via llvm-commits
• [llvm] [mlir] [mlir] TileUsingInterface bugfix for dominance error (PR #178190)   via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   via llvm-commits
• [llvm] [VPlan] Split out EVL exit cond transform from canonicalizeEVLLoops. NFC (PR #178181)   LLVM Continuous Integration via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   via llvm-commits
• [llvm] [PowerPC] Fix miscompilation when using 32-bit ucmp on 64-bit PowerPC (PR #178979)   via llvm-commits
• [llvm] [lit] Fix not builtin to treat signal deaths as crashes (PR #179171)   via llvm-commits
• [llvm] [lit] Fix not builtin to treat signal deaths as crashes (PR #179171)   via llvm-commits
• [llvm] AMDGPU: Use SimplifyQuery in AMDGPUCodeGenPrepare (PR #179133)   Stanislav Mekhanoshin via llvm-commits
• [llvm] 80662c1 - AMDGPU: Use SimplifyQuery in AMDGPUCodeGenPrepare (#179133)   via llvm-commits
• [llvm] AMDGPU: Use SimplifyQuery in AMDGPUCodeGenPrepare (PR #179133)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Fix incorrect fold of undef for llvm.amdgcn.trig.preop (PR #179025)   Matt Arsenault via llvm-commits
• [llvm] [LLVM][Intrinsics] Allow IIT fixed encoding table to be 32-bit (PR #178531)   Nikita Popov via llvm-commits
• [llvm] [LLVM][Intrinsics] Allow IIT fixed encoding table to be 32-bit (PR #178531)   Nikita Popov via llvm-commits
• [llvm] [LLVM][Intrinsics] Allow IIT fixed encoding table to be 32-bit (PR #178531)   Nikita Popov via llvm-commits
• [llvm] [DAGCombiner] Fix exact power-of-two signed division for large integers (PR #177340)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo]: Fixing maxoffset calculation in buildSpillLoadStore (PR #179182)   Abhinav Garg via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo]: Fixing maxoffset calculation in buildSpillLoadStore (PR #179182)   via llvm-commits
• [llvm] [VPlan] Support masked VPInsts, use for predication (NFC) (PR #142285)   Luke Lau via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] WavePrefixSum intrinsic support (PR #167946)   via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #174731)   James Henderson via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #174731)   James Henderson via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #174731)   James Henderson via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #174731)   James Henderson via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   via llvm-commits
• [llvm] wasm: recognize `any_true` and `all_true` (PR #155885)   Matt Arsenault via llvm-commits
• [llvm] wasm: recognize `any_true` and `all_true` (PR #155885)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use SimplifyQuery in AMDGPUCodeGenPrepare (PR #179133)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo]: Fixing maxoffset calculation in buildSpillLoadStore (PR #179182)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo]: Fixing maxoffset calculation in buildSpillLoadStore (PR #179182)   Matt Arsenault via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #174731)   Ruoyu Qiu via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FSINCOS (PR #179053)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FSINCOS (PR #179053)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FSINCOS (PR #179053)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary select when the conditions are ICmps with EQ (PR #179183)   Gábor Spaits via llvm-commits
• [llvm] [DAG] visitVECTOR_SHUFFLE - ensure correct resno when folding shuffle(bop(shuffle(x,y),shuffle(z,w)) (PR #179124)   Simon Pilgrim via llvm-commits
• [flang] [llvm] [flang][openmp] Fix GPU byref reduction descriptor initialization (PR #178934)   Kareem Ergawy via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary select when the conditions are ICmps with EQ (PR #179183)   via llvm-commits
• [llvm] [DAG] visitVECTOR_SHUFFLE - ensure correct resno when folding shuffle(bop(shuffle(x,y),shuffle(z,w)) (PR #179124)   Simon Pilgrim via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary select when the conditions are ICmps with EQ (PR #179183)   Gábor Spaits via llvm-commits
• [llvm] [VPlan] Support masked VPInsts, use for predication (NFC) (PR #142285)   Luke Lau via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary select when the conditions are ICmps with EQ (PR #179183)   Gábor Spaits via llvm-commits
• [llvm] [WebAssembly] Combine shuffle and signed extend to extend_high (PR #179166)   Sam Parker via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Gábor Spaits via llvm-commits
• [llvm] [NewPM] Port x86-wineh-unwindv2 (PR #179172)   Matt Arsenault via llvm-commits
• [llvm] [X86] checkSignTestSetCCCombine - handle SIGN_EXTEND_INREG/SHL patterns inside CMP(X,0) (PR #178710)   Simon Pilgrim via llvm-commits
• [llvm] [X86] checkSignTestSetCCCombine - handle SIGN_EXTEND_INREG/SHL patterns inside CMP(X,0) (PR #178710)   Simon Pilgrim via llvm-commits
• [llvm] [X86] checkSignTestSetCCCombine - handle SIGN_EXTEND_INREG/SHL patterns inside CMP(X,0) (PR #178710)   Simon Pilgrim via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #174731)   Ruoyu Qiu via llvm-commits
• [llvm] [X86AsmBackend] Check fixup value overflow (PR #176827)   Alexander Kornienko via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_unstructured_loop_controls extension (PR #178799)   Manuel Carrasco via llvm-commits
• [llvm] [DAGCombiner] Fix exact power-of-two signed division for large integers (PR #177340)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][GlobalISel] Expose `CallLowering::buildCopyFromRegs` and `CallLowering::buildCopyToRegs` (PR #179185)   Demetrius Kanios via llvm-commits
• [llvm] [NFC][GlobalISel] Expose `CallLowering::buildCopyFromRegs` and `CallLowering::buildCopyToRegs` (PR #179185)   via llvm-commits
• [llvm] [NFC][GlobalISel] Expose `CallLowering::buildCopyFromRegs` and `CallLowering::buildCopyToRegs` (PR #179185)   Demetrius Kanios via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] 0321f3e - [AArch64][GlobalISel] Do no skip zext in getTestBitReg. (#177991)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Do no skip zext in getTestBitReg. (PR #177991)   David Green via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Pierre van Houtryve via llvm-commits
• [llvm] [PowerPC] Require PPC32 for 32-bit addc/adde/subc/sube (PR #179186)   Nikita Popov via llvm-commits
• [llvm] [PowerPC] Require PPC32 for 32-bit addc/adde/subc/sube (PR #179186)   via llvm-commits
• [llvm] [PowerPC] Fix miscompilation when using 32-bit ucmp on 64-bit PowerPC (PR #178979)   Nikita Popov via llvm-commits
• [llvm] [NFC][GlobalISel] Expose `CallLowering::buildCopyFromRegs` and `CallLowering::buildCopyToRegs` (PR #179185)   Matt Arsenault via llvm-commits
• [llvm] [NFC][GlobalISel] Expose `CallLowering::buildCopyFromRegs` and `CallLowering::buildCopyToRegs` (PR #179185)   Matt Arsenault via llvm-commits
• [llvm] a372152 - [DAG] visitVECTOR_SHUFFLE - ensure correct resno when folding shuffle(bop(shuffle(x,y),shuffle(z,w)) (#179124)   via llvm-commits
• [llvm] [DAG] visitVECTOR_SHUFFLE - ensure correct resno when folding shuffle(bop(shuffle(x,y),shuffle(z,w)) (PR #179124)   Simon Pilgrim via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Always set flags for overflowing ops etc via VPIRFlags. (PR #179138)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Always set flags for overflowing ops etc via VPIRFlags. (PR #179138)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo]: Fixing maxoffset calculation in buildSpillLoadStore (PR #179182)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo]: Fixing maxoffset calculation in buildSpillLoadStore (PR #179182)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo]: Fixing maxoffset calculation in buildSpillLoadStore (PR #179182)   Christudasan Devadasan via llvm-commits
• [llvm] [LLVM][Intrinsics] Allow IIT fixed encoding table to be 32-bit (PR #178531)   Durgadoss R via llvm-commits
• [llvm] [LLVM][Intrinsics] Allow IIT fixed encoding table to be 32-bit (PR #178531)   Durgadoss R via llvm-commits
• [llvm] [GlobalISel] Add SVE support for alloca (PR #178976)   David Green via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] 3377756 - [X86] checkSignTestSetCCCombine - handle SIGN_EXTEND_INREG/SHL patterns inside CMP(X,0) (#178710)   via llvm-commits
• [llvm] [X86] checkSignTestSetCCCombine - handle SIGN_EXTEND_INREG/SHL patterns inside CMP(X,0) (PR #178710)   Simon Pilgrim via llvm-commits
• [llvm] 23f9e42 - [AArch64] Support SHUFFLE of ANY_EXTEND in performBuildShuffleExtendCombine (#178408)   via llvm-commits
• [llvm] [AArch64] Support SHUFFLE of ANY_EXTEND in performBuildShuffleExtendCombine (PR #178408)   Hari Limaye via llvm-commits
• [llvm] [CoroCleanup] Noop coroutine elision for load-and-call pattern (PR #179154)   via llvm-commits
• [llvm] [CodeGen] Check physical def kill flag in MachineInstr::isDead (PR #168684)   Luke Lau via llvm-commits
• [llvm] [CodeGen] Check physical def kill flag in MachineInstr::isDead (PR #168684)   Luke Lau via llvm-commits
• [llvm] [NewPM] Port x86-wineh-unwindv2 (PR #179172)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Add scheduling DAG mutation for hazard latencies (PR #170075)   Carl Ritson via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   via llvm-commits
• [clang] [llvm] [Clang][CodeGen][Coroutines] Make coroutine startup exception-safe (CWG2935) Part1 (PR #179189)   Yexuan Xiao via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   via llvm-commits
• [clang] [llvm] [Clang][CodeGen][Coroutines] Make coroutine startup exception-safe (CWG2935) Part1 (PR #179189)   via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   Chandana Mudda via llvm-commits
• [llvm] [VPlan] Improve code around ArrayRef construction (NFC) (PR #179191)   Ramkumar Ramachandra via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   via llvm-commits
• [llvm] [VPlan] Improve code around ArrayRef construction (NFC) (PR #179191)   via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   via llvm-commits
• [llvm] [SPIRV] Split async copy tests and fix invalid tests (PR #178718)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Split async copy tests and fix invalid tests (PR #178718)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Split async copy tests and fix invalid tests (PR #178718)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   Simon Pilgrim via llvm-commits
• [libc] [libcxx] [llvm] [libcxx][libc] Hand in Hand PoC with from_chars (PR #91651)   Nikolas Klauser via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Move eventCounter() function (PR #178949)   Jay Foad via llvm-commits
• [llvm] [DAG] TargetLowering::expandCLMUL - avoid ISD::MUL if target hasBitTest (PR #177566)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Fix cttz.elts codegen for fixed-length vectors (PR #178902)   David Sherwood via llvm-commits
• [llvm] Fixes #172400 crashes when converting long double to __bf16 on AArch64 (PR #179044)   David Green via llvm-commits
• [llvm] [WebAssembly] Combine shuffle and signed extend to extend_high (PR #179166)   via llvm-commits
• [llvm] [AArch64] Fix cttz.elts codegen for fixed-length vectors (PR #178902)   David Sherwood via llvm-commits
• [llvm] Fixes #172400 crashes when converting long double to __bf16 on AArch64 (PR #179044)   via llvm-commits
• [clang] [llvm] [X86][APX] Disable PP2/PPX generation on Windows (PR #178122)   Simon Pilgrim via llvm-commits
• [llvm] [CoroCleanup] Noop coroutine elision for load-and-call pattern (PR #179154)   via llvm-commits
• [llvm] [AArch64][SME] Add missing ZT0 transition (PR #179193)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] (abs (add nsw a, -b)) -> (abds a, b) (PR #175801)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] (abs (add nsw a, -b)) -> (abds a, b) (PR #175801)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] (abs (add nsw a, -b)) -> (abds a, b) (PR #175801)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] (abs (add nsw a, -b)) -> (abds a, b) (PR #175801)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][SME] Add missing ZT0 transition (PR #179193)   via llvm-commits
• [clang] [llvm] [Clang][CodeGen][Coroutines] Make coroutine startup exception-safe (CWG2935) Part1 (PR #179189)   via llvm-commits
• [clang] [llvm] [Clang][CodeGen][Coroutines] Make coroutine startup exception-safe (CWG2935) Part1 (PR #179189)   via llvm-commits
• [llvm] [SelectionDAG][NFC] Rename isConstantSequence to isArithmeticSequence (PR #179108)   Jay Foad via llvm-commits
• [llvm] [RegisterPressure] Remove dead defs correctly (PR #156576)   Simon Pilgrim via llvm-commits
• [llvm] 2f3935b - [X86][APX] Disable PP2/PPX generation on Windows (#178122)   via llvm-commits
• [clang] [llvm] [X86][APX] Disable PP2/PPX generation on Windows (PR #178122)   Phoebe Wang via llvm-commits
• [llvm] f288f46 - [AArch64][GlobalISel] Constrain G_CONSTANT_FOLD_BARRIER operand register classes (#177997)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Constrain G_CONSTANT_FOLD_BARRIER operand register classes (PR #177997)   Cullen Rhodes via llvm-commits
• [llvm] [AMDGPU] Add scheduling DAG mutation for hazard latencies (PR #170075)   Carl Ritson via llvm-commits
• [llvm] [X86][GlobalISel] Support fp80 for G_FPTRUNC and G_FPEXT (PR #141611)   Simon Pilgrim via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   via llvm-commits
• [llvm] [AArch64] Fix cttz.elts codegen for fixed-length vectors (PR #178902)   David Sherwood via llvm-commits
• [llvm] [IR] Remove Before argument from splitBlock APIs (NFC) (PR #179195)   Nikita Popov via llvm-commits
• [llvm] [NVPTX] Print PM Event Mask value as unsigned integer. (PR #178891)   Kirill Vedernikov via llvm-commits
• [llvm] [AArch64] Fix cttz.elts codegen for fixed-length vectors (PR #178902)   David Sherwood via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo]: Fixing maxoffset calculation in buildSpillLoadStore (PR #179182)   Abhinav Garg via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo]: Fixing maxoffset calculation in buildSpillLoadStore (PR #179182)   Abhinav Garg via llvm-commits
• [llvm] [IR] Remove Before argument from splitBlock APIs (NFC) (PR #179195)   via llvm-commits
• [llvm] [IR] Remove Before argument from splitBlock APIs (NFC) (PR #179195)   via llvm-commits
• [llvm] [X86][GISEL] Enable PostLegalize Combiner (PR #174696)   Simon Pilgrim via llvm-commits
• [llvm] [X86][GISEL] Enable PostLegalize Combiner (PR #174696)   Simon Pilgrim via llvm-commits
• [llvm] [X86][GISEL] Enable PostLegalize Combiner (PR #174696)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [Clang][CodeGen][Coroutines] Make coroutine startup exception-safe (CWG2935) Part1 (PR #179189)   Yexuan Xiao via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Gábor Spaits via llvm-commits
• [llvm] [NVPTX] Print PM Event Mask value as unsigned integer. (PR #178891)   Kirill Vedernikov via llvm-commits
• [clang] [llvm] [Clang][CodeGen][Coroutines] Make coroutine startup exception-safe (CWG2935) Part1 (PR #179189)   Yexuan Xiao via llvm-commits
• [llvm] [NVPTX] Print PM Event Mask value as unsigned integer. (PR #178891)   Kirill Vedernikov via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo]: Fixing maxoffset calculation in buildSpillLoadStore (PR #179182)   Abhinav Garg via llvm-commits
• [llvm] [NVPTX] Print PM Event Mask value as unsigned integer. (PR #178891)   Kirill Vedernikov via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo]: Fixing maxoffset calculation in buildSpillLoadStore (PR #179182)   Abhinav Garg via llvm-commits
• [llvm] [AArch64][GlobalISel] Do no skip zext in getTestBitReg. (PR #177991)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] Blocklist instructions that are unsafe for masked-load folding. (PR #178888)   via llvm-commits
• [llvm] [BasicBlockUtils] Fix dominator tree update for entry block in splitBlockBefore() (PR #178895)   Nikita Popov via llvm-commits
• [llvm] [BasicBlockUtils] Fix dominator tree update for entry block in splitBlockBefore() (PR #178895)   Nikita Popov via llvm-commits
• [llvm] [BasicBlockUtils] Fix dominator tree update for entry block in splitBlockBefore() (PR #178895)   Nikita Popov via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   David Spickett via llvm-commits
• [llvm] [RISCV] Make MOP/HINT-based instruction mnemonics always available (PR #178609)   Kito Cheng via llvm-commits
• [llvm] [SROA] Allow unfolding gep(phi(gep,gep)) (PR #178126)   Theodoros Theodoridis via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Dmitry Sidorov via llvm-commits
• [llvm] [AArch64] Combine manual reciprocal square root refinement into FRSQRTS. (PR #172067)   David Green via llvm-commits
• [llvm] [AArch64] Combine manual reciprocal square root refinement into FRSQRTS. (PR #172067)   David Green via llvm-commits
• [llvm] [WebAssembly] Combine shuffle and signed extend to extend_high (PR #179166)   Sam Parker via llvm-commits
• [llvm] [RISCV] Make MOP/HINT-based instruction mnemonics always available (PR #178609)   Kito Cheng via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Simon Pilgrim via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Simon Pilgrim via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Simon Pilgrim via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Simon Pilgrim via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Dmitry Sidorov via llvm-commits
• [compiler-rt] [Compiler-rt] Implement AEABI Unaligned Read/Write Helpers in compiler-rt (PR #167913)   Simi Pallipurath via llvm-commits
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• [llvm] [NFC][LoopUnroll] Add `-unroll-runtime-other-exit-predictable=false` to `unroll-multi-exit-loop-heuristics.ll` (PR #179198)   Marek Sedláček via llvm-commits
• [llvm] [NFC][LoopUnroll] Add `-unroll-runtime-other-exit-predictable=false` to `unroll-multi-exit-loop-heuristics.ll` (PR #179198)   via llvm-commits
• [llvm] [NFC][LoopUnroll] Add `-unroll-runtime-other-exit-predictable=false` to `unroll-multi-exit-loop-heuristics.ll` (PR #179198)   Marek Sedláček via llvm-commits
• [llvm] [missed-opt][X86] Optimize fptosi+select down to a single cvttsd2si Instruction on X86 (PR #172710)   Simon Pilgrim via llvm-commits
• [llvm] [missed-opt][X86] Optimize fptosi+select down to a single cvttsd2si Instruction on X86 (PR #172710)   Simon Pilgrim via llvm-commits
• [llvm] [missed-opt][X86] Optimize fptosi+select down to a single cvttsd2si Instruction on X86 (PR #172710)   Simon Pilgrim via llvm-commits
• [llvm] [missed-opt][X86] Optimize fptosi+select down to a single cvttsd2si Instruction on X86 (PR #172710)   Simon Pilgrim via llvm-commits
• [llvm] [missed-opt][X86] Optimize fptosi+select down to a single cvttsd2si Instruction on X86 (PR #172710)   Simon Pilgrim via llvm-commits
• [llvm] [missed-opt][X86] Optimize fptosi+select down to a single cvttsd2si Instruction on X86 (PR #172710)   Simon Pilgrim via llvm-commits
• [llvm] [missed-opt][X86] Optimize fptosi+select down to a single cvttsd2si Instruction on X86 (PR #172710)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Detect and create partial reductions in VPlan. (NFCI) (PR #167851)   Martin Storsjö via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   David Spickett via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   David Spickett via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   David Spickett via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   David Spickett via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   David Spickett via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   David Spickett via llvm-commits
• [llvm] [IR] Remove Before argument from splitBlock APIs (NFC) (PR #179195)   Mingjie Xu via llvm-commits
• [llvm] [WebAssembly] Combine shuffle and signed extend to extend_high (PR #179166)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Do no skip zext in getTestBitReg. (PR #177991)   LLVM Continuous Integration via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   via llvm-commits
• [llvm] [AMDGPU] Add scheduling DAG mutation for hazard latencies (PR #170075)   Carl Ritson via llvm-commits
• [llvm] [IR] Remove Before argument from splitBlock APIs (NFC) (PR #179195)   Nikita Popov via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Simon Pilgrim via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Simon Pilgrim via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Simon Pilgrim via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Simon Pilgrim via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Simon Pilgrim via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Simon Pilgrim via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Simon Pilgrim via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Simon Pilgrim via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Simon Pilgrim via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Simon Pilgrim via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Simon Pilgrim via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Simon Pilgrim via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Simon Pilgrim via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Simon Pilgrim via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Simon Pilgrim via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Simon Pilgrim via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   Florian Hahn via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   Florian Hahn via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   Florian Hahn via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   Florian Hahn via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   Florian Hahn via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   Florian Hahn via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   Florian Hahn via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   Florian Hahn via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   Florian Hahn via llvm-commits
• [llvm] f4a8f30 - [CodeExtractor] Format CodeExtractor header, NFC (#178662)   via llvm-commits
• [llvm] [CodeExtractor] Format CodeExtractor header, NFC (PR #178662)   Sergio Afonso via llvm-commits
• [llvm] 9d5a42c - [X86][GISEL] Enable PostLegalize Combiner (#174696)   via llvm-commits
• [llvm] [X86][GISEL] Enable PostLegalize Combiner (PR #174696)   Simon Pilgrim via llvm-commits
• [llvm] [AsmParser] Track value references and function arguments (PR #174566)   via llvm-commits
• [llvm] fd1e37b - [IR] Remove Before argument from splitBlock APIs (NFC) (#179195)   via llvm-commits
• [llvm] [IR] Remove Before argument from splitBlock APIs (NFC) (PR #179195)   Nikita Popov via llvm-commits
• [llvm] [AArch64][SME] Simplify SME ABI pass (revert cross-block optimizations) (PR #179204)   Benjamin Maxwell via llvm-commits
• [llvm] [SROA] Allow unfolding gep(phi(gep,gep)) (PR #178126)   Theodoros Theodoridis via llvm-commits
• [llvm] [SROA] Allow unfolding gep(phi(gep,gep)) (PR #178126)   Theodoros Theodoridis via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_unstructured_loop_controls extension (PR #178799)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_unstructured_loop_controls extension (PR #178799)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AsmParser] Track value references and function arguments (PR #174566)   Nikita Popov via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Dmitry Sidorov via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   David Green via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   David Green via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   David Green via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   David Green via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   David Green via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   David Green via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   David Green via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   David Green via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Dmitry Sidorov via llvm-commits
• [llvm] [SROA] Allow unfolding gep(phi(gep,gep)) (PR #178126)   Nikita Popov via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   via llvm-commits
• [llvm] [BasicBlockUtils] Fix dominator tree update for entry block in splitBlockBefore() (PR #178895)   Mingjie Xu via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Dmitry Sidorov via llvm-commits
• [llvm] [SystemZ, LoopVectorizer] Enable vectorization of epilogue loops after VF16. (PR #172925)   Florian Hahn via llvm-commits
• [llvm] [SystemZ, LoopVectorizer] Enable vectorization of epilogue loops after VF16. (PR #172925)   Florian Hahn via llvm-commits
• [llvm] [SystemZ, LoopVectorizer] Enable vectorization of epilogue loops after VF16. (PR #172925)   Florian Hahn via llvm-commits
• [llvm] [SystemZ, LoopVectorizer] Enable vectorization of epilogue loops after VF16. (PR #172925)   Florian Hahn via llvm-commits
• [llvm] [SystemZ, LoopVectorizer] Enable vectorization of epilogue loops after VF16. (PR #172925)   Florian Hahn via llvm-commits
• [llvm] [SystemZ, LoopVectorizer] Enable vectorization of epilogue loops after VF16. (PR #172925)   Florian Hahn via llvm-commits
• [llvm] [SYCL] Add sycl::device initial implementation (PR #176972)   Kseniya Tikhomirova via llvm-commits
• [llvm] InstCombine: Stop using nsz in multi-use min/max fold (PR #176579)   Matt Arsenault via llvm-commits
• [llvm] [UTC] Add initial VPlan support. (PR #178534)   Florian Hahn via llvm-commits
• [llvm] [SYCL] Add sycl::device initial implementation (PR #176972)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SYCL] Add sycl::device initial implementation (PR #176972)   Kseniya Tikhomirova via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   via llvm-commits
• [llvm] [BOLT] Fix scavenge register after program point (PR #179207)   Haibo Jiang via llvm-commits
• [llvm] [BOLT] Fix scavenge register after program point (PR #179207)   via llvm-commits
• [llvm] [TableGen][AsmMatcher] Fix optional operand mask indexing when HasMnemonicFirst is false (PR #176868)   Sergei Barannikov via llvm-commits
• [llvm] [TableGen][AsmMatcher] Fix optional operand mask indexing when HasMnemonicFirst is false (PR #176868)   Sergei Barannikov via llvm-commits
• [llvm] [X86] optimize 512-bit masked truncated saturating stores (PR #179130)   Simon Pilgrim via llvm-commits
• [lld] [lld][RISC-V] Implement Qualcomm Relocations (PR #178584)   Peter Smith via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo]: Fixing maxoffset calculation in buildSpillLoadStore (PR #179182)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Ryan Cowan via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   Konrad Kleine via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   Konrad Kleine via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   via llvm-commits
• [lld] [lld][RISC-V] Implement Qualcomm Relocations (PR #178584)   Jessica Clarke via llvm-commits
• [llvm] InstCombine: Fold bitcast of vector with constant to scalar (PR #179042)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Sink recipes from the vector loop region in licm. (PR #168031)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Sink recipes from the vector loop region in licm. (PR #168031)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Sink recipes from the vector loop region in licm. (PR #168031)   Florian Hahn via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FSINCOS (PR #179053)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FSINCOS (PR #179053)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FSINCOS (PR #179053)   Marcos Maronas via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FSINCOS (PR #179053)   Marcos Maronas via llvm-commits
• [llvm] fc6ad39 - [AsmParser] Track value references and function arguments (#174566)   via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   Konrad Kleine via llvm-commits
• [llvm] [AsmParser] Track value references and function arguments (PR #174566)   Nikita Popov via llvm-commits
• [llvm] 9e97f0b - [SPIRV] Split async copy tests and fix invalid tests (#178718)   via llvm-commits
• [llvm] [SPIRV] Split async copy tests and fix invalid tests (PR #178718)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Emit intrinsics for globals only in function that references them (PR #178143)   Manuel Carrasco via llvm-commits
• [llvm] [X86] Use shift+add/sub for vXi8 splat multiplies (PR #174110)   Simon Pilgrim via llvm-commits
• [llvm] [UTC] Add initial VPlan support. (PR #178534)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AArch64][SME] Simplify SME ABI pass (revert cross-block optimizations) (PR #179204)   via llvm-commits
• [llvm] [AArch64][SME] Simplify SME ABI pass (revert cross-block optimizations) (PR #179204)   via llvm-commits
• [llvm] [VPlan] Extract reverse mask from reverse accesses (PR #155579)   Luke Lau via llvm-commits
• [llvm] [VPlan] Extract reverse mask from reverse accesses (PR #155579)   Luke Lau via llvm-commits
• [llvm] [VPlan] Extract reverse mask from reverse accesses (PR #155579)   Luke Lau via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_unstructured_loop_controls extension (PR #178799)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_unstructured_loop_controls extension (PR #178799)   Dmitry Sidorov via llvm-commits
• [llvm] 1bc655f - [ARM] Expand and regenerate llvm/test/CodeGen/ARM/cls.ll. NFC   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Ryan Cowan via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_unstructured_loop_controls extension (PR #178799)   Manuel Carrasco via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   David Green via llvm-commits
• [lld] [lld][RISC-V] Implement Qualcomm Relocations (PR #178584)   Peter Smith via llvm-commits
• [llvm] [WebAssembly] Combine shuffle and signed extend to extend_high (PR #179166)   Petr Penzin via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   Konrad Kleine via llvm-commits
• [clang] [llvm] [AArch64][SME] Simplify SME ABI pass (revert cross-block optimizations) (PR #179204)   Benjamin Maxwell via llvm-commits
• [llvm] InstCombine: Fold bitcast of vector with constant to scalar (PR #179042)   Matt Arsenault via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   Konrad Kleine via llvm-commits
• [llvm] 9dc6b49 - Re-apply "[AMDGPU][Scheduler] Scoring system for rematerializations (#175050)" (#177206)   via llvm-commits
• [llvm] Re-apply "[AMDGPU][Scheduler] Scoring system for rematerializations (#175050)" (PR #177206)   Lucas Ramirez via llvm-commits
• [llvm] [WebAssembly] Combine shuffle and signed extend to extend_high (PR #179166)   Petr Penzin via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   via llvm-commits
• [llvm] [AMDGPU][NPM] Support -regalloc-npm options (PR #129035)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NPM] Support -regalloc-npm options (PR #129035)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   via llvm-commits
• [llvm] [AArch64][ISel] Lower fixed-width i64 vector CLMUL intrinsics (PR #178876)   David Green via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   via llvm-commits
• [llvm] [AMDGPU][NPM] Add target-specific register allocation options (PR #178889)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NPM] Add target-specific register allocation options (PR #178889)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NPM] Add target-specific register allocation options (PR #178889)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NPM] Add target-specific register allocation options (PR #178889)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][NPM] Add target-specific register allocation options (PR #178889)   Diana Picus via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Ryan Cowan via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Gábor Spaits via llvm-commits
• [llvm] [AArch64] Combine manual reciprocal square root refinement into FRSQRTS. (PR #172067)   Matt Arsenault via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   Konrad Kleine via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Gábor Spaits via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [llvm] InstCombine: Fold bitcast of vector with constant to scalar (PR #179042)   Nikita Popov via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   Konrad Kleine via llvm-commits
• [llvm] [LSV] Support vectorization of mixed-type contiguous accesses (PR #177908)   Anshil Gandhi via llvm-commits
• [llvm] [RISCV] Make MOP/HINT-based instruction mnemonics always available (PR #178609)   Kito Cheng via llvm-commits
• [llvm] [MLIR] [Python] Added plumbing to run stubgen on the mlir._mlir package (PR #179211)   Sergei Lebedev via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Simon Pilgrim via llvm-commits
• [llvm] [MLIR] [Python] Added plumbing to run stubgen on the mlir._mlir package (PR #179211)   via llvm-commits
• [llvm] [InstCombine] Don't convert a compare+select into a minnum/maxnum intrinsic that can't be lowered back to a compare+select (PR #177821)   Sjoerd Meijer via llvm-commits
• [llvm] [RISCV] Make MOP/HINT-based instruction mnemonics always available (PR #178609)   Kito Cheng via llvm-commits
• [llvm] [RISCV] Make MOP/HINT-based instruction mnemonics always available (PR #178609)   Kito Cheng via llvm-commits
• [llvm] [MLIR] [Python] Added plumbing to run stubgen on the mlir._mlir package (PR #179211)   Sergei Lebedev via llvm-commits
• [llvm] [InstCombine] Don't convert a compare+select into a minnum/maxnum intrinsic that can't be lowered back to a compare+select (PR #177821)   Nikita Popov via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   David Green via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   David Green via llvm-commits
• [llvm] [VPlan] Factor common VPDT-sort in sink-replicate (NFC) (PR #179214)   Ramkumar Ramachandra via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [bazel] Port 1e33b736ff3888b04206acb9fbd9f6623c0723aa (PR #179216)   Benjamin Kramer via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [VPlan] Factor common VPDT-sort in sink-replicate (NFC) (PR #179214)   via llvm-commits
• [llvm] [LV] Optimize FindLast recurrences to FindIV (NFCI). (PR #177870)   Florian Hahn via llvm-commits
• [llvm] [LV] Optimize FindLast recurrences to FindIV (NFCI). (PR #177870)   Florian Hahn via llvm-commits
• [llvm] [LV] Optimize FindLast recurrences to FindIV (NFCI). (PR #177870)   Florian Hahn via llvm-commits
• [llvm] [LV] Optimize FindLast recurrences to FindIV (NFCI). (PR #177870)   Florian Hahn via llvm-commits
• [llvm] [LV] Optimize FindLast recurrences to FindIV (NFCI). (PR #177870)   Florian Hahn via llvm-commits
• [llvm] [LV] Optimize FindLast recurrences to FindIV (NFCI). (PR #177870)   Florian Hahn via llvm-commits
• [llvm] [LV] Optimize FindLast recurrences to FindIV (NFCI). (PR #177870)   Florian Hahn via llvm-commits
• [llvm] [LV] Optimize FindLast recurrences to FindIV (NFCI). (PR #177870)   Florian Hahn via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   via llvm-commits
• [llvm] [LSV] Support vectorization of mixed-type contiguous accesses (PR #177908)   Anshil Gandhi via llvm-commits
• [llvm] [bazel] Port 1e33b736ff3888b04206acb9fbd9f6623c0723aa (PR #179216)   Benjamin Kramer via llvm-commits
• [llvm] [VectorCombine] Skip dead shufflevector in GetIndexRangeInShuffles to fix crash. (PR #179217)   Florian Hahn via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   via llvm-commits
• [llvm] [VectorCombine] Skip dead shufflevector in GetIndexRangeInShuffles to fix crash. (PR #179217)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Cullen Rhodes via llvm-commits
• [llvm] [bazel] Port 1e33b736ff3888b04206acb9fbd9f6623c0723aa (PR #179216)   Benjamin Kramer via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [BasicBlockUtils] Fix dominator tree update for entry block in splitBlockBefore() (PR #178895)   Mingjie Xu via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [InstCombine] Don't convert a compare+select into a minnum/maxnum intrinsic that can't be lowered back to a compare+select (PR #177821)   Florian Hahn via llvm-commits
• [llvm] [bazel] Port 9d5a42c8411b22fdcfb80dbbda4d68d6aa957328 (PR #179218)   Benjamin Kramer via llvm-commits
• [llvm] [SPIR-V] Fix FmaKHR CapabilityOperand and Op (PR #179174)   Viktoria Maximova via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   via llvm-commits
• [llvm] [SPIR-V] Fix FmaKHR CapabilityOperand and Op (PR #179174)   Viktoria Maximova via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [bazel] Port 9d5a42c8411b22fdcfb80dbbda4d68d6aa957328 (PR #179218)   Benjamin Kramer via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [VPlan] Always set flags for overflowing ops etc via VPIRFlags. (PR #179138)   Florian Hahn via llvm-commits
• [llvm] [RISCV] Add cost for @llvm.vector.splice.{left, right} (PR #179219)   Luke Lau via llvm-commits
• [llvm] [WebAssembly] Combine shuffle and signed extend to extend_high (PR #179166)   via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   David Spickett via llvm-commits
• [llvm] [RISCV] Add cost for @llvm.vector.splice.{left, right} (PR #179219)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [lld] [lld][RISC-V] Implement Qualcomm Relocations (PR #178584)   Owen Anderson via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo] Fix maxoffset calculation in buildSpillLoadStore (PR #179182)   Christudasan Devadasan via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [MLIR] [Python] Added plumbing to run stubgen on the mlir._mlir package (PR #179211)   Jacques Pienaar via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [SDAG] (abs (add nsw a, -b)) -> (abds a, b) (PR #175801)   via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [llvm] [VPlan] Always set flags for overflowing ops etc via VPIRFlags. (PR #179138)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Always set flags for overflowing ops etc via VPIRFlags. (PR #179138)   Florian Hahn via llvm-commits
• [llvm] [SDAG] (abs (add nsw a, -b)) -> (abds a, b) (PR #175801)   via llvm-commits
• [llvm] [SDAG] (abs (add nsw a, -b)) -> (abds a, b) (PR #175801)   via llvm-commits
• [llvm] [MLIR] [Python] Added plumbing to run stubgen on the mlir._mlir package (PR #179211)   Jacques Pienaar via llvm-commits
• [llvm] [MLIR] [Python] Added plumbing to run stubgen on the mlir._mlir package (PR #179211)   Jacques Pienaar via llvm-commits
• [llvm] [MLIR] [Python] Added plumbing to run stubgen on the mlir._mlir package (PR #179211)   Jacques Pienaar via llvm-commits
• [llvm] [SPIRV] Emit intrinsics for globals only in function that references them (PR #178143)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] workflows/release-binaries: Add support for Windows ARM builds (PR #177609)   Omair Javaid via llvm-commits
• [llvm] [DebugInfo][NVPTX] Adding support for `inlined_at` debug directive in NVPTX backend (PR #170239)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [llvm] wasm: recognize `any_true` and `all_true` (PR #155885)   Petr Penzin via llvm-commits
• [llvm] wasm: recognize `any_true` and `all_true` (PR #155885)   Petr Penzin via llvm-commits
• [llvm] wasm: recognize `any_true` and `all_true` (PR #155885)   Petr Penzin via llvm-commits
• [llvm] wasm: recognize `any_true` and `all_true` (PR #155885)   Petr Penzin via llvm-commits
• [llvm] wasm: recognize `any_true` and `all_true` (PR #155885)   Petr Penzin via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FSINCOS (PR #179053)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FSINCOS (PR #179053)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FSINCOS (PR #179053)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FSINCOS (PR #179053)   Dmitry Sidorov via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Florian Hahn via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_unstructured_loop_controls extension (PR #178799)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FSINCOS (PR #179053)   Dmitry Sidorov via llvm-commits
• [llvm] [WebAssembly] Combine shuffle and signed extend to extend_high (PR #179166)   via llvm-commits
• [llvm] [RISCV] Add cost for @llvm.vector.splice.{left, right} (PR #179219)   via llvm-commits
• [llvm] [RISCV] Add cost for @llvm.vector.splice.{left, right} (PR #179219)   via llvm-commits
• [llvm] AMDGPU: Add more tests for v_dot2_f32_f16/bf16 (PR #179223)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU: Add more tests for v_dot2_f32_f16/bf16 (PR #179223)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU: Add more tests for v_dot2_f32_f16/bf16 (PR #179223)   Petar Avramovic via llvm-commits
• [llvm] [LSV] Support vectorization of mixed-type contiguous accesses (PR #177908)   Anshil Gandhi via llvm-commits
• [llvm] AMDGPU: Add more tests for v_dot2_f32_f16/bf16 (PR #179223)   via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo] Fix maxoffset calculation in buildSpillLoadStore (PR #179182)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo] Fix maxoffset calculation in buildSpillLoadStore (PR #179182)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo] Fix maxoffset calculation in buildSpillLoadStore (PR #179182)   Christudasan Devadasan via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for fptoi and itofp (PR #176300)   Petar Avramovic via llvm-commits
• [llvm] [CoroCleanup] Noop coroutine elision for load-and-call pattern (PR #179154)   Weibo He via llvm-commits
• [llvm] [cmake] Introduce LLVM_DISABLE_PROJECTS to easily exclude projects (PR #141535)   Hamid El Maazouz via llvm-commits
• [flang] [llvm] [mlir] [openmp] [MLIR][OpenMP] Add omp.fuse operation (PR #168898)   Ferran Toda via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   David Sherwood via llvm-commits
• [flang] [llvm] [mlir] [openmp] [MLIR][OpenMP] Add omp.fuse operation (PR #168898)   Ferran Toda via llvm-commits
• [llvm] [SimpleLoopUnswitch][NFC] move quadratic asserts under EXPENSIVE_CHECKS (PR #144887)   via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [InstCombine] Don't convert a compare+select into a minnum/maxnum intrinsic that can't be lowered back to a compare+select (PR #177821)   Sergey Shcherbinin via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] WavePrefixSum intrinsic support (PR #167946)   via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   Jonas Devlieghere via llvm-commits
• [flang] [llvm] [mlir] [openmp] [MLIR][OpenMP] Add omp.fuse operation (PR #168898)   via llvm-commits
• [flang] [llvm] [mlir] [openmp] [MLIR][OpenMP] Add omp.fuse operation (PR #168898)   via llvm-commits
• [llvm] [RISCV] Add SpacemiT X100 base scheduling model (PR #178189)   Petr Penzin via llvm-commits
• [llvm] [InstCombine] Don't convert a compare+select into a minnum/maxnum intrinsic that can't be lowered back to a compare+select (PR #177821)   via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Hamza Hassanain via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] [perf] Replace copy-assign by move-assign in llvm/lib/Analysis/* (PR #178169)   via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false) => (C & A) | (!C & B)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [InstCombine] Don't convert a compare+select into a minnum/maxnum intrinsic that can't be lowered back to a compare+select (PR #177821)   Sergey Shcherbinin via llvm-commits
• [llvm] [SPIRV] Emit intrinsics for globals only in function that references them (PR #178143)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] 1daef59 - [SPIRV] Emit intrinsics for globals only in function that references them (#178143)   via llvm-commits
• [llvm] [SPIRV] Emit intrinsics for globals only in function that references them (PR #178143)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [InstCombine] Don't convert a compare+select into a minnum/maxnum intrinsic that can't be lowered back to a compare+select (PR #177821)   via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] ValueTracking: Use computeKnownBits for ldexp integer handling (PR #179234)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Use computeKnownBits for ldexp integer handling (PR #179234)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Use computeKnownBits for ldexp integer handling (PR #179234)   Matt Arsenault via llvm-commits
• [llvm] ValueTracking: Use computeKnownBits for ldexp integer handling (PR #179234)   via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] [InstCombine] Don't convert a compare+select into a minnum/maxnum intrinsic that can't be lowered back to a compare+select (PR #177821)   Sergey Shcherbinin via llvm-commits
• [llvm] [CoroCleanup] Noop coroutine elision for load-and-call pattern (PR #179154)   via llvm-commits
• [llvm] [cmake] Introduce LLVM_DISABLE_PROJECTS to easily exclude projects (PR #141535)   Joseph Huber via llvm-commits
• [llvm] [Analysis][CostModel] Add insert-extract runlines for AArch64 Apple C… (PR #179236)   Tomer Shafir via llvm-commits
• [llvm] [Analysis][CostModel] Add insert-extract runlines Apple CPUs (NFC) (PR #179236)   Tomer Shafir via llvm-commits
• [llvm] [Analysis][CostModel] Add insert-extract runlines Apple CPUs (NFC) (PR #179236)   Tomer Shafir via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_unstructured_loop_controls extension (PR #178799)   Dmitry Sidorov via llvm-commits
• [llvm] [cmake] Introduce LLVM_DISABLE_PROJECTS to easily exclude projects (PR #141535)   Hamid El Maazouz via llvm-commits
• [llvm] 195a6d0 - [CoroCleanup] Noop coroutine elision for load-and-call pattern (#179154)   via llvm-commits
• [llvm] [CoroCleanup] Noop coroutine elision for load-and-call pattern (PR #179154)   Weibo He via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   Konrad Kleine via llvm-commits
• [llvm] fcc4231 - [SPIR-V] Add SPV_INTEL_unstructured_loop_controls extension (#178799)   via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_unstructured_loop_controls extension (PR #178799)   Dmitry Sidorov via llvm-commits
• [llvm] [cmake] Introduce LLVM_DISABLE_PROJECTS to easily exclude projects (PR #141535)   Joseph Huber via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] - Fix the simplification of GEP index when its operand is an XOR constant. (PR #175724)   Pawan Nirpal via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   Konrad Kleine via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Ryan Cowan via llvm-commits
• [llvm] [AArch64][GlobalISel] FP Info implementation for AArch64. (PR #177158)   Ryan Cowan via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Hamza Hassanain via llvm-commits
• [llvm] [cmake] Introduce LLVM_DISABLE_PROJECTS to easily exclude projects (PR #141535)   Hamid El Maazouz via llvm-commits
• [llvm] ValueTracking: Use computeKnownBits for ldexp integer handling (PR #179234)   via llvm-commits
• [llvm] ValueTracking: Use computeKnownBits for ldexp integer handling (PR #179234)   via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   Konrad Kleine via llvm-commits
• [llvm] [InstCombine] Don't convert a compare+select into a minnum/maxnum intrinsic that can't be lowered back to a compare+select (PR #177821)   Nikita Popov via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   Konrad Kleine via llvm-commits
• [llvm] [CoroCleanup] Noop coroutine elision for load-and-call pattern (PR #179154)   LLVM Continuous Integration via llvm-commits
• [llvm] [NFC][LoopUnroll] Add `-unroll-runtime-other-exit-predictable=false` to `unroll-multi-exit-loop-heuristics.ll` (PR #179198)   Zibi Sarbinowski via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   Ryan Cowan via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Hamza Hassanain via llvm-commits
• [llvm] [Hexagon] Fix use-after-poison in balanceSubTree (PR #179239)   Brian Cain via llvm-commits
• [llvm] [Hexagon] Fix use-after-poison in balanceSubTree (PR #179239)   via llvm-commits
• [llvm] [Hexagon] Fix use-after-poison in balanceSubTree (PR #179239)   Brian Cain via llvm-commits
• [llvm] [SPIRV] Emit intrinsics for globals only in function that references them (PR #178143)   LLVM Continuous Integration via llvm-commits
• [llvm] [Hexagon] Fix use-after-poison in balanceSubTree (PR #179239)   via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   John Brawn via llvm-commits
• [llvm] [Hexagon] Fix use-after-poison in balanceSubTree (PR #179239)   Brian Cain via llvm-commits
• [llvm] [Offload] Only issue a warning for building `offload` on the GPU (PR #179240)   Joseph Huber via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_unstructured_loop_controls extension (PR #178799)   LLVM Continuous Integration via llvm-commits
• [llvm] [Offload] Only issue a warning for building `offload` on the GPU (PR #179240)   via llvm-commits
• [llvm] [InstCombine] Don't convert a compare+select into a minnum/maxnum intrinsic that can't be lowered back to a compare+select (PR #177821)   Sjoerd Meijer via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   John Brawn via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] dc520ea - [PowerPC] using milicode call for strcmp instead of lib call (#177009)   via llvm-commits
• [llvm] [PowerPC] using milicode call for strcmp instead of lib call (PR #177009)   zhijian lin via llvm-commits
• [llvm] [SDAG] (abs (add nsw a, -b)) -> (abds a, b) (PR #175801)   Simon Pilgrim via llvm-commits
• [llvm] [regalloc][LiveRegMatrix] Add validity check for LiveRegMatrix to prevent dangling pointers (PR #168553)   Valery Pykhtin via llvm-commits
• [llvm] [regalloc][LiveRegMatrix] Add validity check for LiveRegMatrix to prevent dangling pointers (PR #168553)   Valery Pykhtin via llvm-commits
• [llvm] [SDAG] (abs (add nsw a, -b)) -> (abds a, b) (PR #175801)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] (abs (add nsw a, -b)) -> (abds a, b) (PR #175801)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for enabling streaming with +fprcvt (PR #177333)   Jonathan Thackray via llvm-commits
• [llvm] [DAGCombiner] Look through freeze for ext(freeze(extload(x))) (PR #178669)   David Sherwood via llvm-commits
• [llvm] [lit] Fix not builtin to treat signal deaths as crashes (PR #179171)   Aiden Grossman via llvm-commits
• [llvm] [DAGCombiner] Look through freeze for ext(freeze(extload(x))) (PR #178669)   David Sherwood via llvm-commits
• [llvm] [DAGCombiner] Look through freeze for ext(freeze(extload(x))) (PR #178669)   David Sherwood via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] [lit] Fix not builtin to treat signal deaths as crashes (PR #179171)   Aiden Grossman via llvm-commits
• [llvm] [SPIR-V] Add SPV_INTEL_unstructured_loop_controls extension (PR #178799)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] [NewPM] Port x86-wineh-unwindv2 (PR #179172)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port x86-wineh-unwindv2 (PR #179172)   Aiden Grossman via llvm-commits
• [llvm] [X86AsmBackend] Check fixup value overflow (PR #176827)   Alexander Kornienko via llvm-commits
• [llvm] [VPlan] Always set flags for overflowing ops etc via VPIRFlags. (PR #179138)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] ValueTracking: Use computeKnownBits for ldexp integer handling (PR #179234)   Matt Arsenault via llvm-commits
• [clang] [llvm] [RISCV] Add SpacemiT A100 processor definition (PR #174052)   Petr Penzin via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false) => (C & A) | (!C & B)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Aiden Grossman via llvm-commits
• [llvm] InstCombine: Add baseline tests for broken snan handling (PR #179243)   Matt Arsenault via llvm-commits
• [llvm] [DAGCombiner] Look through freeze for ext(freeze(extload(x))) (PR #178669)   Simon Pilgrim via llvm-commits
• [llvm] InstCombine: Add baseline tests for broken snan handling (PR #179243)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Add baseline tests for broken snan handling (PR #179243)   Matt Arsenault via llvm-commits
• [llvm] [Offload] Only issue a warning for building `offload` on the GPU (PR #179240)   Jan Patrick Lehr via llvm-commits
• [llvm] InstCombine: Add baseline tests for broken snan handling (PR #179243)   via llvm-commits
• [llvm] [Offload] Only issue a warning for building `offload` on the GPU and return (PR #179240)   Joseph Huber via llvm-commits
• [llvm] [Offload] Only issue a warning for building `offload` on the GPU and return (PR #179240)   Michael Kruse via llvm-commits
• [llvm] [openmp] [OMPT][Offload][OpenMP] Fixes for OMPT data used by libomptarget (reapply #156020) (PR #175165)   Kaloyan Ignatov via llvm-commits
• [llvm] [Offload] Only issue a warning for building `offload` on the GPU and return (PR #179240)   Joseph Huber via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Cullen Rhodes via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Antonio Frighetto via llvm-commits
• [llvm] [Offload] Only issue a warning for building `offload` on the GPU and return (PR #179240)   Joseph Huber via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Antonio Frighetto via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Antonio Frighetto via llvm-commits
• [llvm] [VPlan] Delay header mask creation until after blend recipes generation (PR #178623)   Mel Chen via llvm-commits
• [llvm] [ConstantFolding] Constant fold nextafter and nexttoward (PR #168794)   Sayan Sivakumaran via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [llvm] [VPlan] Delay header mask creation until after blend recipes generation (PR #178623)   Mel Chen via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Hamza Hassanain via llvm-commits
• [llvm] [VPlan] Delay header mask creation until after blend recipes generation (PR #178623)   Mel Chen via llvm-commits
• [llvm] [VPlan] Delay header mask creation until after blend recipes generation (PR #178623)   Mel Chen via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Antonio Frighetto via llvm-commits
• [llvm] [Analysis][CostModel] Add insert-extract runlines Apple CPUs (NFC) (PR #179236)   Tomer Shafir via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [llvm] [Analysis][CostModel] Add insert-extract runlines Apple CPUs (NFC) (PR #179236)   via llvm-commits
• [llvm] [X86][utils] Support `-basic-block-sections` in `update_llc_test_checks` (PR #178999)   Mikhail Gudim via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Aiden Grossman via llvm-commits
• [llvm] [VPlan] Compute predicated load/store costs in VPlan. (NFC) (PR #179129)   David Sherwood via llvm-commits
• [llvm] [VPlan] Compute predicated load/store costs in VPlan. (NFC) (PR #179129)   David Sherwood via llvm-commits
• [llvm] [VPlan] Compute predicated load/store costs in VPlan. (NFC) (PR #179129)   David Sherwood via llvm-commits
• [llvm] [Analysis][CostModel] Add insert-extract runlines Apple CPUs (NFC) (PR #179236)   Tomer Shafir via llvm-commits
• [libcxx] [llvm] [XRay] Add bounds check before memcpy in readBinaryFormatHeader (PR #178499)   Nikolas Klauser via llvm-commits
• [llvm] [Analysis][CostModel] Add insert-extract runlines Apple CPUs (NFC) (PR #179236)   Tomer Shafir via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   David Spickett via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Aiden Grossman via llvm-commits
• [flang] [llvm] [mlir] [openmp] [MLIR][OpenMP] Add omp.fuse operation (PR #168898)   Michael Kruse via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   via llvm-commits
• [llvm] [SCEV] Add commutative add matchers (NFC) (PR #178663)   Sayan Sivakumaran via llvm-commits
• [llvm] [X86][utils] Support `-basic-block-sections` in `update_llc_test_checks` (PR #178999)   Aiden Grossman via llvm-commits
• [llvm] [SCEV] Add commutative add matchers (NFC) (PR #178663)   Sayan Sivakumaran via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Luke Lau via llvm-commits
• [llvm] [X86][utils][test] Precommit a test... (PR #178966)   Aiden Grossman via llvm-commits
• [llvm] [lit] Fix not builtin to treat signal deaths as crashes (PR #179171)   Ramon Asuncion via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_UNMERGE_VALUES (PR #171653)   Petar Avramovic via llvm-commits
• [llvm] [lit] Fix not builtin to treat signal deaths as crashes (PR #179171)   Ramon Asuncion via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Mel Chen via llvm-commits
• [llvm] [Offload] Only issue a warning for building `offload` on the GPU and return (PR #179240)   Michael Kruse via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [RISCV] Add SpacemiT A100 processor definition (PR #174052)   Mark Zhuang via llvm-commits
• [llvm] fbda306 - [SDAG] (abs (add nsw a, -b)) -> (abds a, b) (#175801)   via llvm-commits
• [llvm] [SDAG] (abs (add nsw a, -b)) -> (abds a, b) (PR #175801)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Luke Lau via llvm-commits
• [llvm] [XRay] Add bounds check before memcpy in readBinaryFormatHeader (PR #178499)   via llvm-commits
• [llvm] [XRay] Add bounds check before memcpy in readBinaryFormatHeader (PR #178499)   via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [llvm] [BOLT] Fix fixed pic handling in indirect jumps (PR #178578)   Alexey Moksyakov via llvm-commits
• [llvm] [VPlan] Delay header mask creation until after blend recipes generation (PR #178623)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Iterative scheduling must behave the same with/without debug (PR #178460)   via llvm-commits
• [llvm] 70914cc - [AMDGPU] Iterative scheduling must behave the same with/without debug (#178460)   via llvm-commits
• [libcxx] [llvm] [XRay] Add bounds check before memcpy in readBinaryFormatHeader (PR #178499)   via llvm-commits
• [llvm] [X86][utils] Support `-basic-block-sections` in `update_llc_test_checks` (PR #178999)   Mikhail Gudim via llvm-commits
• [libcxx] [llvm] [XRay] Add bounds check before memcpy in readBinaryFormatHeader (PR #178499)   via llvm-commits
• [llvm] [MLIR] [Python] Added plumbing to run stubgen on the mlir._mlir package (PR #179211)   Sergei Lebedev via llvm-commits
• [llvm] [PowerPC] Only set QualName symbol on first section switch (PR #179253)   Nikita Popov via llvm-commits
• [llvm] [PowerPC] Only set QualName symbol on first section switch (PR #179253)   via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [llvm] [ValueTracking] Propagate sign information out of loop (PR #175590)   Kshitij Paranjape via llvm-commits
• [llvm] [docs] Fix a small error in the Programmer's Manual (PR #179254)   Matej Košík via llvm-commits
• [llvm] [PowerPC] using milicode call for strcmp instead of lib call (PR #177009)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Matt Arsenault via llvm-commits
• [llvm] 54aadcd - [DebugInfo] Convert format() to formatv() in DWARFVerifier (#179194)   via llvm-commits
• [llvm] [DebugInfo] Convert format() to formatv() in DWARFVerifier (PR #179194)   Konrad Kleine via llvm-commits
• [llvm] 266a451 - [NewPM] Port x86-wineh-unwindv2 (#179172)   via llvm-commits
• [llvm] [NewPM] Port x86-wineh-unwindv2 (PR #179172)   Anshul Nigham via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   David Tenty via llvm-commits
• [llvm] [ScheduleDAG](NFC) Tidy up `ScheduleDAGTopologicalSort` implementation (PR #179256)   Nathan Corbyn via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Luke Lau via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Luke Lau via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Luke Lau via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Luke Lau via llvm-commits
• [libcxx] [llvm] [XRay] Add bounds check before memcpy in readBinaryFormatHeader (PR #178499)   via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [flang] [llvm] [mlir] [openmp] [MLIR][OpenMP] Add omp.fuse operation (PR #168898)   Ferran Toda via llvm-commits
• [llvm] [AMDGPU] Add DPP16 Row Share optimization for llvm.amdgcn.wave.shuffle (PR #177470)   Domenic Nutile via llvm-commits
• [llvm] [AMDGPU] Add DPP16 Row Share optimization for llvm.amdgcn.wave.shuffle (PR #177470)   Domenic Nutile via llvm-commits
• [llvm] [AMDGPU] Add DPP16 Row Share optimization for llvm.amdgcn.wave.shuffle (PR #177470)   Domenic Nutile via llvm-commits
• [llvm] [Offload] Only issue a warning for building `offload` on the GPU and return (PR #179240)   Joseph Huber via llvm-commits
• [llvm] [Github] Fully remove use of login_or_token (PR #179258)   Aiden Grossman via llvm-commits
• [llvm] [Github] Fully remove use of login_or_token (PR #179258)   via llvm-commits
• [llvm] [Github] Fully remove use of login_or_token (PR #179258)   via llvm-commits
• [llvm] [libcxx][Github] Remove use of deprecated login_or_token (PR #179260)   Aiden Grossman via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Add DPP16 Row Share optimization for llvm.amdgcn.wave.shuffle (PR #177470)   Domenic Nutile via llvm-commits
• [llvm] [libcxx][Github] Remove use of deprecated login_or_token (PR #179260)   via llvm-commits
• [llvm] [libcxx][Github] Remove use of deprecated login_or_token (PR #179260)   via llvm-commits
• [llvm] [NFC][LoopDistribute] Add test for doubly nested loop (PR #179263)   Madhur Amilkanthwar via llvm-commits
• [llvm] [NFC][LoopDistribute] Add test for doubly nested loop (PR #179263)   via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   via llvm-commits
• [llvm] [SPIRV] Extend lowering of variadic functions (PR #178980)   Nick Sarnie via llvm-commits
• [llvm] [GlobalISel][LLT] Introduce FPInfo for LLT (Enable bfloat, ppc128float and others in GlobalISel) (PR #155107)   via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [InstCombine][profcheck] Preserve !prof data when folding frexp of select. (PR #178484)   Snehasish Kumar via llvm-commits
• [llvm] [InstCombine][profcheck] Preserve !prof data when folding frexp of select. (PR #178484)   Snehasish Kumar via llvm-commits
• [llvm] [InstCombine][profcheck] Preserve !prof data when folding frexp of select. (PR #178484)   Snehasish Kumar via llvm-commits
• [llvm] [True16] Make loads into s16 legal in GlobalISel (PR #176963)   Domenic Nutile via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   Shilei Tian via llvm-commits
• [llvm] [True16] Make loads into s16 legal in GlobalISel (PR #176963)   Domenic Nutile via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for fptoi and itofp (PR #176300)   Syadus Sefat via llvm-commits
• [llvm] [RISC-V][Mach-O] Add codegen support for Mach-O object format. (PR #178263)   Francesco Petrogalli via llvm-commits
• [llvm] Revert "[SPIRV] Emit intrinsics for globals only in function that references them (#178143 (PR #179268)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] Revert "[SPIRV] Emit intrinsics for globals only in function that references them (#178143 (PR #179268)   via llvm-commits
• [llvm] [LLVM][Intrinsics] Allow IIT fixed encoding table to be 32-bit (PR #178531)   Rahul Joshi via llvm-commits
• [llvm] [VPlan] Introduce VPNumProcessedElementsPHIRecipe for variable-length stepping (PR #177114)   Andrei Elovikov via llvm-commits
• [llvm] [LLVM][Intrinsics] Allow IIT fixed encoding table to be 32-bit (PR #178531)   Rahul Joshi via llvm-commits
• [llvm] Revert "[SPIRV] Emit intrinsics for globals only in function that references them (#178143 (PR #179268)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][TableGen] Adopt `IfDefEmitter` in `CompressInstEmitter` (PR #178998)   Rahul Joshi via llvm-commits
• [llvm] Revert "[SPIRV] Emit intrinsics for globals only in function that references them (#178143 (PR #179268)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] dc8d35a - [NFC][TableGen] Adopt `IfDefEmitter` in `CompressInstEmitter` (#178998)   via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   Jonathan Thackray via llvm-commits
• [llvm] [NFC][TableGen] Adopt `IfDefEmitter` in `RegBankEmitter` (PR #179014)   Rahul Joshi via llvm-commits
• [llvm] Revert "[SPIRV] Emit intrinsics for globals only in function that references them (#178143) (PR #179268)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [llvm] [NFC][TableGen] Adopt `IfDefEmitter` in `RegBankEmitter` (PR #179014)   via llvm-commits
• [llvm] [SPIRV] Emit intrinsics for globals only in function that references them (PR #178143)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][TableGen] Adopt `IfDefEmitter` in `RegBankEmitter` (PR #179014)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Adopt `IfDefEmitter` in `RegBankEmitter` (PR #179014)   Rahul Joshi via llvm-commits
• [llvm] [RISCV] Enable select optimization by default (PR #178394)   Craig Topper via llvm-commits
• [llvm] Revert "[SPIRV] Emit intrinsics for globals only in function that references them (#178143) (PR #179268)   Nick Sarnie via llvm-commits
• [llvm] Fix grammar in comments (PR #179269)   via llvm-commits
• [llvm] Fix grammar in comments (PR #179269)   via llvm-commits
• [llvm] Fix grammar in comments (PR #179269)   via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Andrei Elovikov via llvm-commits
• [llvm] Fix grammar in comments (PR #179269)   via llvm-commits
• [llvm] [Hexagon] Fix use-after-poison in balanceSubTree (PR #179239)   Brian Cain via llvm-commits
• [llvm] [NFC][LoopUnroll] Add `-unroll-runtime-other-exit-predictable=false` to `unroll-multi-exit-loop-heuristics.ll` (PR #179198)   Joel E. Denny via llvm-commits
• [llvm] fa675aa - [NFC][LoopUnroll] Add `-unroll-runtime-other-exit-predictable=false` to `unroll-multi-exit-loop-heuristics.ll` (#179198)   via llvm-commits
• [llvm] [NFC][LoopUnroll] Add `-unroll-runtime-other-exit-predictable=false` to `unroll-multi-exit-loop-heuristics.ll` (PR #179198)   Joel E. Denny via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in RegInfoEmitter (PR #179017)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in RegInfoEmitter (PR #179017)   Rahul Joshi via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   via llvm-commits
• [llvm] Revert "[SPIRV] Emit intrinsics for globals only in function that references them (#178143) (PR #179268)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in RegInfoEmitter (PR #179017)   via llvm-commits
• [llvm] [True16] Make loads into s16 legal in GlobalISel (PR #176963)   Domenic Nutile via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in RegInfoEmitter (PR #179017)   Rahul Joshi via llvm-commits
• [llvm] [True16] Make loads into s16 legal in GlobalISel (PR #176963)   Domenic Nutile via llvm-commits
• [llvm] Revert "[SPIRV] Emit intrinsics for globals only in function that references them (#178143) (PR #179268)   Dmitry Sidorov via llvm-commits
• [llvm] [CMake] Update "all" project/runtimes (PR #179270)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [AMDGPU] Fix missing waitcnt after buffer_wbl2 (PR #178316)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Fix missing waitcnt after buffer_wbl2 (PR #178316)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Fix missing waitcnt after buffer_wbl2 (PR #178316)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Fix missing waitcnt after buffer_wbl2 (PR #178316)   Austin Kerbow via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [CMake] Update "all" project/runtimes (PR #179270)   Joseph Huber via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   Shilei Tian via llvm-commits
• [llvm] [AArch64][SME] Limit where SME ABI optimizations apply (PR #179273)   Benjamin Maxwell via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   Shilei Tian via llvm-commits
• [clang] [llvm] [AArch64][SME] Simplify SME ABI pass (revert cross-block optimizations) (PR #179204)   Benjamin Maxwell via llvm-commits
• [clang] [llvm] [AArch64][SME] Simplify SME ABI pass (revert cross-block optimizations) (PR #179204)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Move the existing fcvt fixed point selection to tblgen. (PR #178603)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Move the existing fcvt fixed point selection to tblgen. (PR #178603)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64] Move the existing fcvt fixed point selection to tblgen. (PR #178603)   Cullen Rhodes via llvm-commits
• [llvm] [AMDGPU][True16] t16 pseudo for mubuffer d16 load/store (PR #178822)   Brox Chen via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Move eventCounter() function (PR #178949)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Move eventCounter() function (PR #178949)   via llvm-commits
• [llvm] [AArch64] Remove propagation step from MachineSMEABIPass (PR #173282)   Benjamin Maxwell via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Andrei Elovikov via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Pankaj Dwivedi via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Andrei Elovikov via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   via llvm-commits
• [llvm] [Hexagon] Fix use-after-poison in balanceSubTree (PR #179239)   Sumanth Gundapaneni via llvm-commits
• [llvm] AMDGPU: Add nofpclass when expanding pow (PR #177933)   Matt Arsenault via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Pankaj Dwivedi via llvm-commits
• [llvm] [RISCV] Enable select optimization by default (PR #178394)   Luke Lau via llvm-commits
• [llvm] [cmake] Introduce LLVM_DISABLE_PROJECTS to easily exclude projects (PR #141535)   Joseph Huber via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Andrei Elovikov via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] 09a6842 - [ARM] Lower unaligned loads/stores to aeabi functions. (#172672)   via llvm-commits
• [llvm] [ARM] Lower unaligned loads/stores to aeabi functions. (PR #172672)   Simi Pallipurath via llvm-commits
• [compiler-rt] 39413af - [Compiler-rt] Implement AEABI Unaligned Read/Write Helpers in compiler-rt (#167913)   via llvm-commits
• [compiler-rt] [Compiler-rt] Implement AEABI Unaligned Read/Write Helpers in compiler-rt (PR #167913)   Simi Pallipurath via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] 395858d - Revert "[SPIRV] Emit intrinsics for globals only in function that references them (#178143 (#179268)   via llvm-commits
• [llvm] Revert "[SPIRV] Emit intrinsics for globals only in function that references them (#178143) (PR #179268)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SYCL] Add sycl::device initial implementation (PR #176972)   Artur Gainullin via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Luke Lau via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   via llvm-commits
• [llvm] [SimplifyCFG] Optimize select over pointers to eliminate no-op load/store (PR #179277)   via llvm-commits
• [llvm] [SimplifyCFG] Optimize select over pointers to eliminate no-op load/store (PR #179277)   via llvm-commits
• [llvm] [True16] Make loads into s16 legal in GlobalISel (PR #176963)   Petar Avramovic via llvm-commits
• [llvm] [SimplifyCFG] Optimize select over pointers to eliminate no-op load/store (PR #179277)   via llvm-commits
• [llvm] [SimplifyCFG] Optimize select over pointers to eliminate no-op load/store (PR #179277)   via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   via llvm-commits
• [llvm] `dwarf2yaml.cpp` optimizations (PR #179048)   via llvm-commits
• [llvm] Revert "[SPIRV] Emit intrinsics for globals only in function that references them (#178143) (PR #179268)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for fptoi and itofp (PR #176300)   Petar Avramovic via llvm-commits
• [llvm] [NewPM] Port x86-wineh-unwindv2 (PR #179172)   Anshul Nigham via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [llvm] [ARM] Enable creation of ARMISD::CMN nodes (PR #163223)   via llvm-commits
• [compiler-rt] Fix: windows i386 builtins tests (PR #179062)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Andrei Elovikov via llvm-commits
• [llvm] [ARM] Add new test that will demonstrate the cmn node in the ARM backend (NFC) (PR #179282)   via llvm-commits
• [llvm] [ARM] Set operation action for UMULO and SMULO as Custom if not Thumb1 (PR #154253)   via llvm-commits
• [llvm] [VPlan] Add `-vplan-print-after=` option (PR #178700)   Andrei Elovikov via llvm-commits
• [llvm] [ARM] Add new test that will demonstrate the cmn node in the ARM backend (NFC) (PR #179282)   via llvm-commits
• [llvm] [Windows][Support] Add helper to expand short 8.3 form paths (PR #178480)   Ben Dunbobbin via llvm-commits
• [llvm] [Windows][Support] Add helper to expand short 8.3 form paths (PR #178480)   Ben Dunbobbin via llvm-commits
• [llvm] [Windows][Support] Add helper to expand short 8.3 form paths (PR #178480)   Ben Dunbobbin via llvm-commits
• [llvm] [VPlan] Add `-vplan-print-after=` option (PR #178700)   Andrei Elovikov via llvm-commits
• [llvm] [Windows][Support] Add helper to expand short 8.3 form paths (PR #178480)   Ben Dunbobbin via llvm-commits
• [llvm] [NFC][TableGen] Adopt `IfDefEmitter` in `RegBankEmitter` (PR #179014)   Matt Arsenault via llvm-commits
• [llvm] [SimplifyCFG] Optimize select over pointers to eliminate no-op load/store (PR #179277)   via llvm-commits
• [llvm] [CostModel][X86] clmul.ll - add i16 and 128/256/512-bit vector cost tests (PR #179283)   Simon Pilgrim via llvm-commits
• [llvm] [Hexagon] Fix use-after-poison in balanceSubTree (PR #179239)   Brian Cain via llvm-commits
• [llvm] [CostModel][X86] clmul.ll - add i16 and 128/256/512-bit vector cost tests (PR #179283)   Simon Pilgrim via llvm-commits
• [llvm] Fold fneg through FP16_TO_FP and FP_TO_FP16 in getNegatedExpression. (PR #178865)   via llvm-commits
• [llvm] [CostModel][X86] clmul.ll - add i16 and 128/256/512-bit vector cost tests (PR #179283)   via llvm-commits
• [llvm] 96c45c0 - [LLVM][Intrinsics] Allow IIT fixed encoding table to be 32-bit (#178531)   via llvm-commits
• [llvm] [CostModel][X86] clmul.ll - add i16 and 128/256/512-bit vector cost tests (PR #179283)   via llvm-commits
• [llvm] [LLVM][Intrinsics] Allow IIT fixed encoding table to be 32-bit (PR #178531)   Rahul Joshi via llvm-commits
• [llvm] [LoopVectorize][LAA] Hoist load in memory IV to allow vectorization (PR #168312)   Felipe Magno de Almeida via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   Petar Avramovic via llvm-commits
• [llvm] 2d1110a - AMDGPU/GlobalISel: Regbanklegalize rules for G_UNMERGE_VALUES (#171653)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_UNMERGE_VALUES (PR #171653)   Petar Avramovic via llvm-commits
• [llvm] [offload] add properties to the olLaunchKernel (PR #176742)   Łukasz Plewa via llvm-commits
• [llvm] [ARM] Add new test that will demonstrate the cmn node in the ARM backend (NFC) (PR #179282)   via llvm-commits
• [llvm] [AArch64][SME] Limit where SME ABI optimizations apply (PR #179273)   via llvm-commits
• [llvm] [AArch64][SME] Limit where SME ABI optimizations apply (PR #179273)   via llvm-commits
• [llvm] [NewPM] Port x86-wineh-unwindv2 (PR #179172)   Aiden Grossman via llvm-commits
• [llvm] [AArch64] Test all needles when vectorising find_first_of loops. (PR #179298)   Ricardo Jesus via llvm-commits
• [clang] [llvm] [VectorCombine] Trim low end of loads used in shufflevector rebroadcasts. (PR #149093)   Simon Pilgrim via llvm-commits
• [llvm] InstCombine: Stop using nsz in multi-use min/max fold (PR #176579)   Yingwei Zheng via llvm-commits
• [llvm] [SPIRV] Extend lowering of variadic functions (PR #178980)   Joseph Huber via llvm-commits
• [llvm] [AArch64] Test all needles when vectorising find_first_of loops. (PR #179298)   via llvm-commits
• [llvm] [AArch64] Test all needles when vectorising find_first_of loops. (PR #179298)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   via llvm-commits
• [llvm] InstCombine: Stop using nsz in multi-use min/max fold (PR #176579)   Matt Arsenault via llvm-commits
• [llvm] 12731bd - InstCombine: Stop using nsz in multi-use min/max fold (#176579)   via llvm-commits
• [llvm] InstCombine: Stop using nsz in multi-use min/max fold (PR #176579)   Matt Arsenault via llvm-commits
• [llvm] [libcxx][Github] Remove use of deprecated login_or_token (PR #179260)   Nikolas Klauser via llvm-commits
• [llvm] 2ee37cc - Revert "[VectorCombine] Trim low end of loads used in shufflevector rebroadcasts. (#149093)"   Hans Wennborg via llvm-commits
• [llvm] [flang] Better "out of memory" error for failure to allocate a unit (PR #179291)   Eugene Epshteyn via llvm-commits
• [llvm] [WebAssembly] Combine shuffle and signed extend to extend_high (PR #179166)   via llvm-commits
• [llvm] [libcxx][Github] Remove use of deprecated login_or_token (PR #179260)   Aiden Grossman via llvm-commits
• [llvm] [AutoUpgrade] Prevent deletion of call if uses still exist (PR #177606)   Stefan Weigl-Bosker via llvm-commits
• [llvm] ValueTracking: Move powi logic to KnownFPClass (PR #179301)   Matt Arsenault via llvm-commits
• [llvm] [ArgPromotion] Add DW_CC_nocall to DISubprogram (PR #178973)   David Blaikie via llvm-commits
• [llvm] [ArgPromotion] Add DW_CC_nocall to DISubprogram (PR #178973)   David Blaikie via llvm-commits
• [llvm] [ArgPromotion] Add DW_CC_nocall to DISubprogram (PR #178973)   David Blaikie via llvm-commits
• [llvm] ValueTracking: Move powi logic to KnownFPClass (PR #179301)   Matt Arsenault via llvm-commits
• [llvm] [AutoUpgrade] Prevent deletion of call if uses still exist (PR #177606)   Kshitij Paranjape via llvm-commits
• [llvm] Fix data formatters for llvm::Expected<T> (PR #179294)   via llvm-commits
• [compiler-rt] [scudo] Add resident pages info to getStats (PR #178969)   via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   Simon Pilgrim via llvm-commits
• [llvm] [DirectX][ResourceAccess] Legalize resource handles into unique global resources (PR #176797)   Farzon Lotfi via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in RegInfoEmitter (PR #179017)   Sam Elliott via llvm-commits
• [llvm] Fix data formatters for llvm::Expected<T> (PR #179294)   via llvm-commits
• [llvm] [ARM] Custom Lowering for SADDO_CARRY and SSUBO_CARRY (PR #154419)   via llvm-commits
• [llvm] [Github] Prevent updates to python version in release binaries workflow (PR #179290)   Aiden Grossman via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 1 - Setup skeleton (PR #178796)   Demetrius Kanios via llvm-commits
• [clang] [llvm] [RISCV] Add SpacemiT A100 processor definition (PR #174052)   Craig Topper via llvm-commits
• [llvm] [llvm-readelf] --unwind: Support DW_EH_PE_sdata8 encoding (PR #179152)   Alexis Engelke via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add GISel handling for FCVT fixed. (PR #178903)   David Green via llvm-commits
• [llvm] InstCombine: Handle minnum/maxnum in SimplifyDemandedFPClass (PR #179299)   Matt Arsenault via llvm-commits
• [llvm] spirv: implement lowering for HLSL Texture2D sampling intrinsics (PR #179312)   Steven Perron via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Mircea Trofin via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Mircea Trofin via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Mircea Trofin via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Mircea Trofin via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Mircea Trofin via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #179304)   Justin Fargnoli via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #179304)   Justin Fargnoli via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #179304)   Justin Fargnoli via llvm-commits
• [llvm] [InstCombine] fold icmp ne (and X, 1), 0 --> trunc X to i1 (PR #178977)   Nikita Popov via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in RegInfoEmitter (PR #179017)   Rahul Joshi via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 1 - Setup skeleton (PR #178796)   Demetrius Kanios via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 1 - Setup skeleton (PR #178796)   Demetrius Kanios via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   via llvm-commits
• [llvm] [InstCombine] Fold select of intrinsic into intrinsic of select (PR #178002)   Aiden Grossman via llvm-commits
• [llvm] [RegAlloc] Change the computation of CSRCost (PR #177226)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Add GISel handling for FCVT fixed. (PR #178903)   David Green via llvm-commits
• [llvm] [InstCombine] Fold select of intrinsic into intrinsic of select (PR #178002)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold select of intrinsic into intrinsic of select (PR #178002)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary (PR #179318)   Dmitry Sidorov via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in RegInfoEmitter (PR #179017)   Rahul Joshi via llvm-commits
• [llvm] [AMDGPU] Introduce V_READANYLANE_B32 (PR #178312)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   via llvm-commits
• [llvm] [AMDGPU] Introduce V_READANYLANE_B32 (PR #178312)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary (PR #179318)   Dmitry Sidorov via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   via llvm-commits
• [llvm] Fix Bazel build for 4f9843b (PR #179321)   Anshul Nigham via llvm-commits
• [llvm] [AMDGPU] Introduce V_READANYLANE_B32 (PR #178312)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   via llvm-commits
• [llvm] dd5f6d7 - [RISCV] Split RISCVLSUMOP tablegen class for type safety. NFC   Craig Topper via llvm-commits
• [clang] [llvm] spirv: implement lowering for HLSL Texture2D sampling intrinsics (PR #179322)   Steven Perron via llvm-commits
• [llvm] Fix Bazel build for 4f9843b (PR #179321)   Aiden Grossman via llvm-commits
• [llvm] Fix Bazel build for 4f9843b (PR #179321)   Alina Sbirlea via llvm-commits
• [llvm] Add SDNodeFlag::NoConvergent (PR #179323)   Stanislav Mekhanoshin via llvm-commits
• [llvm] Add SDNodeFlag::NoConvergent (PR #179323)   Stanislav Mekhanoshin via llvm-commits
• [llvm] Add SDNodeFlag::NoConvergent (PR #179323)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] spirv: implement lowering for HLSL Texture2D sampling intrinsics (PR #179322)   Steven Perron via llvm-commits
• [llvm] Add SDNodeFlag::NoConvergent (PR #179323)   Matt Arsenault via llvm-commits
• [llvm] Fix Bazel build for 4f9843b (PR #179321)   Anshul Nigham via llvm-commits
• [llvm] Fix Bazel build for 4f9843b (PR #179321)   Anshul Nigham via llvm-commits
• [clang] [llvm] spirv: implement lowering for HLSL Texture2D sampling intrinsics (PR #179322)   Steven Perron via llvm-commits
• [llvm] Fix Bazel build for 4f9843b (PR #179321)   Anshul Nigham via llvm-commits
• [flang] [llvm] [mlir] [flang][openmp] Fix GPU byref reduction descriptor initialization (PR #178934)   Sunil Shrestha via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Make getWait() and getCounterRef() member functions (PR #178345)   via llvm-commits
• [llvm] [Matrix] Use tiled loops automatically for large kernels. (PR #179325)   Jon Roelofs via llvm-commits
• [llvm] [InstCombine] Extend canonicalization of addition to positive numbers (PR #179343)   via llvm-commits
• [llvm] [GOFF] Implement lowerConstant/emitGlobalVariables/emitGlobalAlias for z/OS (PR #169362)   Tony Tao via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Access Waitcnt elements using InstCounterType (PR #178345)   via llvm-commits
• [llvm] [RISC-V][Mach-O] Add codegen support for Mach-O object format. (PR #178263)   Sam Elliott via llvm-commits
• [llvm] [InstCombine] Extend canonicalization of addition to positive numbers (PR #179343)   via llvm-commits
• [llvm] Revert "[AutoUpgrade] Prevent deletion of call if uses still exist (#177606)" (PR #179340)   Stefan Weigl-Bosker via llvm-commits
• [llvm] [RISC-V][Mach-O] Add codegen support for Mach-O object format. (PR #178263)   Francesco Petrogalli via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Access Waitcnt elements using InstCounterType (PR #178345)   via llvm-commits
• [llvm] [ARM] Set operation action for UMULO and SMULO as Custom if not Thumb1 (PR #154253)   Eli Friedman via llvm-commits
• [llvm] [ARM] Set operation action for UMULO and SMULO as Custom if not Thumb1 (PR #154253)   Eli Friedman via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Access Waitcnt elements using InstCounterType (PR #178345)   via llvm-commits
• [llvm] Revert "[AutoUpgrade] Prevent deletion of call if uses still exist (#177606)" (PR #179340)   Stefan Weigl-Bosker via llvm-commits
• [llvm] 3c67dcb - [AMDGPU][SIInsertWaitcnts][NFC] Replace Wait.combined() with simple assignment (#179142)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Replace Wait.combined() with simple assignment (PR #179142)   via llvm-commits
• [llvm] [SelectionDAGISel][WIP] Separate the operand numbers in OPC_EmitNode/MorphNodeTo into their own table. (PR #178722)   Sam Elliott via llvm-commits
• [llvm] [RISC-V][Mach-O] Add codegen support for Mach-O object format. (PR #178263)   Jessica Clarke via llvm-commits
• [llvm] [SPIRV] Extend lowering of variadic functions (PR #178980)   Nick Sarnie via llvm-commits
• [llvm] Revert "[AutoUpgrade] Prevent deletion of call if uses still exist (#177606)" (PR #179340)   Stefan Weigl-Bosker via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Access Waitcnt elements using InstCounterType (PR #178345)   via llvm-commits
• [llvm] [AutoUpgrade] Prevent deletion of call if uses still exist (PR #177606)   Stefan Weigl-Bosker via llvm-commits
• [llvm] [Matrix] Check PHINode after dominance check when checking store addr. (PR #179349)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Florian Hahn via llvm-commits
• [llvm] Add SDNodeFlag::NoConvergent (PR #179323)   Stanislav Mekhanoshin via llvm-commits
• [polly] [Polly] Update isl to isl-0.27-77-g99a07a03 (PR #179350)   Michael Kruse via llvm-commits
• [llvm] Add SDNodeFlag::NoConvergent (PR #179323)   Stanislav Mekhanoshin via llvm-commits
• [polly] [Polly] Update isl to isl-0.27-77-g99a07a03 (PR #179350)   Michael Kruse via llvm-commits
• [llvm] Add SDNodeFlag::NoConvergent (PR #179323)   Stanislav Mekhanoshin via llvm-commits
• [llvm] Attributor: Add denormal-fp-math to attributor-light (PR #79576)   Matt Arsenault via llvm-commits
• [clang] [llvm] [win] Add a flag to control the Control Flow Guard mechanism on Windows (PR #176276)   Daniel Paoliello via llvm-commits
• [clang] [llvm] [RISCV] Add SpacemiT A100 processor definition (PR #174052)   Petr Penzin via llvm-commits
• [llvm] [InstCombine] Extend canonicalization of addition to positive numbers (PR #179343)   via llvm-commits
• [llvm] [InstCombine] Extend canonicalization of addition to positive numbers (PR #179343)   via llvm-commits
• [llvm] [InstCombine] Extend canonicalization of addition to positive numbers (PR #179343)   via llvm-commits
• [llvm] [SimplifyCFG][PGO] Add missing overflow check to ConstantFoldTerminator (PR #178964)   Paul Kirth via llvm-commits
• [llvm] [BOLT][AArch64] Add call relaxation pass (PR #173952)   Maksim Panchenko via llvm-commits
• [llvm] [SimplifyCFG][PGO] Add missing overflow check to ConstantFoldTerminator (PR #178964)   Paul Kirth via llvm-commits
• [llvm] workflows/commit-access-review: Use a GitHub App access token instead of llvmbot (PR #179364)   Tom Stellard via llvm-commits
• [llvm] workflows/commit-access-review: Use a GitHub App access token instead of llvmbot (PR #179364)   via llvm-commits
• [llvm] [AArch64][PAC] Mark $Scratch operand of AUTxMxN as earlyclobber (PR #173999)   Peter Collingbourne via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in RegInfoEmitter (PR #179017)   Rahul Joshi via llvm-commits
• [llvm] [LLVM][Intrinsics] Minor cleanup in getIntrinsicInfoTableEntries (PR #179317)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in IntrinsicEmitter (PR #179310)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in X86MnemonicEmitter (PR #179324)   Rahul Joshi via llvm-commits
• [llvm] [CodeGenPrepare][NFC] Reland: Update the dominator tree instead of rebuilding it (PR #179040)   Mingjie Xu via llvm-commits
• [llvm] [LoongArch] Fix fptoui.sat miscompilation with NaN inputs (PR #179366)   via llvm-commits
• [llvm] [LoongArch] Fix fptoui.sat miscompilation with NaN inputs (PR #179366)   via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   Phoebe Wang via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   Phoebe Wang via llvm-commits
• [llvm] [RISCV] Sink conversion from nfields/lmul to nf down one level in RISCVInstrInfoV.td. NFC (PR #179369)   Craig Topper via llvm-commits
• [llvm] [RISCV] Sink conversion from nfields/lmul to nf down one level in RISCVInstrInfoV.td. NFC (PR #179369)   via llvm-commits
• [llvm] [SimplifyCFG][PGO] Add missing overflow check to ConstantFoldTerminator (PR #178964)   Mitchel Dickerson via llvm-commits
• [llvm] [BOLT] Fix fixed pic handling in indirect jumps (PR #178578)   Haibo Jiang via llvm-commits
• [llvm] [RISCV] Sink conversion from nfields/lmul to nf down one level in RISCVInstrInfoV.td. NFC (PR #179369)   via llvm-commits
• [llvm] [TableGen][AsmMatcher] Fix optional operand mask indexing when HasMnemonicFirst is false (PR #176868)   via llvm-commits
• [llvm] [SimplifyCFG][PGO] Add missing overflow check to ConstantFoldTerminator (PR #178964)   Mitchel Dickerson via llvm-commits
• [llvm] [RISCV] Rename nf->nfields in MC layer. NFC (PR #179365)   Craig Topper via llvm-commits
• [llvm] [BasicBlockUtils] Fix dominator tree update for entry block in splitBlockBefore() (PR #178895)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [compiler-rt][common] Only unmap stacks the runtime has actually mapped (PR #179000)   Vitaly Buka via llvm-commits
• [llvm] Attributor: Add -light options to -attributor-enable flag (PR #179346)   Johannes Doerfert via llvm-commits
• [llvm] Attributor: Add -light options to -attributor-enable flag (PR #179346)   Johannes Doerfert via llvm-commits
• [llvm] Attributor: Add denormal-fp-math to attributor-light (PR #79576)   Johannes Doerfert via llvm-commits
• [llvm] 5cc4b05 - [AMDGPU] Add scheduling DAG mutation for hazard latencies (#170075)   via llvm-commits
• [llvm] [AMDGPU] Add scheduling DAG mutation for hazard latencies (PR #170075)   Carl Ritson via llvm-commits
• [llvm] [BOLT] Fix scavenge register after program point (PR #179207)   Haibo Jiang via llvm-commits
• [llvm] [AMDGPU] Return two MMOs for load-to-lds and store-from-lds intrinsics (PR #175845)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] Return two MMOs for load-to-lds and store-from-lds intrinsics (PR #175845)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] Return two MMOs for load-to-lds and store-from-lds intrinsics (PR #175845)   Nicolai Hähnle via llvm-commits
• [llvm] Revert "[BasicBlockUtils] Fix dominator tree update for entry block in splitBlockBefore() (#178895)" (PR #179373)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] WavePrefixSum intrinsic support (PR #167946)   via llvm-commits
• [llvm] Reland "[NVPTX][AtomicExpandPass] Complete support for AtomicRMW in NVPTX" (PR #179376)   Akshay Deodhar via llvm-commits
• [llvm] Reland "[NVPTX][AtomicExpandPass] Complete support for AtomicRMW in NVPTX" (PR #179376)   via llvm-commits
• [llvm] Reland "[NVPTX][AtomicExpandPass] Complete support for AtomicRMW in NVPTX" (PR #179376)   Alex MacLean via llvm-commits
• [llvm] [RISCV] Make MOP/HINT-based instruction mnemonics always available (PR #178609)   Kito Cheng via llvm-commits
• [llvm] [RISCV] Make MOP/HINT-based instruction mnemonics always available (PR #178609)   Kito Cheng via llvm-commits
• [llvm] [AMDGPU] Add scheduling DAG mutation for hazard latencies (PR #170075)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Support i8/i16 GEP indices when promoting allocas to vectors (PR #175489)   Harrison Hao via llvm-commits
• [llvm] [Hexagon] Fix a bug in setcc isnan lit test for f16 (PR #179338)   Brian Cain via llvm-commits
• [llvm] Reland "[NVPTX][AtomicExpandPass] Complete support for AtomicRMW in NVPTX" (PR #179376)   via llvm-commits
• [llvm] Reland "[NVPTX][AtomicExpandPass] Complete support for AtomicRMW in NVPTX" (PR #179376)   via llvm-commits
• [flang] [llvm] [mlir] [DONOTMERGE] Dev/xla jit code executor remote (PR #179385)   Muyao Xiao via llvm-commits
• [flang] [llvm] [mlir] [PR TO WRONG UPSTREAM][DONOTMERGE] (PR #179385)   Muyao Xiao via llvm-commits
• [llvm] [RISCV] Rename VUnitStrideLoadMask->VUnitStrideMaskLoad. NFC (PR #179360)   Pengcheng Wang via llvm-commits
• [llvm] [VPlan] Introduce VPNumProcessedElementsPHIRecipe for variable-length stepping (PR #177114)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add common base classes for loads/stores in RISCVInstrFormatsV.td. NFC (PR #179329)   Pengcheng Wang via llvm-commits
• [llvm] [NFC][TableGen] Adopt IfDefEmitter in TargetLibraryInfoEmitter (PR #179388)   Rahul Joshi via llvm-commits
• [llvm] [update_mc_test_checks] Fix llvm-mc invocation on Windows by avoiding echo pipe (PR #179381)   via llvm-commits
• [llvm] [RISCV] Pass EEW instead of log2(EEW) to RISCVVXMemOpMC. NFC (PR #179379)   Pengcheng Wang via llvm-commits
• [llvm] [VPlan] Detect and create partial reductions in VPlan. (NFCI) (PR #167851)   Shunsuke Watanabe via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [llvm] [NFC][TableGen] Adopt IfDefEmitter in TargetLibraryInfoEmitter (PR #179388)   via llvm-commits
• [llvm] [NFC][TableGen] Adopt IfDefEmitter in TargetLibraryInfoEmitter (PR #179388)   via llvm-commits
• [llvm] [RISCV] Run another VLOptimizer before machine SSA optimizations (PR #179377)   Craig Topper via llvm-commits
• [llvm] [update_mc_test_checks] Fix llvm-mc invocation on Windows by avoiding echo pipe (PR #179381)   Harrison Hao via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [llvm] [X86][GISEL] Enable PostLegalize Combiner (PR #174696)   via llvm-commits
• [llvm] [llvm-profgen] Support loading symbols from symtab for COFF (PR #179175)   Wei Wang via llvm-commits
• [llvm] [llvm-gsymutil]: print gsym function names for duplicates (PR #177524)   Ivan Babrou via llvm-commits
• [llvm] [X86AsmBackend] Check fixup value overflow (PR #176827)   Fangrui Song via llvm-commits
• [llvm] Reland "[BasicBlockUtils] Fix dominator tree update for entry block in splitBlockBefore() (#178895) (PR #179392)   Mingjie Xu via llvm-commits
• [llvm] Reland "[BasicBlockUtils] Fix dominator tree update for entry block in splitBlockBefore() (#178895) (PR #179392)   via llvm-commits
• [llvm] 26921d7 - [NewPM] Fix callsite for x86-lvi-ret (#179383)   via llvm-commits
• [llvm] [NewPM] Fix callsite for x86-lvi-ret (PR #179383)   Anshul Nigham via llvm-commits
• [clang] [llvm] [RISCV][llvm] Rename zvqdotq to zvdot4a8i (PR #179393)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV][llvm] Rename zvqdotq to zvdot4a8i (PR #179393)   via llvm-commits
• [clang] [llvm] [RISCV][llvm] Rename zvqdotq to zvdot4a8i (PR #179393)   via llvm-commits
• [clang] [llvm] [RISCV][llvm] Rename zvqdotq to zvdot4a8i (PR #179393)   via llvm-commits
• [clang] [llvm] [RISCV][llvm] Rename zvqdotq to zvdot4a8i (PR #179393)   via llvm-commits
• [clang] [llvm] [RISCV][llvm] Rename zvqdotq to zvdot4a8i (PR #179393)   Brandon Wu via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in IntrinsicEmitter (PR #179310)   Sam Elliott via llvm-commits
• [llvm] [BOLT][perf2bolt] Support multiple perf data inputs (PR #178202)   Amir Ayupov via llvm-commits
• [clang] [llvm] [RISCV][llvm] Rename zvqdotq to zvdot4a8i (PR #179393)   Nicolas Brunie via llvm-commits
• [clang] [llvm] [RISCV][llvm] Rename zvqdotq to zvdot4a8i (PR #179393)   Nicolas Brunie via llvm-commits
• [llvm] [RISCV] Add common base classes for loads/stores in RISCVInstrFormatsV.td. NFC (PR #179329)   Sam Elliott via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   via llvm-commits
• [llvm] [LSV] Support vectorization of mixed-type contiguous accesses (PR #177908)   Anshil Gandhi via llvm-commits
• [clang] [llvm] [RISCV][llvm] Rename zvqdotq to zvdot4a8i (PR #179393)   Brandon Wu via llvm-commits
• [clang] [llvm] [RISCV][llvm] Rename zvqdotq to zvdot4a8i (PR #179393)   Brandon Wu via llvm-commits
• [llvm] [SystemZ][GOFF] Implement lowerConstant (PR #179394)   Tony Tao via llvm-commits
• [clang] [llvm] [RISCV][llvm] Rename zvqdotq to zvdot4a8i (PR #179393)   Brandon Wu via llvm-commits
• [llvm] [SystemZ][GOFF] Implement lowerConstant (PR #179394)   via llvm-commits
• [llvm] [SystemZ][GOFF] Implement lowerConstant (PR #179394)   via llvm-commits
• [llvm] [RISCV] Run another VLOptimizer before machine SSA optimizations (PR #179377)   Luke Lau via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   via llvm-commits
• [clang] [llvm] [RISCV][llvm] Rename zvqdotq to zvdot4a8i (PR #179393)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Default all ISD opcodes to Expand for P extension. (PR #179396)   via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in X86MnemonicEmitter (PR #179324)   Craig Topper via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in X86MnemonicEmitter (PR #179324)   Craig Topper via llvm-commits
• [llvm] [AMDGPU][NPM] Add target-specific register allocation options (PR #178889)   Teja Alaghari via llvm-commits
• [llvm] [AMDGPU][NPM] Add target-specific register allocation options (PR #178889)   Teja Alaghari via llvm-commits
• [llvm] [AMDGPU][NPM] Add target-specific register allocation options (PR #178889)   Teja Alaghari via llvm-commits
• [llvm] Reland "[BasicBlockUtils] Fix dominator tree update for entry block in splitBlockBefore() (#178895) (PR #179392)   Mingjie Xu via llvm-commits
• [llvm] 7423017 - [RISCV] Add common base classes for loads/stores in RISCVInstrFormatsV.td. NFC (#179329)   via llvm-commits
• [llvm] [RISCV] Add common base classes for loads/stores in RISCVInstrFormatsV.td. NFC (PR #179329)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use RISCVWidth in interface for vector load/store classes in RISCVInstrFormatsV.td. NFC (PR #179348)   Craig Topper via llvm-commits
• [llvm] [NVPTX] Print PM Event Mask value as unsigned integer. (PR #178891)   Kirill Vedernikov via llvm-commits
• [llvm] [RISCV] Use RISCVWidth in interface for vector load/store classes in RISCVInstrFormatsV.td. NFC (PR #179348)   via llvm-commits
• [llvm] [X86] Don't fold offset into address mode in 16-bit mode (PR #179399)   Fangrui Song via llvm-commits
• [llvm] [X86] Don't fold offset into address mode in 16-bit mode (PR #179399)   via llvm-commits
• [llvm] [LSV] Support vectorization of mixed-type contiguous accesses (PR #177908)   Anshil Gandhi via llvm-commits
• [llvm] [TableGen][NFC] Use templated std::clamp (PR #179400)   Sam Elliott via llvm-commits
• [llvm] [TableGen][NFC] Use templated std::clamp (PR #179400)   via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)   via llvm-commits
• [llvm] [CodeGen][TII] Simplify analyzeSelect (PR #175828)   Sam Elliott via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Fangrui Song via llvm-commits
• [llvm] [CodeGen][TII] Simplify analyzeSelect (PR #175828)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Add common base classes for loads/stores in RISCVInstrFormatsV.td. NFC (PR #179329)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] Don't fold offset into address mode in 16-bit mode (PR #179399)   Phoebe Wang via llvm-commits
• [clang] [llvm] [RISCV][llvm] Rename zvqdotq to zvdot4a8i (PR #179393)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Default all ISD opcodes to Expand for P extension. (PR #179396)   Sam Elliott via llvm-commits
• [llvm] c2fca81 - [RISCV] Rename nf->nfields in MC layer. NFC (#179365)   via llvm-commits
• [llvm] [RISCV] Rename nf->nfields in MC layer. NFC (PR #179365)   Craig Topper via llvm-commits
• [llvm] [RISCV] Sink conversion from nfields/lmul to nf down one level in RISCVInstrInfoV.td. NFC (PR #179369)   Craig Topper via llvm-commits
• [llvm] 2dd75d9 - [RISCV] Rename VUnitStrideLoadMask->VUnitStrideMaskLoad. NFC (#179360)   via llvm-commits
• [llvm] [RISCV] Rename VUnitStrideLoadMask->VUnitStrideMaskLoad. NFC (PR #179360)   Craig Topper via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [llvm] [SelectionDAGISel][WIP] Separate the operand numbers in OPC_EmitNode/MorphNodeTo into their own table. (PR #178722)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV] Update Zvqdotq to v0.1 (PR #170648)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Update Zvqdotq to v0.1 (PR #170648)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [X86][APX] Disable PP2/PPX generation on Windows (PR #178122)   Phoebe Wang via llvm-commits
• [llvm] [BOLT] Fix fixed pic handling in indirect jumps (PR #178578)   Haibo Jiang via llvm-commits
• [llvm] [RISCV] Default all ISD opcodes to Expand for P extension. (PR #179396)   Brandon Wu via llvm-commits
• [clang] [llvm] [X86][APX] Disable PP2/PPX generation on Windows (PR #178122)   via llvm-commits
• [llvm] [RISCV] Sink conversion from nfields/lmul to nf down one level in RISCVInstrInfoV.td. NFC (PR #179369)   Craig Topper via llvm-commits
• [llvm] dfbf54a - [NVPTX] Print PM Event Mask value as unsigned integer. (#178891)   via llvm-commits
• [llvm] [NVPTX] Print PM Event Mask value as unsigned integer. (PR #178891)   Kirill Vedernikov via llvm-commits
• [clang] [llvm] [RISCV][llvm] Rename zvqdotq to zvdot4a8i (PR #179393)   Brandon Wu via llvm-commits
• [llvm] [RISCV] Pass EEW instead of log2(EEW) to RISCVVXMemOpMC. NFC (PR #179379)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Add folding ISD::SELECT from vXiY into vZi32 with X * Y = Z * 32 (PR #173328)   via llvm-commits
• [llvm] 42b1beb - [RISCV] Default all ISD opcodes to Expand for P extension. (#179396)   via llvm-commits
• [llvm] [RISCV] Default all ISD opcodes to Expand for P extension. (PR #179396)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add common base classes for loads/stores in RISCVInstrFormatsV.td. NFC (PR #179329)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Use RISCVWidth in interface for vector load/store classes in RISCVInstrFormatsV.td. NFC (PR #179348)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use RISCVWidth in interface for vector load/store classes in RISCVInstrFormatsV.td. NFC (PR #179348)   Craig Topper via llvm-commits
• [llvm] [X86] Don't fold offset into address mode in 16-bit mode (PR #179399)   Fangrui Song via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Islam Imad via llvm-commits
• [llvm] [X86] Restrict offset folding into address mode in 16-bit mode (PR #179399)   Fangrui Song via llvm-commits
• [llvm] [X86] Restrict offset folding into address mode in 16-bit mode (PR #179399)   Phoebe Wang via llvm-commits
• [llvm] [X86] Restrict offset folding into address mode in 16-bit mode (PR #179399)   Phoebe Wang via llvm-commits
• [llvm] [X86] Restrict offset folding into address mode in 16-bit mode (PR #179399)   Phoebe Wang via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Islam Imad via llvm-commits
• [llvm] [RISCV] Pass EEW instead of log2(EEW) to RISCVVXMemOpMC. NFC (PR #179379)   Luke Lau via llvm-commits
• [llvm] [VPlan] Sink recipes from the vector loop region in licm. (PR #168031)   Mel Chen via llvm-commits
• [llvm] [VPlan] Sink recipes from the vector loop region in licm. (PR #168031)   Mel Chen via llvm-commits
• [llvm] [VPlan] Sink recipes from the vector loop region in licm. (PR #168031)   Mel Chen via llvm-commits
• [llvm] [VPlan] Sink recipes from the vector loop region in licm. (PR #168031)   Mel Chen via llvm-commits
• [llvm] 49a2335 - [AMDGPU] Add SOPK, SOPC and SOPP encoding support for gfx13 (#179179)   via llvm-commits
• [llvm] [AMDGPU] Add SOPK, SOPC and SOPP encoding support for gfx13 (PR #179179)   Mariusz Sikora via llvm-commits
• [clang] [llvm] [RISCV][llvm] Rename zvqdotq to zvdot4a8i (PR #179393)   Craig Topper via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   via llvm-commits
• [llvm] [VPlan] Sink recipes from the vector loop region in licm. (PR #168031)   Mel Chen via llvm-commits
• [clang] [llvm] [RISCV][llvm] Rename zvqdotq to zvdot4a8i (PR #179393)   Craig Topper via llvm-commits
• [clang] [llvm] [RISCV][llvm] Rename zvqdotq to zvdot4a8i (PR #179393)   Craig Topper via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [llvm] [VPlan] Sink recipes from the vector loop region in licm. (PR #168031)   Mel Chen via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] [RISCV] Sink conversion from nfields/lmul to nf down one level in RISCVInstrInfoV.td. NFC (PR #179369)   Craig Topper via llvm-commits
• [llvm] 651a451 - [RISCV] Sink conversion from nfields/lmul to nf down one level in RISCVInstrInfoV.td. NFC (#179369)   via llvm-commits
• [llvm] [RISCV] Sink conversion from nfields/lmul to nf down one level in RISCVInstrInfoV.td. NFC (PR #179369)   Craig Topper via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding BB-embedding map API to ir2vec python bindings (PR #177172)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding inst-embedding map API to ir2vec python bindings (PR #177308)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] 4b59f79 - [RISCV] Pass EEW instead of log2(EEW) to RISCVVXMemOpMC. NFC (#179379)   via llvm-commits
• [llvm] [RISCV] Pass EEW instead of log2(EEW) to RISCVVXMemOpMC. NFC (PR #179379)   Craig Topper via llvm-commits
• [llvm] Reland "[BasicBlockUtils] Fix dominator tree update for entry block in splitBlockBefore() (#178895) (PR #179392)   Mingjie Xu via llvm-commits
• [llvm] [BasicBlockUtils] Fix loopinfo header in split block before (PR #179408)   Yevgeny Rouban via llvm-commits
• [llvm] [BasicBlockUtils] Fix loopinfo header in split block before (PR #179408)   via llvm-commits
• [llvm] [BasicBlockUtils] Fix loopinfo header in split block before (PR #179408)   via llvm-commits
• [llvm] Reland "[BasicBlockUtils] Fix dominator tree update for entry block in splitBlockBefore() (#178895) (PR #179392)   via llvm-commits
• [llvm] [RISCV] Use RISCVWidth in interface for vector load/store classes in RISCVInstrFormatsV.td. NFC (PR #179348)   Craig Topper via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] - Fix the simplification of GEP index when its operand is an XOR constant. (PR #175724)   Pawan Nirpal via llvm-commits
• [llvm] 287c69b - Attributor: Add denormal-fp-math to attributor-light (#79576)   via llvm-commits
• [llvm] Attributor: Add denormal-fp-math to attributor-light (PR #79576)   Matt Arsenault via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] - Fix the simplification of GEP index when its operand is an XOR constant. (PR #175724)   Pawan Nirpal via llvm-commits
• [llvm] 8c6658a - [VPlan] Sink recipes from the vector loop region in licm. (#168031)   via llvm-commits
• [llvm] [VPlan] Sink recipes from the vector loop region in licm. (PR #168031)   Mel Chen via llvm-commits
• [llvm] 751a546 - [HLSL][DXIL][SPIRV] WavePrefixSum intrinsic support (#167946)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] WavePrefixSum intrinsic support (PR #167946)   Farzon Lotfi via llvm-commits
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• [clang] [llvm] [HLSL][DXIL][SPIRV] WavePrefixSum intrinsic support (PR #167946)   Farzon Lotfi via llvm-commits
• [llvm] 22f5353 - [WebAssembly] Combine shuffle and signed extend to extend_high (#179166)   via llvm-commits
• [llvm] [WebAssembly] Combine shuffle and signed extend to extend_high (PR #179166)   via llvm-commits
• [llvm] [RISCV] Use RISCVWidth in interface for vector load/store classes in RISCVInstrFormatsV.td. NFC (PR #179348)   via llvm-commits
• [llvm] [RISCV] Use RISCVWidth in interface for vector load/store classes in RISCVInstrFormatsV.td. NFC (PR #179348)   via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   via llvm-commits
• [clang-tools-extra] [lld] [llvm] [Clangd][LIT][LLD] Fix Windows test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is enabled (PR #179410)   Junji Watanabe via llvm-commits
• [clang-tools-extra] [lld] [llvm] [Clangd][LIT][LLD] Fix Windows test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is enabled (PR #179410)   via llvm-commits
• [llvm] [RISCV] Use RISCVWidth in interface for vector load/store classes in RISCVInstrFormatsV.td. NFC (PR #179348)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Use RISCVWidth in interface for vector load/store classes in RISCVInstrFormatsV.td. NFC (PR #179348)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Use RISCVWidth in interface for vector load/store classes in RISCVInstrFormatsV.td. NFC (PR #179348)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Reschedule loads in clauses to improve throughput (PR #102595)   Carl Ritson via llvm-commits
• [llvm] [llvm-ir2vec] adding inst-embedding map API to ir2vec python bindings (PR #177308)   via llvm-commits
• [llvm] [AMDGPU] Reschedule loads in clauses to improve throughput (PR #102595)   Carl Ritson via llvm-commits
• [llvm] [LV] Optimize FindLast recurrences to FindIV (NFCI). (PR #177870)   Mel Chen via llvm-commits
• [llvm] [BasicBlockUtils] Fix loopinfo header in split block before (PR #179408)   via llvm-commits
• [llvm] [BasicBlockUtils] Fix loopinfo header in split block before (PR #179408)   via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Pierre van Houtryve via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Pierre van Houtryve via llvm-commits
• [llvm] [llvm-ir2vec] adding BB-embedding map API to ir2vec python bindings (PR #177172)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add tbuffer store d16 RegBankLegalize rule (PR #179411)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add tbuffer store d16 RegBankLegalize rule (PR #179411)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add tbuffer store d16 RegBankLegalize rule (PR #179411)   via llvm-commits
• [clang-tools-extra] [lld] [llvm] [Clangd][LIT][LLD] Fix Windows test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is enabled (PR #179410)   Junji Watanabe via llvm-commits
• [clang-tools-extra] [lld] [llvm] [Clangd][LIT][LLD] Fix Windows test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is enabled (PR #179410)   Junji Watanabe via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Marcos Maronas via llvm-commits
• [llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)   Pierre van Houtryve via llvm-commits
• [llvm] [SimplifyCFG] Optimize select over pointers to eliminate no-op load/store (PR #179277)   via llvm-commits
• [llvm] [SimplifyCFG] Optimize select over pointers to eliminate no-op load/store (PR #179277)   via llvm-commits
• [llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)   via llvm-commits
• [llvm] [NFC][llvm][docs] Fix alphabetical order of commands (PR #178519)   James Henderson via llvm-commits
• [llvm] [NFC][llvm][docs] Fix alphabetical order of commands (PR #178519)   James Henderson via llvm-commits
• [llvm] [NFC][llvm][docs] Fix alphabetical order of commands (PR #178519)   James Henderson via llvm-commits
• [llvm] [RISCV] optimize vector combine in fold binop of reduction (PR #179416)   via llvm-commits
• [llvm] [RISCV] optimize vector combine in fold binop of reduction (PR #179416)   via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [X86] Restrict offset folding into address mode in 16-bit mode (PR #179399)   Alexander Kornienko via llvm-commits
• [clang-tools-extra] [lld] [llvm] [Clangd][LIT][LLD] Fix Windows test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is enabled (PR #179410)   Junji Watanabe via llvm-commits
• [llvm] [RISCV] optimize vector combine in fold binop of reduction (PR #179416)   via llvm-commits
• [clang-tools-extra] [lld] [llvm] [Clangd][LIT][LLD] Fix Windows test failures when LLVM_WINDOWS_PREFER_FORWARD_SLASH is enabled (PR #179410)   Junji Watanabe via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   Abhishek Kaushik via llvm-commits
• [llvm] [RISCV] optimize vector combine in fold binop of reduction (PR #179416)   via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   James Henderson via llvm-commits
• [llvm] [llvm][AsmPrinter] Call graph section Flag field enum (PR #176309)   James Henderson via llvm-commits
• [clang-tools-extra] [lld] [llvm] [Clangd][LIT][LLD] Fix Windows test failures due to path separator mismatches (PR #179410)   Junji Watanabe via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   via llvm-commits
• [clang-tools-extra] [lld] [llvm] [Clangd][LIT][LLD] Fix Windows test failures due to path separator mismatches (PR #179410)   Junji Watanabe via llvm-commits
• [clang-tools-extra] [lld] [llvm] [Clangd][LIT][LLD] Fix Windows test failures due to path separator mismatches (PR #179410)   Junji Watanabe via llvm-commits
• [llvm] [LSV] Support vectorization of mixed-type contiguous accesses (PR #177908)   Anshil Gandhi via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Mel Chen via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Mel Chen via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Mel Chen via llvm-commits
• [llvm] [LSV] Support vectorization of mixed-type contiguous accesses (PR #177908)   Anshil Gandhi via llvm-commits
• [llvm] OCaml bindings: Remove `ctypes` dependency (PR #179417)   Nicolás Ojeda Bär via llvm-commits
• [llvm] OCaml bindings: Remove `ctypes` dependency (PR #179417)   via llvm-commits
• [llvm] [AArch64] Test all needles when vectorising find_first_of loops. (PR #179298)   David Sherwood via llvm-commits
• [llvm] [AMDGPU] Add SOPK, SOPC and SOPP encoding support for gfx13 (PR #179179)   LLVM Continuous Integration via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [SelectionDAG] Use promoted types when creating nodes after type legalization (PR #178617)   via llvm-commits
• [llvm] [SimplifyCFG] Optimize select over pointers to eliminate no-op load/store (PR #179277)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [AMDGPU] Reschedule loads in clauses to improve throughput (PR #102595)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [BasicBlockUtils] Fix loopinfo header in split block before (PR #179408)   Nikita Popov via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [BasicBlockUtils] Fix loopinfo header in split block before (PR #179408)   Yevgeny Rouban via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [LSV] Support vectorization of mixed-type contiguous accesses (PR #177908)   Anshil Gandhi via llvm-commits
• [llvm] [BasicBlockUtils] Fix loopinfo header in split block before (PR #179408)   Yevgeny Rouban via llvm-commits
• [llvm] [LSV] Support vectorization of mixed-type contiguous accesses (PR #177908)   Anshil Gandhi via llvm-commits
• [llvm] [LSV] Support vectorization of mixed-type contiguous accesses (PR #177908)   Anshil Gandhi via llvm-commits
• [clang-tools-extra] [lld] [llvm] [Clangd][LIT][LLD] Fix Windows test failures due to path separator mismatches (PR #179410)   Junji Watanabe via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   Abhishek Kaushik via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Allow hoising of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Sameer Sahasrabuddhe via llvm-commits
• [clang-tools-extra] [lld] [llvm] [Clangd][LIT][LLD] Fix Windows test failures due to path separator mismatches (PR #179410)   Junji Watanabe via llvm-commits
• [clang-tools-extra] [lld] [llvm] [Clangd][LIT][LLD] Fix Windows test failures due to path separator mismatches (PR #179410)   Takuto Ikuta via llvm-commits
• [llvm] [SelectionDAG] Use promoted types when creating nodes after type legalization (PR #178617)   Simon Pilgrim via llvm-commits
• [llvm] [Uniformity] Avoid marking all PHIs as divergent in join blocks (PR #157808)   Carl Ritson via llvm-commits
• [llvm] [SelectionDAG] Use promoted types when creating nodes after type legalization (PR #178617)   Simon Pilgrim via llvm-commits
• [llvm] [Uniformity] Avoid marking all PHIs as divergent in join blocks (PR #157808)   Carl Ritson via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Access Waitcnt elements using InstCounterType (PR #178345)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Access Waitcnt elements using InstCounterType (PR #178345)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Access Waitcnt elements using InstCounterType (PR #178345)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Access Waitcnt elements using InstCounterType (PR #178345)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Access Waitcnt elements using InstCounterType (PR #178345)   Jay Foad via llvm-commits
• [llvm] f95b63b - [llvm][OpenMP] Allow Chunk Size on SIMD Guided (#178853)   via llvm-commits
• [llvm] [mlir] [llvm][OpenMP] Allow Chunk Size on SIMD Guided (PR #178853)   Jack Styles via llvm-commits
• [llvm] [AMDGPU] Teach SIPreEmitPeephole pass to preserve MachineLoopInfo (PR #178868)   Dark Steve via llvm-commits
• [llvm] [LLVM][Intrinsics] Minor cleanup in getIntrinsicInfoTableEntries (PR #179317)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Teach SIPreEmitPeephole pass to preserve MachineLoopInfo (PR #178868)   Dark Steve via llvm-commits
• [llvm] [AArch64][SME] Limit where SME ABI optimizations apply (PR #179273)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Limit where SME ABI optimizations apply (PR #179273)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Limit where SME ABI optimizations apply (PR #179273)   Sander de Smalen via llvm-commits
• [llvm] [AArch64][SME] Limit where SME ABI optimizations apply (PR #179273)   Sander de Smalen via llvm-commits
• [llvm] [AMDGPU] Fix missing waitcnt after buffer_wbl2 (PR #178316)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix missing waitcnt after buffer_wbl2 (PR #178316)   Jay Foad via llvm-commits
• [llvm] [AArch64] Extend condition optimizer to support unsigned comparisons (PR #144380)   David Green via llvm-commits
• [llvm] [AArch64] Extend condition optimizer to support unsigned comparisons (PR #144380)   David Green via llvm-commits
• [llvm] [AArch64][SelectionDAG] Only fold into ands directly if AND is one-use (PR #167371)   David Green via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   S. VenkataKeerthy via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Jay Foad via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   S. VenkataKeerthy via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding BB-embedding map API to ir2vec python bindings (PR #177172)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding inst-embedding map API to ir2vec python bindings (PR #177308)   Nishant Sachdeva via llvm-commits
• [llvm] [AArch64][SME] Limit where SME ABI optimizations apply (PR #179273)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Limit where SME ABI optimizations apply (PR #179273)   Benjamin Maxwell via llvm-commits
• [llvm] [BasicBlockUtils] Fix loopinfo header in split block before (PR #179408)   Yevgeny Rouban via llvm-commits
• [llvm] [AArch64][SME] Limit where SME ABI optimizations apply (PR #179273)   Benjamin Maxwell via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Jay Foad via llvm-commits
• [llvm] 38e280d - [SelectionDAG] Use promoted types when creating nodes after type legalization (#178617)   via llvm-commits
• [llvm] [SelectionDAG] Use promoted types when creating nodes after type legalization (PR #178617)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [SelectionDAG] Use promoted types when creating nodes after type legalization (PR #178617)   via llvm-commits
• [llvm] [SelectionDAG] Use promoted types when creating nodes after type legalization (PR #178617)   via llvm-commits
• [llvm] Re-apply "[AMDGPU][Scheduler] Scoring system for rematerializations (#175050)" (PR #177206)   Mikael Holmen via llvm-commits
• [llvm] [SelectionDAG] Use promoted types when creating nodes after type legalization (PR #178617)   via llvm-commits
• [llvm] Attributor: Add -light options to -attributor-enable flag (PR #179346)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Add -light options to -attributor-enable flag (PR #179346)   via llvm-commits
• [llvm] Attributor: Add -light options to -attributor-enable flag (PR #179346)   Matt Arsenault via llvm-commits
• [llvm] 6d15d1c - [CMake] Update "all" project/runtimes (#179270)   via llvm-commits
• [llvm] [CMake] Update "all" project/runtimes (PR #179270)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] Attributor: Add -light options to -attributor-enable flag (PR #179346)   Florian Hahn via llvm-commits
• [llvm] Reland "[BasicBlockUtils] Fix dominator tree update for entry block in splitBlockBefore() (#178895) (PR #179392)   Nikita Popov via llvm-commits
• [llvm] e706614 - [Analysis][CostModel] Add insert-extract runlines for Apple CPUs (NFC) (#179236)   via llvm-commits
• [llvm] [Analysis][CostModel] Add insert-extract runlines for Apple CPUs (NFC) (PR #179236)   Tomer Shafir via llvm-commits
• [llvm] [CoroCleanup] Noop coroutine elision for load-and-call pattern (PR #179154)   via llvm-commits
• [llvm] [SimplifyCFG] Optimize select over pointers to eliminate no-op load/store (PR #179277)   Nikita Popov via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] WavePrefixProduct intrinsic support (PR #179423)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] WavePrefixProduct intrinsic support (PR #179423)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] WavePrefixProduct intrinsic support (PR #179423)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] WavePrefixProduct intrinsic support (PR #179423)   via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Marcos Maronas via llvm-commits
• [llvm] 5121780 - [AArch64] Fix cttz.elts codegen for fixed-length vectors (#178902)   via llvm-commits
• [llvm] [AArch64] Fix cttz.elts codegen for fixed-length vectors (PR #178902)   Graham Hunter via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Mel Chen via llvm-commits
• [llvm] [BOLT] Fix fixed pic handling in indirect jumps (PR #178578)   Alexey Moksyakov via llvm-commits
• [llvm] [VPlan] Delay header mask creation until after blend recipes generation (PR #178623)   Mel Chen via llvm-commits
• [llvm] [VPlan] Delay header mask creation until after blend recipes generation (PR #178623)   Mel Chen via llvm-commits
• [llvm] [LoongArch] Fix fptoui.sat miscompilation with NaN inputs (PR #179366)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Simplify true && x -> x (PR #179426)   Mel Chen via llvm-commits
• [llvm] [VPlan] Delay header mask creation until after blend recipes generation (PR #178623)   Mel Chen via llvm-commits
• [llvm] [VPlan] Simplify true && x -> x (PR #179426)   via llvm-commits
• [llvm] [SimplifyCFG] Optimize select over pointers to eliminate no-op load/store (PR #179277)   via llvm-commits
• [compiler-rt] Fix: windows i386 builtins tests (PR #179062)   Hans Wennborg via llvm-commits
• [llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)   Matt Arsenault via llvm-commits
• [llvm] 871c643 - Attributor: Add -light options to -attributor-enable flag (#179346)   via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AArch64][GlobalISel] Add GISel handling for FCVT fixed. (PR #178903)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64][GlobalISel] Add GISel handling for FCVT fixed. (PR #178903)   Cullen Rhodes via llvm-commits
• [llvm] Attributor: Add -light options to -attributor-enable flag (PR #179346)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Luke Lau via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   Florian Hahn via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   Florian Hahn via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   Florian Hahn via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Ralf Jung via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Ralf Jung via llvm-commits
• [llvm] [SimplifyCFG] Optimize select over pointers to eliminate no-op load/store (PR #179277)   via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Ralf Jung via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Manuel Carrasco via llvm-commits
• [llvm] [LoongArch] Fix fptoui.sat miscompilation with NaN inputs (PR #179366)   Zhaoxin Yang via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [BOLT] Correctly handle entry point at FDE boundaries (PR #176173)   Elvina Yakubova via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU][NPM] Add target-specific register allocation options (PR #178889)   Matt Arsenault via llvm-commits
• [llvm] [LoongArch] Fix fptoui.sat miscompilation with NaN inputs (PR #179366)   Nikita Popov via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   Chandana Mudda via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Return two MMOs for load-to-lds and store-from-lds intrinsics (PR #175845)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Simplify true && x -> x (PR #179426)   Luke Lau via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   Julian Pokrovsky via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   via llvm-commits
• [llvm] [VPlan] Simplify true && x -> x (PR #179426)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   Julian Pokrovsky via llvm-commits
• [llvm] Reland "[CoroCleanup] Noop coroutine elision for load-and-call pattern (#179154)" (PR #179431)   Weibo He via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Stanislav Mekhanoshin via llvm-commits
• [llvm] Reland "[CoroCleanup] Noop coroutine elision for load-and-call pattern (#179154)" (PR #179431)   via llvm-commits
• [llvm] Reland "[CoroCleanup] Noop coroutine elision for load-and-call pattern (#179154)" (PR #179431)   via llvm-commits
• [llvm] [CoroCleanup] Noop coroutine elision for load-and-call pattern (PR #179154)   Weibo He via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add tbuffer store d16 RegBankLegalize rule (PR #179411)   Matt Arsenault via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Lleu Yang via llvm-commits
• [llvm] [AMDGPU] Serialize disjoint MFMA chains to hide DS_READ latency (PR #170242)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)   Pierre van Houtryve via llvm-commits
• [llvm] [InstCombine] Bubble left spliced reverses of binop operands to their result (PR #179432)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Bubble left spliced reverses of binop operands to their result (PR #179432)   via llvm-commits
• [llvm] [InstCombine] Bubble right spliced reverses of binop operands to their result (PR #179432)   Luke Lau via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Lleu Yang via llvm-commits
• [llvm] [VectorCombine] Optimize vector combine in fold binop of reduction (PR #179416)   Pengcheng Wang via llvm-commits
• [polly] [Polly] Use GenDT in assertion (PR #179433)   Michael Kruse via llvm-commits
• [polly] [Polly] Use GenDT in assertion (PR #179433)   Michael Kruse via llvm-commits
• [llvm] [InstCombine] Bubble right spliced reverses of binop operands to their result (PR #179432)   via llvm-commits
• [llvm] [LoongArch] Fix fptoui.sat miscompilation with NaN inputs (PR #179366)   Zhaoxin Yang via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] WavePrefixProduct intrinsic support (PR #179423)   via llvm-commits
• [llvm] [VPlan] Simplify true && x -> x (PR #179426)   Florian Hahn via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] WavePrefixProduct intrinsic support (PR #179423)   via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   Julian Pokrovsky via llvm-commits
• [llvm] [AMDGPU] Loads to LDS should not increase `lgkmcnt` (PR #179305)   Matt Arsenault via llvm-commits
• [llvm] [Docs] typo settting to setting (PR #178665)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [Docs] typo settting to setting (PR #178665)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   Alex Wang via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Lleu Yang via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Lleu Yang via llvm-commits
• [polly] 347e21a - [Polly] Use GenDT in assertion (#179433)   via llvm-commits
• [polly] [Polly] Use GenDT in assertion (PR #179433)   Michael Kruse via llvm-commits
• [llvm] c7408d1 - [AMDGPU][SROA] Unify cast chain implementations (#177945)   via llvm-commits
• [llvm] [AMDGPU][SROA] Unify cast chain implementations (PR #177945)   Marcos Maronas via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   Jonathan Thackray via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Sander de Smalen via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Sander de Smalen via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Sander de Smalen via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Sander de Smalen via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Sander de Smalen via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Sander de Smalen via llvm-commits
• [llvm] [NFC][AArch64] Split fptoi tests and add scal_to_vec convert tests (PR #179315)   via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Luke Lau via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FSINCOS (PR #179053)   Viktoria Maximova via llvm-commits
• [llvm] 79eb804 - [AArch64][SME] Limit where SME ABI optimizations apply (#179273)   via llvm-commits
• [llvm] [AArch64][SME] Limit where SME ABI optimizations apply (PR #179273)   Benjamin Maxwell via llvm-commits
• [llvm] [InstCombine] Bubble right spliced reverses of binop operands to their result (PR #179432)   Luke Lau via llvm-commits
• [llvm] Re-apply "[AMDGPU][Scheduler] Scoring system for rematerializations (#175050)" (PR #177206)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU] Loads to LDS should not increase `lgkmcnt` (PR #179305)   Jay Foad via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   Alex Wang via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   via llvm-commits
• [llvm] [AMDGPU][NPM] Add target-specific register allocation options (PR #178889)   Teja Alaghari via llvm-commits
• [llvm] [AArch64][SME] Limit where SME ABI optimizations apply (PR #179273)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Simon Pilgrim via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Simon Pilgrim via llvm-commits
• [llvm] [GlobalISel] Combine into abd[su] and legalize abd[su] (PR #179437)   Julian Pokrovsky via llvm-commits
• [llvm] [GlobalISel] Combine into abd[su] and legalize abd[su] (PR #179437)   via llvm-commits
• [llvm] [GlobalISel] Combine into abd[su] and legalize abd[su] (PR #179437)   via llvm-commits
• [llvm] [AMDGPU] Clear no convergence flag on onperand folding. NFCI (PR #179438)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Clear no convergence flag on onperand folding. NFCI (PR #179438)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [GlobalISel] Combine into abd[su] and legalize abd[su] (PR #179437)   Julian Pokrovsky via llvm-commits
• [llvm] [AMDGPU] Global and Buffer loads to LDS should not increase `lgkmcnt` (PR #179305)   Alexander Weinrauch via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary (PR #179318)   via llvm-commits
• [llvm] [AMDGPU] Clear no convergence flag on onperand folding. NFCI (PR #179438)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [AMDGPU] Global and Buffer loads to LDS should not increase `lgkmcnt` (PR #179305)   Alexander Weinrauch via llvm-commits
• [llvm] [AMDGPU] Clear no convergence flag on onperand folding. NFCI (PR #179438)   via llvm-commits
• [llvm] [GlobalISel] Combine into abd[su] and legalize abd[su] (PR #179437)   via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Pankaj Dwivedi via llvm-commits
• [llvm] [GlobalISel] Combine into abd[su] and legalize abd[su] (PR #179437)   Julian Pokrovsky via llvm-commits
• [llvm] a2c7c60 - Revert "[SeparateConstOffsetFromGEP] Decompose constant xor operand if possible" (#179339)   via llvm-commits
• [llvm] Revert "[SeparateConstOffsetFromGEP] Decompose constant xor operand if possible" (PR #179339)   Karthika Devi C via llvm-commits
• [polly] 9ceb6a8 - [Polly][NFCI] Avoid R-value modification   Michael Kruse via llvm-commits
• [llvm] [LoongArch] Fix fptoui.sat miscompilation with NaN inputs (PR #179366)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   via llvm-commits
• [llvm] [AMDGPU] Global and Buffer loads to LDS should not increase `lgkmcnt` (PR #179305)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Global and Buffer loads to LDS should not increase `lgkmcnt` (PR #179305)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   Abhishek Kaushik via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   Abhishek Kaushik via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   Ryotaro Kasuga via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   Ryotaro Kasuga via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   Ryotaro Kasuga via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   Ryotaro Kasuga via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   Jay Foad via llvm-commits
• [llvm] [CodeGen][TII] Simplify analyzeSelect (PR #175828)   Nikita Popov via llvm-commits
• [llvm] [GlobalISel] Combine into abd[su] and legalize abd[su] (PR #179437)   via llvm-commits
• [llvm] [flang-rt][build] Disable two build-time warning of '-Wuninitialized' from g++ compiler (PR #174918)   Michael Kruse via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - extend X86ISD::BZHI handling. Fixes 177364. (PR #179444)   Shamshura Egor via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - extend X86ISD::BZHI handling. Fixes 177364. (PR #179444)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   Petar Avramovic via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Always set flags for overflowing ops etc via VPIRFlags. (PR #179138)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Always set flags for overflowing ops etc via VPIRFlags. (PR #179138)   Florian Hahn via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Paschalis Mpeis via llvm-commits
• [llvm] [AMDGPU] Implement llvm.sponentry (PR #176357)   Diana Picus via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   via llvm-commits
• [llvm] 9411f5d - [SLP][NFC]Add another test for shl-to-add transformation, NFC   Alexey Bataev via llvm-commits
• [llvm] [AMDGPU] Implement llvm.sponentry (PR #176357)   Diana Picus via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement llvm.sponentry (PR #176357)   Diana Picus via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement llvm.sponentry (PR #176357)   Diana Picus via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   Petar Avramovic via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - extend X86ISD::BZHI handling. Fixes 177364. (PR #179444)   Shamshura Egor via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement llvm.sponentry (PR #176357)   Diana Picus via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] Implement llvm.sponentry (PR #176357)   Diana Picus via llvm-commits
• [llvm] [AMDGPU] Implement llvm.sponentry (PR #176357)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [mlir] [flang][openmp] Fix GPU byref reduction descriptor initialization (PR #178934)   Kareem Ergawy via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   Petar Avramovic via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [AMDGPU] Reschedule loads in clauses to improve throughput (PR #102595)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Reschedule loads in clauses to improve throughput (PR #102595)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] Add half vector support for table-driven libcall optimzation (PR #178638)   Steffen Larsen via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false) => (C & A) | (!C & B)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false) => (C & A) | (!C & B)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [X86][SelectionDAG] Register type affect DAG ISel (PR #179446)   via llvm-commits
• [llvm] [X86][SelectionDAG] Register type affect DAG ISel (PR #179446)   via llvm-commits
• [llvm] [AMDGPU] Add half vector support for table-driven libcall optimzation (PR #178638)   Steffen Larsen via llvm-commits
• [llvm] [AMDGPU] Add half vector support for table-driven libcall optimzation (PR #178638)   Steffen Larsen via llvm-commits
• [llvm] [AArch64] Extend condition optimizer to support unsigned comparisons (PR #144380)   via llvm-commits
• [llvm] [AArch64] Extend condition optimizer to support unsigned comparisons (PR #144380)   via llvm-commits
• [llvm] [X86][SelectionDAG] Register type affect DAG ISel (PR #179446)   Matt Arsenault via llvm-commits
• [llvm] [X86][SelectionDAG] Register type affect DAG ISel (PR #179446)   Phoebe Wang via llvm-commits
• [llvm] [AMDGPU] Fix issue in fold_pow with F16 constant vector base. (PR #179341)   Steffen Larsen via llvm-commits
• [llvm] [AArch64] Extend condition optimizer to support unsigned comparisons (PR #144380)   via llvm-commits
• [llvm] Reland "[BasicBlockUtils] Fix dominator tree update for entry block in splitBlockBefore() (#178895) (PR #179392)   Mingjie Xu via llvm-commits
• [llvm] Reland "[BasicBlockUtils] Fix dominator tree update for entry block in splitBlockBefore() (#178895) (PR #179392)   Mingjie Xu via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   Petar Avramovic via llvm-commits
• [llvm] Add full build section to readme (PR #179447)   via llvm-commits
• [llvm] Add full build section to readme (PR #179447)   via llvm-commits
• [llvm] Add full build section to readme (PR #179447)   via llvm-commits
• [llvm] [AMDGPU] Implement llvm.sponentry (PR #176357)   Diana Picus via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   Petar Avramovic via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   Florian Hahn via llvm-commits
• [clang] [llvm] [MFS] Implement -fsplit-machine-functions for Mach-O (ARM64) (PR #179449)   Anton Bikineev via llvm-commits
• [clang] [llvm] [MFS] Implement -fsplit-machine-functions for Mach-O (ARM64) (PR #179449)   via llvm-commits
• [clang] [llvm] [MFS] Implement -fsplit-machine-functions for Mach-O (ARM64) (PR #179449)   via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Viktoria Maximova via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Viktoria Maximova via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Viktoria Maximova via llvm-commits
• [llvm] [X86][SelectionDAG] Register type affect DAG ISel (PR #179446)   via llvm-commits
• [clang] [llvm] [MFS] Implement -fsplit-machine-functions for Mach-O (ARM64) (PR #179449)   via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   Simon Pilgrim via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - extend X86ISD::BZHI handling. Fixes 177364. (PR #179444)   Simon Pilgrim via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - extend X86ISD::BZHI handling. Fixes 177364. (PR #179444)   Simon Pilgrim via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - extend X86ISD::BZHI handling. Fixes 177364. (PR #179444)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [MFS] Implement -fsplit-machine-functions for Mach-O (ARM64) (PR #179449)   Anton Bikineev via llvm-commits
• [llvm] [AArch64][SME] Avoid ZA save state changes in loops in MachineSMEABIPass (PR #149065)   Benjamin Maxwell via llvm-commits
• [llvm] [X86][SelectionDAG] Register type affect DAG ISel (PR #179446)   via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Islam Imad via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Dmitry Sidorov via llvm-commits
• [llvm] [X86][SelectionDAG] Register type affect DAG ISel (PR #179446)   via llvm-commits
• [llvm] [X86][SelectionDAG] Register type affect DAG ISel (PR #179446)   via llvm-commits
• [clang] [lld] [llvm] [llvm][clang][lld][COFF] Add support for case-insensitive path lookup (PR #178585)   Hans Wennborg via llvm-commits
• [clang] [lld] [llvm] [llvm][clang][lld][COFF] Add support for case-insensitive path lookup (PR #178585)   Hans Wennborg via llvm-commits
• [clang] [lld] [llvm] [llvm][clang][lld][COFF] Add support for case-insensitive path lookup (PR #178585)   Hans Wennborg via llvm-commits
• [clang] [lld] [llvm] [llvm][clang][lld][COFF] Add support for case-insensitive path lookup (PR #178585)   Hans Wennborg via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   Simon Pilgrim via llvm-commits
• [llvm] [X86][SelectionDAG] Register type affect DAG ISel (PR #179446)   Phoebe Wang via llvm-commits
• [llvm] Reland "[CoroCleanup] Noop coroutine elision for load-and-call pattern (#179154)" (PR #179431)   via llvm-commits
• [llvm] Reland "[CoroCleanup] Noop coroutine elision for load-and-call pattern (#179154)" (PR #179431)   via llvm-commits
• [llvm] [AArch64] Model Neoverse V2 scalar bitcount ops on V0 (PR #179302)   Amina Chabane via llvm-commits
• [llvm] [AArch64] Model Neoverse V2 scalar bitcount ops on V0 (PR #179302)   Amina Chabane via llvm-commits
• [llvm] [AMDGPU] Clear no convergence flag on operand folding. NFCI (PR #179438)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Clear no convergence flag on operand folding. NFCI (PR #179438)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add uniform i1 to i32 extension patterns (PR #176612)   via llvm-commits
• [clang] [lld] [llvm] [llvm][clang][lld][COFF] Add support for case-insensitive path lookup (PR #178585)   Martin Storsjö via llvm-commits
• [clang] [llvm] [MFS] Implement -fsplit-machine-functions for Mach-O (ARM64) (PR #179449)   via llvm-commits
• [clang] [llvm] [MFS] Implement -fsplit-machine-functions for Mach-O (ARM64) (PR #179449)   via llvm-commits
• [llvm] [AMDGPU] Global and Buffer loads to LDS should not increase `lgkmcnt` (PR #179305)   Jay Foad via llvm-commits
• [llvm] d8a7831 - Reland "[CoroCleanup] Noop coroutine elision for load-and-call pattern (#179154)" (#179431)   via llvm-commits
• [llvm] Reland "[CoroCleanup] Noop coroutine elision for load-and-call pattern (#179154)" (PR #179431)   Weibo He via llvm-commits
• [llvm] [VPlan] Always set flags for overflowing ops etc via VPIRFlags. (PR #179138)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   via llvm-commits
• [llvm] [AMDGPU] Add half vector support for table-driven libcall optimization (PR #178638)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)   Pierre van Houtryve via llvm-commits
• [llvm] [LLVM] Select fma_mix for v_cvt_f32_f16 and v_add_f32/v_mul_f32 (PR #160151)   Acim Maravic via llvm-commits
• [llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)   Pierre van Houtryve via llvm-commits
• [llvm] [LLVM][AMDGPU] Fold v_cvt_f32_f16 and v_add_f32/v_mul_f32 into v_fma_mix_f32 (PR #160151)   Acim Maravic via llvm-commits
• [llvm] [AMDGPU] Implement llvm.sponentry (PR #176357)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Implement llvm.sponentry (PR #176357)   Matt Arsenault via llvm-commits
• [clang] [llvm] [MFS] Implement -fsplit-machine-functions for Mach-O (ARM64) (PR #179449)   Anton Bikineev via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Yingwei Zheng via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   via llvm-commits
• [llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SME] Limit where SME ABI optimizations apply (PR #179273)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Limit where SME ABI optimizations apply (PR #179273)   Benjamin Maxwell via llvm-commits
• [llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)   Matt Arsenault via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Fold select of intrinsic into intrinsic of select (PR #178002)   Gauravsingh Sisodia via llvm-commits
• [llvm] [OpenMP] Enable XFAIL OpenMP tests that pass now (PR #179344)   Joseph Huber via llvm-commits
• [llvm] [AArch64][SME] Limit where SME ABI optimizations apply (PR #179273)   via llvm-commits
• [llvm] [InstCombine] Bubble right spliced reverses of binop operands to their result (PR #179432)   Yingwei Zheng via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   via llvm-commits
• [llvm] [AArch64][PAC] Mark $Scratch operand of AUTxMxN as earlyclobber (PR #173999)   Anatoly Trosinenko via llvm-commits
• [llvm] Reland "[BasicBlockUtils] Fix dominator tree update for entry block in splitBlockBefore() (#178895) (PR #179392)   Nikita Popov via llvm-commits
• [llvm] [AArch64][PAC] Mark $Scratch operand of AUTxMxN as earlyclobber (PR #173999)   Anatoly Trosinenko via llvm-commits
• [llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)   Pierre van Houtryve via llvm-commits
• [llvm] [LoopVectorize] Fix crash with GC statepoint in epilogue vectorization (PR #179459)   Luohao Wang via llvm-commits
• [llvm] [openmp] [OMPT][Offload][OpenMP] Fixes for OMPT data used by libomptarget (reapply #156020) (PR #175165)   Kaloyan Ignatov via llvm-commits
• [llvm] [LoopVectorize] Fix crash with GC statepoint in epilogue vectorization (PR #179459)   via llvm-commits
• [llvm] [AutoUpgrade] Prevent deletion of call if uses still exist (PR #179374)   Nikita Popov via llvm-commits
• [llvm] [AutoUpgrade] Prevent deletion of call if uses still exist (PR #179374)   Nikita Popov via llvm-commits
• [llvm] [LoopVectorize] Fix crash with GC statepoint in epilogue vectorization (PR #179459)   via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   via llvm-commits
• [llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)   Pierre van Houtryve via llvm-commits
• [llvm] [AArch64] Extend condition optimizer to support unsigned comparisons (PR #144380)   via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [llvm] [X86] Remove `NoSignedZerosFPMath` uses (PR #163902)   Mikołaj Piróg via llvm-commits
• [llvm] [perf] Replace copy-assign by move-assign in llvm/lib/Target/AMDGPU/ (PR #179460)   via llvm-commits
• [llvm] [perf] Replace copy-assign by move-assign in llvm/lib/Target/AMDGPU/ (PR #179460)   via llvm-commits
• [llvm] [AMDGPU][Scheduler] Fix incorrect region index in EXPENSIVE_CHECKS (PR #179461)   Lucas Ramirez via llvm-commits
• [llvm] [AMDGPU][Scheduler] Fix incorrect region index in EXPENSIVE_CHECKS (PR #179461)   via llvm-commits
• [llvm] [LoopVectorize] Fix crash with GC statepoint in epilogue vectorization (PR #179459)   Luohao Wang via llvm-commits
• [llvm] [perf] Replace copy-assign by move-assign in llvm/lib/Target/BPF/ (PR #179462)   via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   via llvm-commits
• [llvm] [perf] Replace copy-assign by move-assign in llvm/tools/ (PR #179463)   via llvm-commits
• [llvm] [perf] Replace copy-assign by move-assign in llvm/tools/ (PR #179463)   via llvm-commits
• [llvm] [perf] Replace copy-assign by move-assign in llvm/lib/Target (PR #179464)   via llvm-commits
• [llvm] [perf] Replace copy-assign by move-assign in llvm/tools/ (PR #179463)   via llvm-commits
• [llvm] [perf] Replace copy-assign by move-assign in llvm/lib/Target (PR #179464)   via llvm-commits
• [llvm] [perf] Replace copy-assign by move-assign in llvm/lib/Target/AMDGPU/ (PR #179460)   Matt Arsenault via llvm-commits
• [llvm] [perf] Replace extra copy-assign by move-assign in llvm/lib/ (PR #179465)   via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Dmitry Sidorov via llvm-commits
• [llvm] [perf] Replace extra copy-assign by move-assign in llvm/lib/ (PR #179465)   via llvm-commits
• [llvm] ValueTracking: Handle tracking nan through powi (PR #179311)   Yingwei Zheng via llvm-commits
• [libc] [llvm] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Chinmay Ingle via llvm-commits
• [llvm] 9022f47 - [AMDGPU] Implement llvm.sponentry (#176357)   via llvm-commits
• [llvm] [AMDGPU] Implement llvm.sponentry (PR #176357)   Diana Picus via llvm-commits
• [llvm] [InstCombine] Extend canonicalization of addition to positive numbers (PR #179343)   via llvm-commits
• [llvm] [perf] Replace extra copy-assign by move-assign in llvm/lib/ (PR #179465)   Nikita Popov via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Dmitry Sidorov via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   via llvm-commits
• [libc] [llvm] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Chinmay Ingle via llvm-commits
• [llvm] [X86][GISEL] - Legalize G_FPTOUI & G_UITOFP for X87 (PR #155562)   Pawan Nirpal via llvm-commits
• [llvm] [llvm] Remove the docs for the (now removed) LLVM test-suite Makefiles (PR #179288)   Louis Dionne via llvm-commits
• [llvm] [llvm] Remove the docs for the (now removed) LLVM test-suite Makefiles (PR #179288)   Louis Dionne via llvm-commits
• [llvm] [llvm] Remove the docs for the (now removed) LLVM test-suite Makefiles (PR #179288)   via llvm-commits
• [llvm] InstCombine: Handle minnum/maxnum in SimplifyDemandedFPClass (PR #179299)   Yingwei Zheng via llvm-commits
• [llvm] InstCombine: Handle minnum/maxnum in SimplifyDemandedFPClass (PR #179299)   Yingwei Zheng via llvm-commits
• [llvm] InstCombine: Handle minnum/maxnum in SimplifyDemandedFPClass (PR #179299)   Yingwei Zheng via llvm-commits
• [llvm] [llvm] Always define dump() functions (PR #179468)   Nikita Popov via llvm-commits
• [llvm] [llvm] Always define dump() methods (PR #179468)   Nikita Popov via llvm-commits
• [llvm] [DAG] Fold logic of zero-checks to multiplication for MinSize (PR #171805)   via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   via llvm-commits
• [llvm] [llvm] Always define dump() methods (PR #179468)   via llvm-commits
• [llvm] [SimpleLoopUnswitch][NFC] move quadratic asserts under EXPENSIVE_CHECKS (PR #144887)   via llvm-commits
• [llvm] [X86] Remove `NoSignedZerosFPMath` uses (PR #163902)   via llvm-commits
• [llvm] [perf] Replace copy-assign by move-assign in llvm/tools/ (PR #179463)   James Henderson via llvm-commits
• [llvm] [AMDGPU][Scheduler] Fix incorrect region index in EXPENSIVE_CHECKS (PR #179461)   Mikael Holmen via llvm-commits
• [llvm] [perf] Replace copy-assign by move-assign in llvm/tools/ (PR #179463)   via llvm-commits
• [llvm] 46a3848 - [SLP]Disable modeling disjoint reduction or as bitcast for big endian   Alexey Bataev via llvm-commits
• [llvm] [SLP] Reordered disjoint or reduction of shl(zext, (0, stride, 2* stride)) modelled as bitcast (PR #178292)   Alexey Bataev via llvm-commits
• [llvm] [llvm] Always define dump() methods (PR #179468)   Nikita Popov via llvm-commits
• [llvm] `dwarf2yaml.cpp` optimizations (PR #179048)   James Henderson via llvm-commits
• [llvm] [RISCV][llvm] Support INSERT_VECTOR_ELT codegen for P extension (PR #179471)   Brandon Wu via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   via llvm-commits
• [llvm] [perf] Replace extra copy-assign by move-assign in llvm/lib/ (PR #179465)   via llvm-commits
• [llvm] a47f380 - [AArch64][PAC] Mark $Scratch operand of AUTxMxN as earlyclobber (#173999)   via llvm-commits
• [llvm] [AArch64][PAC] Mark $Scratch operand of AUTxMxN as earlyclobber (PR #173999)   Anatoly Trosinenko via llvm-commits
• [llvm] [BOLT][NFC] Stop populating unnecessary samples into MemSamples (PR #179472)   Shanzhi Chen via llvm-commits
• [llvm] [RISCV][llvm] Support INSERT_VECTOR_ELT codegen for P extension (PR #179471)   via llvm-commits
• [llvm] [X86][utils] Support `-basic-block-sections` in `update_llc_test_checks` (PR #178999)   Mikhail Gudim via llvm-commits
• [llvm] [BOLT][NFC] Stop populating unnecessary samples into MemSamples (PR #179472)   via llvm-commits
• [llvm] AMDGPU: Add more tests for v_dot2_f32_f16/bf16 (PR #179223)   Petar Avramovic via llvm-commits
• [llvm] [perf] Replace copy-assign by move-assign in llvm/tools/ (PR #179463)   James Henderson via llvm-commits
• [llvm] [perf] Replace extra copy-assign by move-assign in llvm/lib/ (PR #179465)   via llvm-commits
• [llvm] [AutoUpgrade] Prevent deletion of call if uses still exist (PR #179374)   Kshitij Paranjape via llvm-commits
• [llvm] [perf] Replace extra copy-assign by move-assign in llvm/lib/ (PR #179465)   Nikita Popov via llvm-commits
• [llvm] [LoopVectorize] Fix crash with GC statepoint in epilogue vectorization (PR #179459)   via llvm-commits
• [llvm] [LoopVectorize] Fix crash with GC statepoint in epilogue vectorization (PR #179459)   via llvm-commits
• [llvm] [AArch64] Avoid selecting XAR for reverse operations. (PR #178706)   Paul Walker via llvm-commits
• [llvm] [perf] Replace copy-assign by move-assign in llvm/lib/Target/AMDGPU/ (PR #179460)   via llvm-commits
• [llvm] [InstCombine] Extend canonicalization of addition to positive numbers (PR #179343)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Extend canonicalization of addition to positive numbers (PR #179343)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Extend canonicalization of addition to positive numbers (PR #179343)   Yingwei Zheng via llvm-commits
• [compiler-rt] Fix: windows i386 builtins tests (PR #179062)   via llvm-commits
• [llvm] [perf] Replace copy-assign by move-assign in llvm/lib/Target/AMDGPU/ (PR #179460)   via llvm-commits
• [llvm] 85919fb - [perf] Replace copy-assign by move-assign in llvm/lib/Target/AMDGPU/ (#179460)   via llvm-commits
• [llvm] [llvm] Remove the docs for the (now removed) LLVM test-suite Makefiles (PR #179288)   Aiden Grossman via llvm-commits
• [llvm] [perf] Replace extra copy-assign by move-assign in llvm/lib/ (PR #179465)   via llvm-commits
• [llvm] [InstCombine] Bubble right spliced reverses of binop operands to their result (PR #179432)   Luke Lau via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   Kevin Sala Penades via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   Kevin Sala Penades via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - extend X86ISD::BZHI handling. Fixes 177364. (PR #179444)   Shamshura Egor via llvm-commits
• [llvm] [SPIRV] selectDot4AddPacked: add missing PackedVectorFormat4x8Bit optional operand (PR #179476)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - extend X86ISD::BZHI handling. Fixes 177364. (PR #179444)   Shamshura Egor via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - extend X86ISD::BZHI handling. Fixes 177364. (PR #179444)   Shamshura Egor via llvm-commits
• [compiler-rt] Fix: windows i386 builtins tests (PR #179062)   Nikita Popov via llvm-commits
• [llvm] [LegalizeTypes] Don't promote operands to VP extends (PR #179475)   Luke Lau via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - extend X86ISD::BZHI handling. Fixes 177364. (PR #179444)   via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - extend X86ISD::BZHI handling. Fixes 177364. (PR #179444)   Shamshura Egor via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   Kevin Sala Penades via llvm-commits
• [llvm] [LegalizeVectorTypes] Don't emit VP_SELECT when widening MLOAD to VP_LOAD (PR #179478)   Luke Lau via llvm-commits
• [llvm] [LegalizeVectorTypes] Don't emit VP_SELECT when widening MLOAD to VP_LOAD (PR #179478)   via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Steven Perron via llvm-commits
• [llvm] [SeperateConstOffsetFromGEP] Update splitGEP to handle case where including base offset results in an offset that's too large (PR #177653)   Adel Ejjeh via llvm-commits
• [compiler-rt] Fix: windows i386 builtins tests (PR #179062)   via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Yingwei Zheng via llvm-commits
• [llvm] [AutoUpgrade] Prevent deletion of call if uses still exist (PR #179374)   Kshitij Paranjape via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   via llvm-commits
• [llvm] [InstCombine] Extend canonicalization of addition to positive numbers (PR #179343)   via llvm-commits
• [llvm] [AutoUpgrade] Prevent deletion of call if uses still exist (PR #179374)   Kshitij Paranjape via llvm-commits
• [llvm] [AutoUpgrade] Prevent deletion of call if uses still exist (PR #179374)   Kshitij Paranjape via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for fptoi and itofp (PR #176300)   Syadus Sefat via llvm-commits
• [llvm] [RISCV] Use RISCVWidth in interface for vector load/store classes in RISCVInstrFormatsV.td. NFC (PR #179348)   Craig Topper via llvm-commits
• [llvm] [Hexagon] Fix a bug in setcc isnan lit test for f16 (PR #179338)   Sergei Larin via llvm-commits
• [llvm] [SPIRV] selectDot4AddPacked: add missing PackedVectorFormat4x8Bit optional operand (PR #179476)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] selectDot4AddPacked: add missing PackedVectorFormat4x8Bit optional operand (PR #179476)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SeperateConstOffsetFromGEP] Update splitGEP to handle case where including base offset results in an offset that's too large (PR #177653)   Adel Ejjeh via llvm-commits
• [llvm] [SPIRV] selectDot4AddPacked: add missing PackedVectorFormat4x8Bit optional operand (PR #179476)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [CMake] Update "all" project/runtimes (PR #179270)   LLVM Continuous Integration via llvm-commits
• [llvm] [Hexagon] Fix a bug in setcc isnan lit test for f16 (PR #179338)   Fateme Hosseini via llvm-commits
• [llvm] [mlir] [MLIR][OpenMP] Add Taskloop Collapse Support (PR #175924)   Jack Styles via llvm-commits
• [llvm] [RISCV] Don't emit VP_SETCC in combineVectorSizedSetCCEquality (PR #179479)   Luke Lau via llvm-commits
• [llvm] [PowerPC] Remove NoInfsFPMath uses (PR #163029)   Amy Kwan via llvm-commits
• [llvm] [mlir] [MLIR][OpenMP] Add Taskloop Collapse Support (PR #175924)   Jack Styles via llvm-commits
• [llvm] [RISCV] Don't emit VP_SETCC in combineVectorSizedSetCCEquality (PR #179479)   via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for fptoi and itofp (PR #176300)   Syadus Sefat via llvm-commits
• [llvm] [LegalizeTypes] Don't promote operands to VP extends (PR #179475)   Craig Topper via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Andrei Elovikov via llvm-commits
• [llvm] [InstCombine] Bubble splices of binop operands to their result (PR #179432)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for fptoi and itofp (PR #176300)   Petar Avramovic via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   Simon Pilgrim via llvm-commits
• [llvm] [SPIR-V] initial support for @llvm.structured.gep (PR #178668)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] initial support for @llvm.structured.gep (PR #178668)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] initial support for @llvm.structured.gep (PR #178668)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] initial support for @llvm.structured.gep (PR #178668)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Dmitry Sidorov via llvm-commits
• [llvm] [LegalizeTypes] Don't promote operands to VP extends (PR #179475)   Luke Lau via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in RegInfoEmitter (PR #179017)   Ivan Kosarev via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in RegInfoEmitter (PR #179017)   Ivan Kosarev via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in RegInfoEmitter (PR #179017)   Ivan Kosarev via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in RegInfoEmitter (PR #179017)   Ivan Kosarev via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Dmitry Sidorov via llvm-commits
• [llvm] 9f47cae - [RISCV] Use RISCVWidth in interface for vector load/store classes in RISCVInstrFormatsV.td. NFC (#179348)   via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Implement llvm.sponentry (PR #176357)   Shilei Tian via llvm-commits
• [llvm] [InstCombine] Bubble splices of binop operands to their result (PR #179432)   Luke Lau via llvm-commits
• [llvm] 0d5e58d - [Hexagon] Fix a bug in setcc isnan lit test for f16 (#179338)   via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Mel Chen via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FSINCOS (PR #179053)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FSINCOS (PR #179053)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FSINCOS (PR #179053)   Steven Perron via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FSINCOS (PR #179053)   Steven Perron via llvm-commits
• [llvm] 030fc7d - [LegalizeTypes] Don't promote operands to VP extends (#179475)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   Petar Avramovic via llvm-commits
• [llvm] [RISCV] Use RISCVWidth in interface for vector load/store classes in RISCVInstrFormatsV.td. NFC (PR #179348)   LLVM Continuous Integration via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][DAGCombiner][GlobalISel] Prevent FMA contraction when multiply cannot be eliminated (PR #169735)   Adel Ejjeh via llvm-commits
• [llvm] [InstCombine] Bubble splices of binop operands to their result (PR #179432)   Luke Lau via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Andrei Elovikov via llvm-commits
• [compiler-rt] Fix: windows i386 builtins tests (PR #179062)   Hans Wennborg via llvm-commits
• [llvm] [RISCV] Don't emit VP_SETCC in combineVectorSizedSetCCEquality (PR #179479)   Craig Topper via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [libc] [llvm] [libc][math] Refactor pow to Header Only. (PR #176529)   Nico Weber via llvm-commits
• [llvm] [update_mc_test_checks] Fix llvm-mc invocation on Windows by avoiding echo pipe (PR #179381)   Harrison Hao via llvm-commits
• [clang] [llvm] [RISCV][llvm] Rename zvqdotq to zvdot4a8i (PR #179393)   Brandon Wu via llvm-commits
• [llvm] [LLVM] Remove 'libclc' from ALL projects (PR #179485)   Joseph Huber via llvm-commits
• [llvm] [RISCV] Make MOP/HINT-based instruction mnemonics always available (PR #178609)   Kito Cheng via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Andrei Elovikov via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   Petar Avramovic via llvm-commits
• [libc] [llvm] [libc][math] Refactor pow to Header Only. (PR #176529)   via llvm-commits
• [llvm] [LegalizeVectorTypes] Don't emit VP_SELECT when widening MLOAD to VP_LOAD (PR #179478)   Craig Topper via llvm-commits
• [llvm] [CodeGenPrepare][NFC] Reland: Update the dominator tree instead of rebuilding it (PR #179040)   Mingjie Xu via llvm-commits
• [llvm] [SPIRV] Implement lowering for HLSL Texture2D sampling intrinsics (PR #179312)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Implement lowering for HLSL Texture2D sampling intrinsics (PR #179312)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   Petar Avramovic via llvm-commits
• [llvm] 466c22b - [RISCV] Make MOP/HINT-based instruction mnemonics always available (#178609)   via llvm-commits
• [llvm] [bolt] Use --reorder-functions option directly (PR #179486)   Alexey Moksyakov via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Alexandros Lamprineas via llvm-commits
• [llvm] [bolt] Use --reorder-functions option directly (PR #179486)   via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [bolt] Use --reorder-functions option directly (PR #179486)   via llvm-commits
• [llvm] eb1ae5b - [RISCV] Wrap some long lines in RISCVInstrInfoV.td. NFC   Craig Topper via llvm-commits
• [llvm] [llvm-mca] Missing data dependencies due to constant registers not being cached (PR #177990)   Giorgio Marletta via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   Nikita Popov via llvm-commits
• [llvm] [AArch64][SME] Add missing ZT0 transition (PR #179193)   Benjamin Maxwell via llvm-commits
• [llvm] [SPARC][IAS] Add lzd alias for lzcnt (PR #179487)   via llvm-commits
• [compiler-rt] Fix: windows i386 builtins tests (PR #179062)   via llvm-commits
• [llvm] [SPARC][IAS] Add lzd alias for lzcnt (PR #179487)   via llvm-commits
• [llvm] TargetLowering: Replace android triple check with libcall check (PR #148800)   Matt Arsenault via llvm-commits
• [llvm] [AutoUpgrade] Prevent deletion of call if uses still exist (PR #179374)   Stefan Weigl-Bosker via llvm-commits
• [llvm] [OpenMPOpt] avoid OOB array write (PR #178686)   Jameson Nash via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   Matt Arsenault via llvm-commits
• [llvm] [AutoUpgrade] Prevent deletion of call if uses still exist (PR #179374)   Stefan Weigl-Bosker via llvm-commits
• [llvm] [ConstantTime][LLVM] Add llvm.ct.select intrinsic with generic SelectionDAG lowering (PR #166702)   Julius Alexandre via llvm-commits
• [llvm] [AArch64] Lower bfloat FADD/SUB to BFMLAL top/bottom instructions (PR #174814)   Paul Walker via llvm-commits
• [llvm] [AArch64] Lower bfloat FADD/SUB to BFMLAL top/bottom instructions (PR #174814)   Paul Walker via llvm-commits
• [llvm] [AArch64] Lower bfloat FADD/SUB to BFMLAL top/bottom instructions (PR #174814)   Paul Walker via llvm-commits
• [llvm] [X86] Lower CTTZ/CTLZ vXi8 vectors using GF2P8AFFINEQB (PR #118012)   Simon Pilgrim via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   Petar Avramovic via llvm-commits
• [llvm] e96ad4a - [OpenMPOpt] avoid OOB array write (#178686)   via llvm-commits
• [llvm] [AutoUpgrade] Prevent deletion of call if uses still exist (PR #179374)   Kshitij Paranjape via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Yaxun Liu via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [AutoUpgrade] Handle invalid intrinsics (PR #179374)   Kshitij Paranjape via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] [LLVM] Improve IR parsing and printing for target memory locations (PR #176968)   Nikita Popov via llvm-commits
• [llvm] [bolt] Use --reorder-functions option directly (PR #179486)   via llvm-commits
• [llvm] [InlineCost] Replace getAllocatedType with getAllocationSize (PR #178355)   Nikita Popov via llvm-commits
• [llvm] [LLVM] Remove 'libclc' from ALL projects (PR #179485)   Nikita Popov via llvm-commits
• [llvm] [AutoUpgrade] Handle invalid intrinsics (PR #179374)   Stefan Weigl-Bosker via llvm-commits
• [llvm] [AutoUpgrade] Handle invalid intrinsics (PR #179374)   Stefan Weigl-Bosker via llvm-commits
• [llvm] [AutoUpgrade] Handle invalid x86 intrinsics (PR #179374)   Stefan Weigl-Bosker via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] [DAG] Define computeConstantRange for VSCALE folding (PR #176027)   Neil Phan via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] [LLVM] Remove 'libclc' from ALL projects (PR #179485)   Joseph Huber via llvm-commits
• [llvm] [AutoUpgrade] Handle invalid x86 intrinsics (PR #179374)   Kshitij Paranjape via llvm-commits
• [llvm] [DAG] Define computeConstantRange for VSCALE folding (PR #176027)   via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [llvm] [AArch64] Increase allocation priority of restricted ZReg classes (PR #176419)   Paul Walker via llvm-commits
• [llvm] [DAG] Define computeConstantRange for VSCALE folding (PR #176027)   Neil Phan via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [llvm] [NFC][LLVM][CodeGen][SVE] Restructure urshr related PatFrags. (PR #170521)   Paul Walker via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   Petar Avramovic via llvm-commits
• [llvm] In-class initialize DenseMapBase members. (PR #177168)   Matt Davis via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] [DAG] Define computeConstantRange for VSCALE folding (PR #176027)   Neil Phan via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Nikita Popov via llvm-commits
• [llvm] [SDAG] Use the precise isTruncFree overload more often (PR #176575)   via llvm-commits
• [llvm] [X86] Fixed truncated masked stores (PR #179491)   via llvm-commits
• [llvm] [X86] Fixed truncated masked stores (PR #179491)   via llvm-commits
• [llvm] Fix LLDB data formatter for llvm::Expected<T> with non-reference types (PR #179294)   Michael Buch via llvm-commits
• [llvm] Fix LLDB data formatter for llvm::Expected<T> with non-reference types (PR #179294)   Michael Buch via llvm-commits
• [llvm] [SDAG] SetCC: remove spurious extensions (PR #173110)   via llvm-commits
• [llvm] [llvm-mca] Missing data dependencies due to constant registers not being cached (PR #177990)   Giorgio Marletta via llvm-commits
• [llvm] [AutoUpgrade] Handle invalid x86 intrinsics (PR #179374)   Stefan Weigl-Bosker via llvm-commits
• [llvm] Fix LLDB data formatter for llvm::Expected<T> with non-reference types (PR #179294)   Michael Buch via llvm-commits
• [llvm] Fix LLDB data formatter for llvm::Expected<T> with non-reference types (PR #179294)   Michael Buch via llvm-commits
• [llvm] [AMDGPU] Add CmpLG and OrN2 operators to LaneMaskConstants (PR #179493)   via llvm-commits
• [llvm] [AMDGPU] Add CmpLG and OrN2 operators to LaneMaskConstants (PR #179493)   via llvm-commits
• [llvm] [bolt] Use --reorder-functions option directly (PR #179486)   Alexey Moksyakov via llvm-commits
• [llvm] [update_mc_test_checks] Fix llvm-mc invocation on Windows by avoiding echo pipe (PR #179381)   via llvm-commits
• [llvm] [AMDGPU] Add CmpLG and OrN2 operators to LaneMaskConstants (PR #179493)   via llvm-commits
• [llvm] Fix LLDB data formatter for llvm::Expected<T> with non-reference types (PR #179294)   Michael Buch via llvm-commits
• [llvm] [AutoUpgrade] Handle invalid x86 intrinsics (PR #179374)   Kshitij Paranjape via llvm-commits
• [llvm] Fix LLDB data formatter for llvm::Expected<T> with non-reference types (PR #179294)   Michael Buch via llvm-commits
• [llvm] [AMDGPU] Add CmpLG and OrN2 operators to LaneMaskConstants (PR #179493)   via llvm-commits
• [llvm] [AArch64] Increase allocation priority of restricted ZReg classes (PR #176419)   Momchil Velikov via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Nikita Popov via llvm-commits
• [llvm] [X86] Restrict offset folding into address mode in 16-bit mode (PR #179399)   Fangrui Song via llvm-commits
• [llvm] [bolt] Use --reorder-functions option directly (PR #179486)   Alexey Moksyakov via llvm-commits
• [llvm] [AMDGPU] Add CmpLG and OrN2 operators to LaneMaskConstants (PR #179493)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [X86] Restrict offset folding into address mode in 16-bit mode (PR #179399)   Fangrui Song via llvm-commits
• [llvm] [AArch64] Codegen for AArch64 Return Address Signing Hardening (PR #176187)   Victor Campos via llvm-commits
• [llvm] [X86] Restrict offset folding into address mode in 16-bit mode (PR #179399)   Fangrui Song via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Nikita Popov via llvm-commits
• [llvm] [AutoUpgrade] Handle invalid x86 intrinsics (PR #179374)   Kshitij Paranjape via llvm-commits
• [llvm] [DAG] Define computeConstantRange for VSCALE folding (PR #176027)   Neil Phan via llvm-commits
• [llvm] [AArch64] Add clmul AArch64 lowering tests (PR #179495)   Matthew Devereau via llvm-commits
• [llvm] [X86] Restrict offset folding into address mode in 16-bit mode (PR #179399)   Fangrui Song via llvm-commits
• [llvm] [AArch64] Codegen for AArch64 Return Address Signing Hardening (PR #176187)   Victor Campos via llvm-commits
• [llvm] [X86] Restrict offset folding into address mode in 16-bit mode (PR #179399)   Fangrui Song via llvm-commits
• [llvm] [AArch64] Add clmul AArch64 lowering tests (PR #179495)   via llvm-commits
• [llvm] [NFC][LLVM][CodeGen][SVE] Restructure urshr related PatFrags. (PR #170521)   Graham Hunter via llvm-commits
• [llvm] [InstCombine] Fold select of intrinsic into intrinsic of select (PR #178002)   Gauravsingh Sisodia via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Aiden Grossman via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Aiden Grossman via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Aiden Grossman via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Aiden Grossman via llvm-commits
• [llvm] [SPIR-V] Add lowering for G_FSINCOS (PR #179053)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   Nikita Popov via llvm-commits
• [lld] [ELF] Support DW_EH_PE_sdata8 encoding in .eh_frame_hdr (PR #179089)   Fangrui Song via llvm-commits
• [lld] [lld] Add support for .eh_frame_hdr sdata8 (PR #174486)   Farid Zakaria via llvm-commits
• [llvm] [AMDGPU][Scheduler] Fix incorrect region index in EXPENSIVE_CHECKS (PR #179461)   Matt Arsenault via llvm-commits
• [llvm] [NFCI][Coroutines] update tests to autogenerated formatting (PR #178358)   Jameson Nash via llvm-commits
• [llvm] [InstCombine] Extend canonicalization of addition to positive numbers (PR #179343)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Extend canonicalization of addition to positive numbers (PR #179343)   Yingwei Zheng via llvm-commits
• [lld] [ELF] Support DW_EH_PE_sdata8 encoding in .eh_frame_hdr (PR #179089)   Peter Smith via llvm-commits
• [llvm] [InstCombine] Fold select of intrinsic into intrinsic of select (PR #178002)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold select of intrinsic into intrinsic of select (PR #178002)   Nikita Popov via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Florian Hahn via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Florian Hahn via llvm-commits
• [llvm] [SDAG] SetCC: remove spurious extensions (PR #173110)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] SetCC: remove spurious extensions (PR #173110)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] SetCC: remove spurious extensions (PR #173110)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] SetCC: remove spurious extensions (PR #173110)   Matt Arsenault via llvm-commits
• [llvm] [SPIRV] selectDot4AddPacked: add missing PackedVectorFormat4x8Bit optional operand (PR #179476)   Manuel Carrasco via llvm-commits
• [llvm] `dwarf2yaml.cpp` optimizations (PR #179048)   via llvm-commits
• [llvm] [bolt] Use --reorder-functions option directly (PR #179486)   Alexey Moksyakov via llvm-commits
• [llvm] [update_mc_test_checks] Fix llvm-mc invocation on Windows by avoiding echo pipe (PR #179381)   Aiden Grossman via llvm-commits
• [llvm] [NFCI][Coroutines] update tests to autogenerated formatting (PR #178358)   Jameson Nash via llvm-commits
• [llvm] [InstCombine] Fold select of intrinsic into intrinsic of select (PR #178002)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Bubble splices of binop operands to their result (PR #179432)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Fold select of intrinsic into intrinsic of select (PR #178002)   via llvm-commits
• [llvm] Reapply "[InstCombine] Always fold alignment assumptions into operand bundles (#177597)" (PR #179497)   Nikolas Klauser via llvm-commits
• [llvm] `dwarf2yaml.cpp` optimizations (PR #179048)   via llvm-commits
• [llvm] Reapply "[InstCombine] Always fold alignment assumptions into operand bundles (#177597)" (PR #179497)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (PR #179440)   Petar Avramovic via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize (PR #179441)   Petar Avramovic via llvm-commits
• [llvm] [perf] Replace copy-assign by move-assign in llvm/lib/Target/BPF/ (PR #179462)   via llvm-commits
• [llvm] Reapply "[InstCombine] Always fold alignment assumptions into operand bundles (#177597)" (PR #179497)   Nikolas Klauser via llvm-commits
• [llvm] 00fb7f8 - [InstCombine] Extend canonicalization of addition to positive numbers (#179343)   via llvm-commits
• [llvm] [SPIRV] Do not emit @llvm.used (PR #179498)   Nick Sarnie via llvm-commits
• [llvm] [HEXAGON] Extend/Truncate the shift amount into i32 (PR #179499)   Abinaya Saravanan via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize (PR #179441)   Petar Avramovic via llvm-commits
• [llvm] [SPIRV] Do not emit @llvm.used (PR #179498)   Nick Sarnie via llvm-commits
• [llvm] [HEXAGON] Extend/Truncate the shift amount into i32 (PR #179499)   Abinaya Saravanan via llvm-commits
• [llvm] [SPIRV] Do not emit @llvm.used (PR #179498)   Nick Sarnie via llvm-commits
• [llvm] [HEXAGON] Extend/Truncate the shift amount into i32 (PR #179499)   via llvm-commits
• [llvm] Reapply "[InstCombine] Always fold alignment assumptions into operand bundles (#177597)" (PR #179497)   Nikolas Klauser via llvm-commits
• [llvm] [HEXAGON] Extend/Truncate the shift amount into i32 (PR #179499)   Abinaya Saravanan via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary (PR #179318)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary (PR #179318)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary (PR #179318)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary (PR #179318)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary (PR #179318)   Matt Arsenault via llvm-commits
• [llvm] [bolt] Use --reorder-functions option directly (PR #179486)   Alexey Moksyakov via llvm-commits
• [llvm] [AMDGPU][Scheduler] Fix incorrect region index in EXPENSIVE_CHECKS (PR #179461)   Lucas Ramirez via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   via llvm-commits
• [llvm] [InstCombine] Remove uses of arguments to assumes (PR #177879)   Nikolas Klauser via llvm-commits
• [llvm] 114f780 - [InstCombine] Fold select of intrinsic into intrinsic of select (#178002)   via llvm-commits
• [llvm] [InstCombine] Always fold nonnull assumptions into operand bundles (PR #169923)   Nikolas Klauser via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   via llvm-commits
• [llvm] 299761d - AMDGPU/GlobalISel: add mir test for sgpr s16 unmerge (#179440)   via llvm-commits
• [llvm] AMDGPU: Add more tests for v_dot2_f32_f16/bf16 (PR #179223)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Move eventCounter() function (PR #178949)   via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Paschalis Mpeis via llvm-commits
• [llvm] [InstCombine] Canonicalize zext+overflow check to overflow check if zext's only purpose is to check overflow (PR #140178)   via llvm-commits
• [llvm] dfbf4eb - [AMDGPU][Scheduler] Fix incorrect region index in EXPENSIVE_CHECKS (#179461)   via llvm-commits
• [llvm] [SeperateConstOffsetFromGEP] Update splitGEP to handle case where including base offset results in an offset that's too large (PR #177653)   Adel Ejjeh via llvm-commits
• [llvm] [CodeGenPrepare][NFC] Reland: Update the dominator tree instead of rebuilding it (PR #179040)   Nikita Popov via llvm-commits
• [llvm] [CodeGenPrepare][NFC] Reland: Update the dominator tree instead of rebuilding it (PR #179040)   Nikita Popov via llvm-commits
• [llvm] [CodeGenPrepare][NFC] Reland: Update the dominator tree instead of rebuilding it (PR #179040)   Nikita Popov via llvm-commits
• [llvm] [CodeGenPrepare][NFC] Reland: Update the dominator tree instead of rebuilding it (PR #179040)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize zext+overflow check to overflow check if zext's only purpose is to check overflow (PR #140178)   via llvm-commits
• [llvm] [InstCombine] Canonicalize zext+overflow check to overflow check if zext's only purpose is to check overflow (PR #140178)   via llvm-commits
• [llvm] Reapply "[InstCombine] Always fold alignment assumptions into operand bundles (#177597)" (PR #179497)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Canonicalize zext+overflow check to overflow check if zext's only purpose is to check overflow (PR #140178)   via llvm-commits
• [lld] [ELF] Support DW_EH_PE_sdata8 encoding in .eh_frame_hdr (PR #179089)   Farid Zakaria via llvm-commits
• [lld] [ELF] Support DW_EH_PE_sdata8 encoding in .eh_frame_hdr (PR #179089)   Farid Zakaria via llvm-commits
• [lld] [ELF] Support DW_EH_PE_sdata8 encoding in .eh_frame_hdr (PR #179089)   Farid Zakaria via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [HEXAGON] Extend/Truncate the shift amount into i32 (PR #179499)   Ikhlas Ajbar via llvm-commits
• [llvm] [HEXAGON] Extend/Truncate the shift amount into i32 (PR #179499)   Ikhlas Ajbar via llvm-commits
• [clang] [llvm] [CodeGen][AArch64] ptrauth intrinsic to safely construct relative ptr (PR #142047)   Ahmed Bougacha via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((Mask - AddC) - X) & Mask (PR #174278)   Yingwei Zheng via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in RegInfoEmitter (PR #179017)   Rahul Joshi via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in RegInfoEmitter (PR #179017)   Rahul Joshi via llvm-commits
• [llvm] [InstCombine] Canonicalize zext+overflow check to overflow check if zext's only purpose is to check overflow (PR #140178)   via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [X86] Restrict offset folding into address mode in 16-bit mode (PR #179399)   Fangrui Song via llvm-commits
• [llvm] e39d282 - [CodeGen][AArch64] ptrauth intrinsic to safely construct relative ptr (#142047)   via llvm-commits
• [llvm] [LV] Convert gather loads with invariant stride into strided loads (PR #147297)   Florian Hahn via llvm-commits
• [llvm] [InstCombine] Canonicalize zext+overflow check to overflow check if zext's only purpose is to check overflow (PR #140178)   via llvm-commits
• [llvm] [NFC][LLVM] Make constrainSelectedInstRegOperands return void (it always returns true) (PR #179501)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][LLVM] Make constrainSelectedInstRegOperands return void (it always returns true) (PR #179501)   via llvm-commits
• [llvm] [NFC][LLVM] Make constrainSelectedInstRegOperands return void (it always returns true) (PR #179501)   via llvm-commits
• [llvm] [NFC][LLVM] Make constrainSelectedInstRegOperands return void (it always returns true) (PR #179501)   via llvm-commits
• [llvm] [NFC][LLVM] Make constrainSelectedInstRegOperands return void (it always returns true) (PR #179501)   via llvm-commits
• [llvm] [NFC][LLVM] Make constrainSelectedInstRegOperands return void (it always returns true) (PR #179501)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] 0b4147e - [X86] Restrict offset folding into address mode in 16-bit mode (#179399)   via llvm-commits
• [llvm] Revert "[SeparateConstOffsetFromGEP] Decompose constant xor operand if possible" (PR #179339)   Eli Friedman via llvm-commits
• [llvm] [update_mc_test_checks] Fix llvm-mc invocation on Windows by avoiding echo pipe (PR #179381)   Alexander Richardson via llvm-commits
• [llvm] [InstCombine] Canonicalize zext+overflow check to overflow check if zext's only purpose is to check overflow (PR #140178)   via llvm-commits
• [llvm] Revert "[SeparateConstOffsetFromGEP] Decompose constant xor operand if possible" (PR #179339)   Eli Friedman via llvm-commits
• [llvm] [X86] mayFoldIntoVector - recognise larger than legal logic ops may fold to vectors (PR #179503)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][LLVM] Make `constrainSelectedInstRegOperands` return `void` (it always returns `true`) (PR #179501)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [X86] mayFoldIntoVector - recognise larger than legal logic ops may fold to vectors (PR #179503)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][LLVM] Make `constrainSelectedInstRegOperands` return `void` (it always returns `true`) (PR #179501)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [NFC][LLVM] Make `constrainSelectedInstRegOperands` return `void` (PR #179501)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstCombine] Canonicalize zext+overflow check to overflow check if zext's only purpose is to check overflow (PR #179505)   via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   via llvm-commits
• [llvm] [InstCombine] Canonicalize zext+overflow check to overflow check if zext's only purpose is to check overflow (PR #179505)   via llvm-commits
• [llvm] [InstCombine] Extend canonicalization of addition to positive numbers (PR #179343)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add tbuffer store d16 RegBankLegalize rule (PR #179411)   via llvm-commits
• [llvm] [PowerPC] Only set QualName symbol on first section switch (PR #179253)   Amy Kwan via llvm-commits
• [llvm] abdf66d - [AMDGPU][GlobalIsel] Add register bank legalization rules for fptoi and itofp (#176300)   via llvm-commits
• [llvm] [AMDGPU][GlobalIsel] Add register bank legalization rules for fptoi and itofp (PR #176300)   Syadus Sefat via llvm-commits
• [llvm] [CodeGenPrepare][NFC] Reland: Update the dominator tree instead of rebuilding it (PR #179040)   Nikita Popov via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize (PR #179441)   Petar Avramovic via llvm-commits
• [llvm] [CodeGenPrepare][NFC] Reland: Update the dominator tree instead of rebuilding it (PR #179040)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Always fold nonnull assumptions into operand bundles (PR #169923)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Always fold nonnull assumptions into operand bundles (PR #169923)   Nikita Popov via llvm-commits
• [llvm] 5586d4a - [X86] mayFoldIntoVector - recognise larger than legal logic ops may fold to vectors (#179503)   via llvm-commits
• [llvm] [X86] mayFoldIntoVector - recognise larger than legal logic ops may fold to vectors (PR #179503)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize (PR #179441)   Petar Avramovic via llvm-commits
• [llvm] [InstCombine] Always fold nonnull assumptions into operand bundles (PR #169923)   Nikita Popov via llvm-commits
• [clang] [llvm] [LFI] Add MCLFIRewriter infrastructure (PR #172906)   Zachary Yedidia via llvm-commits
• [llvm] 06a903e - [AMDGPU] Clear no convergence flag on operand folding. NFCI (#179438)   via llvm-commits
• [llvm] [AMDGPU] Clear no convergence flag on operand folding. NFCI (PR #179438)   Stanislav Mekhanoshin via llvm-commits
• [llvm] 9bfeaaf - [LLVM][Intrinsics] Minor cleanup in getIntrinsicInfoTableEntries (#179317)   via llvm-commits
• [llvm] [LLVM][Intrinsics] Minor cleanup in getIntrinsicInfoTableEntries (PR #179317)   Rahul Joshi via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize (PR #179441)   Petar Avramovic via llvm-commits
• [clang] [llvm] [AMDGPU] Add `wave_id` and `wave_shuffle` Clang builtins. (PR #179492)   Alex Voicu via llvm-commits
• [llvm] [X86] combine widening `shl` + adjacent addition into `VPMADDWD` (PR #179326)   Folkert de Vries via llvm-commits
• [llvm] [X86] combine widening `shl` + adjacent addition into `VPMADDWD` (PR #179326)   Folkert de Vries via llvm-commits
• [llvm] [LoopUnrollPass] Enable analysis of loops with inline asm (PR #179537)   Justin Fargnoli via llvm-commits
• [llvm] [PTX][Debug] Add .loc directives to inlined PTX. (PR #177718)   Laxman Sole via llvm-commits
• [llvm] [LoopUnrollPass] Enable analysis of loops with `InlineAsm` (PR #179537)   Justin Fargnoli via llvm-commits
• [llvm] [LoopUnrollPass] Enable analysis of loops with `InlineAsm` (PR #179537)   Justin Fargnoli via llvm-commits
• [llvm] [PTX][Debug] Add .loc directives to inlined PTX. (PR #177718)   Laxman Sole via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   Alex Wang via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   Alex Wang via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize (PR #179441)   Petar Avramovic via llvm-commits
• [llvm] [Hexagon] Clean up the test from hexinsert pass fix (PR #164858)   Brian Cain via llvm-commits
• [llvm] [SimpleLoopUnswitch][NFC] move quadratic asserts under EXPENSIVE_CHECKS (PR #144887)   Antonio Frighetto via llvm-commits
• [llvm] [SystemZ][z/OS] Reverse the order of instructions to save and restore CSRs (PR #179540)   via llvm-commits
• [llvm] [LoopUnrollPass] Enable analysis of loops with `InlineAsm` (PR #179537)   Nikita Popov via llvm-commits
• [llvm] [SystemZ][z/OS] Reverse the order of instructions to save and restore CSRs (PR #179540)   via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   Matt Arsenault via llvm-commits
• [llvm] [utils][UpdateLLCTestChecks] Add --include-constant-pool knob to update_llc_test_checks.py (PR #179536)   via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Sink some encoding related lets into class/def bodies. NFC (PR #179544)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Print MIR comments for AVL and VEC_RM operands (PR #179542)   Sam Elliott via llvm-commits
• [llvm] Fix Bazel build for 5587993 (PR #179547)   Ivan Tadeu Ferreira Antunes Filho via llvm-commits
• [llvm] [Evaluator] require invariant size to fully span the global (PR #179518)   Jameson Nash via llvm-commits
• [polly] [Polly][ScopInfo] Create Scop objects lazily (PR #179535)   Michael Kruse via llvm-commits
• [polly] [Polly][ScopInfo] Lazy Scop instantiation (PR #179535)   Michael Kruse via llvm-commits
• [llvm] [LoopUnrollPass] Enable analysis of loops with `InlineAsm` (PR #179537)   Justin Fargnoli via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize (PR #179441)   Petar Avramovic via llvm-commits
• [clang] [llvm] Reland "[DebugMetadata][DwarfDebug] Support function-local types in lexical block scopes (4/7)" (PR #165032)   David Blaikie via llvm-commits
• [clang] [llvm] Reland "[DebugMetadata][DwarfDebug] Support function-local types in lexical block scopes (4/7)" (PR #165032)   David Blaikie via llvm-commits
• [llvm] Fix Bazel build for 5587993 (PR #179547)   Ivan Tadeu Ferreira Antunes Filho via llvm-commits
• [clang] [llvm] [Triple] Make a target triple "os" for firmware (PR #176272)   Ian Anderson via llvm-commits
• [llvm] d510c4c - [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (#178724)   via llvm-commits
• [llvm] [VPlan] Generalize `VPAllSuccessorsIterator` to support predecessors (PR #178724)   Florian Hahn via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize (PR #179441)   Petar Avramovic via llvm-commits
• [llvm] 792f7b0 - [VPlan] Refine exit select check in transformtoPartialReduction.   Florian Hahn via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize (PR #179441)   Petar Avramovic via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   Alex Wang via llvm-commits
• [llvm] [bazel][lldb] Port #179355: data formatters location (PR #179552)   Jordan Rupprecht via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize (PR #179441)   Petar Avramovic via llvm-commits
• [llvm] [DAG] Define computeConstantRange for VSCALE folding (PR #176027)   Neil Phan via llvm-commits
• [llvm] [DAG] Define computeConstantRange for VSCALE folding (PR #176027)   Neil Phan via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize (PR #179441)   Petar Avramovic via llvm-commits
• [llvm] [SelectionDAGISel] Separate the operand numbers in OPC_EmitNode/MorphNodeTo into their own table. (PR #178722)   Craig Topper via llvm-commits
• [llvm] 43faefd - [ArgPromotion] Add DW_CC_nocall to DISubprogram (#178973)   via llvm-commits
• [llvm] [ArgPromotion] Add DW_CC_nocall to DISubprogram (PR #178973)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize (PR #179441)   Petar Avramovic via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [llvm] Fix emulated TLS alignment for large variables (PR #171037)   Eli Friedman via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [llvm] [LV] Allow loops with multiple early exits in legality checks. (PR #176403)   via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Islam Imad via llvm-commits
• [llvm] [RISCV] Use RVInstVV as the base for CustomSiFiveVMACC. NFC (PR #179565)   Craig Topper via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add buffer load format D16 RegBankLegalize rules (PR #179566)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add buffer load format D16 RegBankLegalize rules (PR #179566)   via llvm-commits
• [llvm] [RISCV] Use RVInstVV as the base for CustomSiFiveVMACC. NFC (PR #179565)   via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   via llvm-commits
• [llvm] [LoopVectorize] Support vectorization of overflow intrinsics (PR #174835)   via llvm-commits
• [llvm] [SLP] Reordered disjoint or reduction of shl(zext, (0, stride, 2* stride)) modelled as bitcast (PR #178292)   Björn Pettersson via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Islam Imad via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [llvm] aa00a34 - [RISCV] Sink some encoding related lets into class/def bodies. NFC (#179544)   via llvm-commits
• [llvm] [RISCV] Sink some encoding related lets into class/def bodies. NFC (PR #179544)   Craig Topper via llvm-commits
• [clang] [llvm] [Offloading] Extend OffloadBinary format to support multiple metadata entries (PR #169425)   Yury Plyakhin via llvm-commits
• [llvm] 3bd2ae7 - [X86] Add test coverage for #179008 (#179562)   via llvm-commits
• [llvm] [BasicAA][TLI] Treat local-linkage globals or known environments as not aliasing errno (PR #170290)   Eli Friedman via llvm-commits
• [llvm] [BasicAA][TLI] Treat local-linkage globals or known environments as not aliasing errno (PR #170290)   Eli Friedman via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Dmitry Sidorov via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [llvm] Reland "[llvm-readobj] Dump callgraph section info for ELF" (PR #176260)   Prabhu Rajasekaran via llvm-commits
• [llvm] [TargetParser][cmake] Recurse for TableGen deps (PR #177274)   LLVM Continuous Integration via llvm-commits
• [llvm] [BOLT] Fix fixed pic handling in indirect jumps (PR #178578)   Haibo Jiang via llvm-commits
• [llvm] [MC][Wasm] Emit useful error message when encountering common symbols (PR #179586)   Derek Schuff via llvm-commits
• [llvm] [MC][Wasm] Emit useful error message when encountering common symbols (PR #179586)   via llvm-commits
• [llvm] [MC][Wasm] Emit useful error message when encountering common symbols (PR #179586)   via llvm-commits
• [llvm] [MC][Wasm] Emit useful error message when encountering common symbols (PR #179586)   Derek Schuff via llvm-commits
• [llvm] [OFFLOAD] Extend olMemRegister API to handle cases when a memory block may have been mapped outside of liboffload. (PR #172226)   via llvm-commits
• [llvm] OCaml bindings: Remove `ctypes` dependency (PR #179417)   Alan Hu via llvm-commits
• [llvm] [RISCV] Cost UDIV/UREM by a constant power of 2 as a SHL/AND in getArithmeticInstrCost() (PR #179570)   Ryan Buchner via llvm-commits
• [llvm] [ARM] Recognize abi tag module flags (PR #161306)   via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   YongKang Zhu via llvm-commits
• [llvm] [BOLT][NFC] Stop populating unnecessary samples into MemSamples (PR #179472)   Shanzhi Chen via llvm-commits
• [llvm] [update_mc_test_checks] Fix llvm-mc invocation on Windows by avoiding echo pipe (PR #179381)   Harrison Hao via llvm-commits
• [llvm] [update_mc_test_checks] Fix llvm-mc invocation on Windows by avoiding echo pipe (PR #179381)   Aiden Grossman via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Lleu Yang via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   YongKang Zhu via llvm-commits
• [llvm] [RISCV] Use RVInstVV as the base for CustomSiFiveVMACC. NFC (PR #179565)   Petr Penzin via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Lleu Yang via llvm-commits
• [llvm] [RISCV] Use RVInstVV as the base for CustomSiFiveVMACC. NFC (PR #179565)   via llvm-commits
• [llvm] [update_mc_test_checks] Fix llvm-mc invocation on Windows by avoiding echo pipe (PR #179381)   Harrison Hao via llvm-commits
• [llvm] [RISCV] Update Andes45 vector integer arithmetic scheduling info (PR #174538)   Min-Yih Hsu via llvm-commits
• [llvm] [RISCV] Use RVInstVV as the base for CustomSiFiveVMACC. NFC (PR #179565)   Min-Yih Hsu via llvm-commits
• [llvm] [DA] Introduce domain for monotonicity (PR #176367)   Michael Kruse via llvm-commits
• [llvm] [CodeGen][TII] Delete analyzeSelect hook (PR #175828)   Sam Elliott via llvm-commits
• [llvm] [NFCI][Analysis] Extract alloca slice analysis from SROA (PR #179593)   Jameson Nash via llvm-commits
• [llvm] [TableGen][NFC] Use templated std::clamp (PR #179400)   Rahul Joshi via llvm-commits
• [llvm] [HEXAGON] Extend/Truncate the shift amount into i32 (PR #179499)   Abinaya Saravanan via llvm-commits
• [clang] [compiler-rt] [llvm] [AIX] Implement the ifunc attribute. (PR #153049)   Wael Yehia via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Lleu Yang via llvm-commits
• [llvm] [HEXAGON] Extend/Truncate the shift amount into i32 (PR #179499)   Brian Cain via llvm-commits
• [llvm] [RISCV] Add isel patterns to form vwsll.vx/vi when the LHS is an any_extend. (PR #179571)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Lower disjoint shuffle of shuffles to MERGE-GATHER sequence (PR #178095)   Luke Lau via llvm-commits
• [clang] [compiler-rt] [llvm] [AIX] Implement the ifunc attribute. (PR #153049)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Don't emit VP_SETCC in combineVectorSizedSetCCEquality (PR #179479)   Pengcheng Wang via llvm-commits
• [lld] d53bf41 - [ELF] Support DW_EH_PE_sdata8 encoding in .eh_frame_hdr (#179089)   via llvm-commits
• [lld] [ELF] Support DW_EH_PE_sdata8 encoding in .eh_frame_hdr (PR #179089)   Fangrui Song via llvm-commits
• [lld] [ELF] Support DW_EH_PE_sdata8 encoding in .eh_frame_hdr (PR #179089)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Add machineFunctionInfo to recent MIR tests (PR #179602)   via llvm-commits
• [llvm] [AMDGPU] Add machineFunctionInfo to recent MIR tests (PR #179602)   via llvm-commits
• [llvm] [BOLT][NFC] Stop populating unnecessary samples into MemSamples (PR #179472)   Shanzhi Chen via llvm-commits
• [llvm] [AMDGPU][NPM] Add target-specific register allocation options (PR #178889)   Christudasan Devadasan via llvm-commits
• [llvm] [InstCombine] Fix #163110: Fold icmp (shl X, L), (add (shl Y, L), 1<<L) to icmp X, (Y + 1) (PR #165975)   via llvm-commits
• [llvm] [RISCV] Don't emit VP_SETCC in combineVectorSizedSetCCEquality (PR #179479)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Fix #163110: Fold icmp (shl X, L), (add (shl Y, L), 1<<L) to icmp X, (Y + 1) (PR #165975)   via llvm-commits
• [llvm] [NewPM][X86] Make AsmPrinter work with NewPM (PR #173740)   Christudasan Devadasan via llvm-commits
• [llvm] [HEXAGON] Extend/Truncate the shift amount into i32 (PR #179499)   Ikhlas Ajbar via llvm-commits
• [llvm] [RISCV] Cost UDIV/UREM by a constant power of 2 as a SHL/AND in getArithmeticInstrCost() (PR #179570)   Luke Lau via llvm-commits
• [llvm] [RISCV] Cost UDIV/UREM by a constant power of 2 as a SHL/AND in getArithmeticInstrCost() (PR #179570)   Luke Lau via llvm-commits
• [llvm] [AArch64][GISel] Optimize i128 stores by splitting into two i64 stores (PR #170276)   Dhruv Chawla via llvm-commits
• [llvm] [AMDGPU] Add machineFunctionInfo to recent MIR tests (PR #179602)   Carl Ritson via llvm-commits
• [llvm] [mlir] [flang][openmp] Fix GPU byref reduction descriptor initialization (PR #178934)   Kareem Ergawy via llvm-commits
• [llvm] [VPlan] Detect and create partial reductions in VPlan. (NFCI) (PR #167851)   Shunsuke Watanabe via llvm-commits
• [llvm] a3a15f3 - [LLVM] Remove 'libclc' from ALL projects (#179485)   via llvm-commits
• [llvm] [LLVM] Remove 'libclc' from ALL projects (PR #179485)   Joseph Huber via llvm-commits
• [llvm] [NFC][LoopDistribute] Add test for doubly nested loop (PR #179263)   Madhur Amilkanthwar via llvm-commits
• [llvm] [NFC][LoopDistribute] Add test for doubly nested loop (PR #179263)   Madhur Amilkanthwar via llvm-commits
• [llvm] [NFC][LoopDistribute] Add test for doubly nested loop (PR #179263)   Madhur Amilkanthwar via llvm-commits
• [llvm] [NFC][LoopDistribute] Add test for doubly nested loop (PR #179263)   Madhur Amilkanthwar via llvm-commits
• [llvm] [LLVM] Remove 'libclc' from ALL projects (PR #179485)   LLVM Continuous Integration via llvm-commits
• [lld] [ELF] Support DW_EH_PE_sdata8 encoding in .eh_frame_hdr (PR #179089)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   Alex Wang via llvm-commits
• [llvm] [LLVM] Remove 'libclc' from ALL projects (PR #179485)   LLVM Continuous Integration via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Chris Cotter via llvm-commits
• [llvm] [NFC][LoopDistribute] Add test for doubly nested loop (PR #179263)   via llvm-commits
• [llvm] [LegalizeVectorTypes] Don't emit VP_SELECT when widening MLOAD to VP_LOAD (PR #179478)   Luke Lau via llvm-commits
• [llvm] [LegalizeVectorTypes] Don't emit VP_SELECT when widening MLOAD to VP_LOAD (PR #179478)   Luke Lau via llvm-commits
• [llvm] [LegalizeVectorTypes] Don't emit VP_SELECT when widening MLOAD to VP_LOAD (PR #179478)   Luke Lau via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   Phoebe Wang via llvm-commits
• [llvm] [LegalizeVectorTypes] Don't emit VP_SELECT when widening MLOAD to VP_LOAD (PR #179478)   Luke Lau via llvm-commits
• [llvm] [InstCombine] Bubble splices of binop operands to their result (PR #179432)   Luke Lau via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo] Fix maxoffset calculation in buildSpillLoadStore (PR #179182)   Abhinav Garg via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo] Fix maxoffset calculation in buildSpillLoadStore (PR #179182)   Abhinav Garg via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo] Fix maxoffset calculation in buildSpillLoadStore (PR #179182)   Abhinav Garg via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo] Fix maxoffset calculation in buildSpillLoadStore (PR #179182)   Abhinav Garg via llvm-commits
• [llvm] 7b2190c - [RISCV] Enable SelectCompressOpt with HasStdExtZca. (#179601)   via llvm-commits
• [llvm] [RISCV] Enable SelectCompressOpt with HasStdExtZca. (PR #179601)   Craig Topper via llvm-commits
• [llvm] a03f82d - [AMDGPU][NPM] Add target-specific register allocation options (#178889)   via llvm-commits
• [llvm] [AMDGPU][NPM] Add target-specific register allocation options (PR #178889)   Teja Alaghari via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] d8073d9 - [InstCombine] Bubble splices of binop operands to their result (#179432)   via llvm-commits
• [llvm] [InstCombine] Bubble splices of binop operands to their result (PR #179432)   Luke Lau via llvm-commits
• [llvm] [IROutliner] Add TTI Hook for Propagating Attributes (PR #153985)   Chuanqi Xu via llvm-commits
• [llvm] [update_mc_test_checks] Fix llvm-mc invocation on Windows by avoiding echo pipe (PR #179381)   Harrison Hao via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   Luke Lau via llvm-commits
• [llvm] [LoongArch][NFC] Add tests for vxi1 vector masks used with AND/OR/XOR operations on lasx (PR #163490)   Zhaoxin Yang via llvm-commits
• [llvm] 0d11f68 - [RISCV] Run VLOptimizer right after ISel (#179377)   via llvm-commits
• [llvm] [RISCV] Run VLOptimizer right after ISel (PR #179377)   Min-Yih Hsu via llvm-commits
• [llvm] [LV] Convert scatter w/uniform addr and mask being header mask to scalar store. (PR #172799)   Elvis Wang via llvm-commits
• [llvm] [CodeGen][NPM] Support generic regalloc-npm option (PR #172485)   Teja Alaghari via llvm-commits
• [llvm] [CodeGen][NPM] Support generic regalloc-npm option (PR #172485)   Teja Alaghari via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   Hua Tian via llvm-commits
• [llvm] [RISCV] Add C/Zcf/Zcd/Zce implication rules to subtarget construction. (PR #179615)   Alexander Richardson via llvm-commits
• [llvm] [RISCV] Add C/Zcf/Zcd/Zce implication rules to subtarget construction. (PR #179615)   Alexander Richardson via llvm-commits
• [llvm] [RISCV] Add C/Zcf/Zcd/Zce implication rules to subtarget construction. (PR #179615)   Alexander Richardson via llvm-commits
• [llvm] [RISCV] Add C/Zcf/Zcd/Zce implication rules to subtarget construction. (PR #179615)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add C/Zcf/Zcd/Zce implication rules to subtarget construction. (PR #179615)   via llvm-commits
• [lld] [lld] Add support for .eh_frame_hdr sdata8 (PR #174486)   Fangrui Song via llvm-commits
• [llvm] [BOLT][NFC] Stop populating unnecessary samples into MemSamples (PR #179472)   Shanzhi Chen via llvm-commits
• [llvm] [RISCV] Add C/Zcf/Zcd/Zce implication rules to subtarget construction. (PR #179615)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add C/Zcf/Zcd/Zce implication rules to subtarget construction. (PR #179615)   Craig Topper via llvm-commits
• [llvm] OCaml bindings: Remove `ctypes` dependency (PR #179417)   Nicolás Ojeda Bär via llvm-commits
• [llvm] [RISCV] Add C/Zcf/Zcd/Zce implication rules to subtarget construction. (PR #179615)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add C/Zcf/Zcd/Zce implication rules to subtarget construction. (PR #179615)   Craig Topper via llvm-commits
• [llvm] 3794b83 - [RISCV] Don't emit VP_SETCC in combineVectorSizedSetCCEquality. NFC (#179479)   via llvm-commits
• [llvm] [RISCV] Don't emit VP_SETCC in combineVectorSizedSetCCEquality. NFC (PR #179479)   Luke Lau via llvm-commits
• [llvm] [BOLT][NFC] Stop populating unnecessary samples into MemSamples (PR #179472)   Shanzhi Chen via llvm-commits
• [clang] [llvm] [RISCV] Add SpacemiT A100 processor definition (PR #174052)   Mark Zhuang via llvm-commits
• [llvm] [LLVM] Remove 'libclc' from ALL projects (PR #179485)   LLVM Continuous Integration via llvm-commits
• [clang] [compiler-rt] [llvm] [AIX] Implement the ifunc attribute. (PR #153049)   LLVM Continuous Integration via llvm-commits
• [llvm] [update_mc_test_checks] Fix llvm-mc invocation on Windows by avoiding echo pipe (PR #179381)   Harrison Hao via llvm-commits
• [llvm] 653b336 - [LegalizeVectorTypes] Don't emit VP_SELECT when widening MLOAD to VP_LOAD (#179478)   via llvm-commits
• [llvm] [LegalizeVectorTypes] Don't emit VP_SELECT when widening MLOAD to VP_LOAD (PR #179478)   Luke Lau via llvm-commits
• [llvm] [RISCV] Don't emit VP_SETCC in combineVectorSizedSetCCEquality. NFC (PR #179479)   LLVM Continuous Integration via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   Julian Pokrovsky via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Lleu Yang via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Lleu Yang via llvm-commits
• [llvm] [RISCV] Add C/Zcf/Zcd/Zce implication rules to subtarget construction. (PR #179615)   Craig Topper via llvm-commits
• [llvm] [SystemZ][GOFF] Implement lowerConstant (PR #179394)   Ulrich Weigand via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((Mask - AddC) - X) & Mask (PR #174278)   via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   David Sherwood via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   Julian Pokrovsky via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Pankaj Dwivedi via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] [SystemZ][z/OS] Reverse the order of instructions to save and restore CSRs (PR #179540)   Ulrich Weigand via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] [RISCV] Remove codegen for trivial VP intrinsics (PR #179622)   via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] [RISCV] Remove codegen for trivial VP intrinsics (PR #179622)   via llvm-commits
• [llvm] [llvm-ir2vec] adding BB-embedding map API to ir2vec python bindings (PR #177172)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding inst-embedding map API to ir2vec python bindings (PR #177308)   Nishant Sachdeva via llvm-commits
• [llvm] [MemoryBuiltins] Fix crash on large global variables (PR #178391)   Steffen Larsen via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding inst-embedding map API to ir2vec python bindings (PR #177308)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding BB-embedding map API to ir2vec python bindings (PR #177172)   Nishant Sachdeva via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [llvm] 4553f99 - [SPIRV] selectDot4AddPacked: add missing PackedVectorFormat4x8Bit optional operand (#179476)   via llvm-commits
• [llvm] [SPIRV] selectDot4AddPacked: add missing PackedVectorFormat4x8Bit optional operand (PR #179476)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] 04c5650 - [NFC][LLVM] Make `constrainSelectedInstRegOperands` return `void` (#179501)   via llvm-commits
• [llvm] [NFC][LLVM] Make `constrainSelectedInstRegOperands` return `void` (PR #179501)   Juan Manuel Martinez Caamaño via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Don't emit VP_SETCC in combineVectorSizedSetCCEquality. NFC (PR #179479)   LLVM Continuous Integration via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #179304)   Guray Ozen via llvm-commits
• [llvm] [RISCV] Remove codegen for trivial VP intrinsics (PR #179622)   Craig Topper via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Pankaj Dwivedi via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - extend X86ISD::BZHI handling. Fixes 177364. (PR #179444)   Shamshura Egor via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   Julian Pokrovsky via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [llvm] [MemoryBuiltins] Fix crash on large global variables (PR #178391)   Nikita Popov via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Pankaj Dwivedi via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [llvm] [Offload][L0] Print build and link logs upon failure (PR #179543)   Alex Duran via llvm-commits
• [llvm] [Offload][L0] Print build and link logs upon failure (PR #179543)   Alex Duran via llvm-commits
• [llvm] [RISCV] Add C/Zcf/Zcd/Zce implication rules to subtarget construction. (PR #179615)   Sam Elliott via llvm-commits
• [llvm] [CodeGen][TII] Delete analyzeSelect hook (PR #175828)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] using divergent/uniform information in ISel of zext (PR #174539)   Zeng Wu via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   David Green via llvm-commits
• [llvm] 2b887ce - [SimpleLoopUnswitch][NFC] move quadratic asserts under EXPENSIVE_CHECKS (#144887)   via llvm-commits
• [llvm] [SimpleLoopUnswitch][NFC] move quadratic asserts under EXPENSIVE_CHECKS (PR #144887)   via llvm-commits
• [llvm] [X86] Lower CTTZ/CTLZ vXi8 vectors using GF2P8AFFINEQB (PR #118012)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower CTTZ/CTLZ vXi8 vectors using GF2P8AFFINEQB (PR #118012)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower CTTZ/CTLZ vXi8 vectors using GF2P8AFFINEQB (PR #118012)   Simon Pilgrim via llvm-commits
• [llvm] [BasicBlockUtils] Fix loopinfo header in split block before (PR #179408)   Yevgeny Rouban via llvm-commits
• [llvm] [NFCI][Analysis] Extract alloca slice analysis from SROA (PR #179593)   Nikita Popov via llvm-commits
• [llvm] [Verifier] Make verifier fail when global variable size exceeds address space size (PR #179625)   Steffen Larsen via llvm-commits
• [llvm] [MemoryBuiltins] Fix crash on large global variables (PR #178391)   Steffen Larsen via llvm-commits
• [llvm] [MemoryBuiltins] Fix crash on large global variables (PR #178391)   Steffen Larsen via llvm-commits
• [llvm] [Verifier] Make verifier fail when global variable size exceeds address space size (PR #179625)   via llvm-commits
• [llvm] In-class initialize DenseMapBase members. (PR #177168)   Tim Gymnich via llvm-commits
• [llvm] [Verifier] Make verifier fail when global variable size exceeds address space size (PR #179625)   Steffen Larsen via llvm-commits
• [llvm] [lit] Avoid multiprocessing for -j1 runs (PR #175587)   via llvm-commits
• [llvm] [Verifier] Make verifier fail when global variable size exceeds address space size (PR #179625)   Nikita Popov via llvm-commits
• [llvm] [Verifier] Make verifier fail when global variable size exceeds address space size (PR #179625)   Nikita Popov via llvm-commits
• [llvm] [Verifier] Make verifier fail when global variable size exceeds address space size (PR #179625)   Nikita Popov via llvm-commits
• [llvm] [llvm] Force TLSDESC for all TLS access in Fuchsia code (PR #179509)   Nikita Popov via llvm-commits
• [compiler-rt] Fix: windows i386 builtins tests (PR #179062)   Hans Wennborg via llvm-commits
• [llvm] dd02b40 - [X86] Lower CTTZ/CTLZ vXi8 vectors using GF2P8AFFINEQB (#118012)   via llvm-commits
• [llvm] [X86] Lower CTTZ/CTLZ vXi8 vectors using GF2P8AFFINEQB (PR #118012)   Simon Pilgrim via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   via llvm-commits
• [llvm] [BasicBlockUtils] Fix loopinfo header in split block before (PR #179408)   Nikita Popov via llvm-commits
• [llvm] [BasicBlockUtils] Fix loopinfo header in split block before (PR #179408)   Nikita Popov via llvm-commits
• [llvm] [BasicBlockUtils] Fix loopinfo header in split block before (PR #179408)   Nikita Popov via llvm-commits
• [llvm] 90c632a - [PowerPC] Only set QualName symbol on first section switch (#179253)   via llvm-commits
• [llvm] [PowerPC] Only set QualName symbol on first section switch (PR #179253)   Nikita Popov via llvm-commits
• [llvm] [PowerPC] Only set QualName symbol on first section switch (PR #179253)   Nikita Popov via llvm-commits
• [llvm] [PowerPC] Only set QualName symbol on first section switch (PR #179253)   Nikita Popov via llvm-commits
• [llvm] Fixxed issue where affine loops would cause legacy and VPlan to produce diffrent cost estimates (PR #177813)   Dominik Steenken via llvm-commits
• [llvm] [VPlan] Introduce VPNumProcessedElementsPHIRecipe for variable-length stepping (PR #177114)   Shih-Po Hung via llvm-commits
• [llvm] [RISCV] Enable select optimization by default (PR #178394)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) (PR #168535)   Tarcísio Fischer via llvm-commits
• [llvm] [X86] Fold EXPAND(X,Y,M) -> SELECT(M,X,Y) when M is a lowest bit mask (PR #179630)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Introduce VPNumProcessedElementsPHIRecipe for variable-length stepping (PR #177114)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan] Introduce generic variable-length step support (PR #177114)   Shih-Po Hung via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   David Sherwood via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   David Sherwood via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   David Sherwood via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   David Sherwood via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   David Sherwood via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   David Sherwood via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   David Sherwood via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   David Sherwood via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   David Sherwood via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   David Sherwood via llvm-commits
• [llvm] [X86] Fold EXPAND(X,Y,M) -> SELECT(M,X,Y) when M is a lowest bit mask (PR #179630)   via llvm-commits
• [llvm] [VPlan] Introduce generic variable-length step support (PR #177114)   Shih-Po Hung via llvm-commits
• [llvm] [PowerPC] Only set QualName symbol on first section switch (PR #179253)   via llvm-commits
• [llvm] [BOLT] Fix scavenge register after program point (PR #179207)   Haibo Jiang via llvm-commits
• [llvm] [VPlan] Introduce generic variable-length step support (PR #177114)   Shih-Po Hung via llvm-commits
• [llvm] [VPlan] Introduce generic variable-length step support (PR #177114)   Shih-Po Hung via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   Simon Pilgrim via llvm-commits
• [llvm] [BasicBlockUtils] Fix loopinfo header in split block before (PR #179408)   Yevgeny Rouban via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Islam Imad via llvm-commits
• [llvm] [RISCV] Enable select optimization by default (PR #178394)   Pengcheng Wang via llvm-commits
• [llvm] [BasicBlockUtils] Fix loopinfo header in split block before (PR #179408)   Nikita Popov via llvm-commits
• [llvm] [NFC][LLVM] Make `MachineInstrBuilder::constrainAllUses` return `void` (PR #179632)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][LLVM] Make `MachineInstrBuilder::constrainAllUses` return `void` (PR #179632)   via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [MFS] Implement -fsplit-machine-functions for Mach-O (ARM64) (PR #179449)   Anton Bikineev via llvm-commits
• [llvm] [PowerPC] Only set QualName symbol on first section switch (PR #179253)   LLVM Continuous Integration via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Pankaj Dwivedi via llvm-commits
• [llvm] 974b768 - [AArch64] Add clmul AArch64 lowering tests (#179495)   via llvm-commits
• [llvm] [AArch64] Add clmul AArch64 lowering tests (PR #179495)   Matthew Devereau via llvm-commits
• [llvm] [RISCV] Cost UDIV/UREM by a constant power of 2 as a SHL/AND in getArithmeticInstrCost() (PR #179570)   Simon Pilgrim via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize (PR #179441)   Petar Avramovic via llvm-commits
• [llvm] [LowerMemIntrinsics] Optimize memset lowering (PR #169040)   Fabian Ritter via llvm-commits
• [llvm] [X86] Fold EXPAND(X,Y,M) -> SELECT(M,X,Y) when M is a lowest bit mask (PR #179630)   Simon Pilgrim via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Simon Pilgrim via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Add CmpLG and OrN2 operators to LaneMaskConstants (PR #179493)   via llvm-commits
• [llvm] [LowerMemIntrinsics] Optimize memset lowering (PR #169040)   Fabian Ritter via llvm-commits
• [llvm] [NFC][LLVM] Make `MachineInstrBuilder::constrainAllUses` return `void` (PR #179632)   via llvm-commits
• [llvm] [NFC][LLVM] Make `MachineInstrBuilder::constrainAllUses` return `void` (PR #179632)   via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] [AMDGPU] Fix missing waitcnt after buffer_wbl2 (PR #178316)   Pierre van Houtryve via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Move eventCounter() function (PR #178949)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Move eventCounter() function (PR #178949)   Pierre van Houtryve via llvm-commits
• [llvm] [GlobalISel] Combine into abd[su] and legalize abd[su] (PR #179437)   Julian Pokrovsky via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [llvm] [Hexagon] Add global region scaffolding (PR #179541)   Yashas Andaluri via llvm-commits
• [llvm] 275eea2 - [HEXAGON] Extend/Truncate the shift amount into i32 (#179499)   via llvm-commits
• [llvm] [HEXAGON] Extend/Truncate the shift amount into i32 (PR #179499)   Abinaya Saravanan via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] [NFC][LLVM] Make `MachineInstrBuilder::constrainAllUses` return `void` (PR #179632)   Matt Arsenault via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   Simon Pilgrim via llvm-commits
• [llvm] [NFC][LLVM] Make `MachineInstrBuilder::constrainAllUses` return `void` (PR #179632)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] a631f3e - [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (#179103)   via llvm-commits
• [llvm] [X86] Fold vgf2p8affineqb XOR with splat constant into immediate (PR #179103)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Islam Imad via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Islam Imad via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   via llvm-commits
• [llvm] [AArch64] Add clmul AArch64 lowering tests (PR #179495)   LLVM Continuous Integration via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Pankaj Dwivedi via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Add machineFunctionInfo to recent MIR tests (PR #179602)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add machineFunctionInfo to recent MIR tests (PR #179602)   Matt Arsenault via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Florian Hahn via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Florian Hahn via llvm-commits
• [llvm] 046413f - AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize (#179441)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize (PR #179441)   Matt Arsenault via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   Matt Arsenault via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   Matt Arsenault via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - extend X86ISD::BZHI handling. Fixes 177364. (PR #179444)   Simon Pilgrim via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - extend X86ISD::BZHI handling. Fixes 177364. (PR #179444)   Simon Pilgrim via llvm-commits
• [llvm] [CodeGen] Simplify ExpandPostRA::LowerSubregToReg. NFC. (PR #179634)   Jay Foad via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - extend X86ISD::BZHI handling. Fixes 177364. (PR #179444)   Simon Pilgrim via llvm-commits
• [llvm] [CodeGen] Simplify ExpandPostRA::LowerSubregToReg. NFC. (PR #179634)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Simplify ExpandPostRA::LowerSubregToReg. NFC. (PR #179634)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Simplify ExpandPostRA::LowerSubregToReg. NFC. (PR #179634)   via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Manuel Carrasco via llvm-commits
• [llvm] [CodeGen] Simplify ExpandPostRA::LowerSubregToReg. NFC. (PR #179634)   Matt Arsenault via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Manuel Carrasco via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [llvm] [AMDGPU] Add CmpLG and OrN2 operators to LaneMaskConstants (PR #179493)   Matt Arsenault via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Manuel Carrasco via llvm-commits
• [llvm] [AArch64][SME] Add missing ZT0 transition (PR #179193)   Benjamin Maxwell via llvm-commits
• [llvm] [AMDGPU] Handle vector types for reqd_work_group_size constant folding. (PR #179551)   Matt Arsenault via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Manuel Carrasco via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Manuel Carrasco via llvm-commits
• [llvm] [GlobalISel] Combine into abd[su] and legalize abd[su] (PR #179437)   via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary (PR #179318)   Dmitry Sidorov via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary (PR #179318)   Dmitry Sidorov via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary (PR #179318)   Dmitry Sidorov via llvm-commits
• [llvm] Early exit llvm-bolt when coming across empty data files (PR #176859)   Yashwant Singh via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Florian Hahn via llvm-commits
• [llvm] [X86] Fold EXPAND(X,Y,M) -> SELECT(M,X,Y) when M is a lowest bit mask (PR #179630)   Phoebe Wang via llvm-commits
• [llvm] [X86] Fold EXPAND(X,Y,M) -> SELECT(M,X,Y) when M is a lowest bit mask (PR #179630)   Phoebe Wang via llvm-commits
• [llvm] [X86] Fold EXPAND(X,Y,M) -> SELECT(M,X,Y) when M is a lowest bit mask (PR #179630)   Phoebe Wang via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.convert.from.arbitrary (PR #179318)   Dmitry Sidorov via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix sgpr s16 unmerge lowering in regbanklegalize (PR #179441)   LLVM Continuous Integration via llvm-commits
• [llvm] [PowerPC] Only set QualName symbol on first section switch (PR #179253)   LLVM Continuous Integration via llvm-commits
• [llvm] [AArch64][SME] Add missing ZT0 transition (PR #179193)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Add missing ZT0 transition (PR #179193)   Benjamin Maxwell via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Lleu Yang via llvm-commits
• [llvm] [VPlan] Narrow VPWidenCastRecipe to scalar cast recipe. (PR #166514)   Mel Chen via llvm-commits
• [libcxx] [llvm] [XRay] Add bounds check before memcpy in readBinaryFormatHeader (PR #178499)   via llvm-commits
• [llvm] [VPlan] Narrow VPWidenCastRecipe to scalar cast recipe. (PR #166514)   Mel Chen via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Matt Arsenault via llvm-commits
• [llvm] 2808332 - [X86] computeKnownBitsForTargetNode - extend X86ISD::BZHI handling. Fixes 177364. (#179444)   via llvm-commits
• [llvm] [X86] computeKnownBitsForTargetNode - extend X86ISD::BZHI handling. Fixes 177364. (PR #179444)   Simon Pilgrim via llvm-commits
• [llvm] 05db0c4 - [AMDGPU] Add CmpLG and OrN2 operators to LaneMaskConstants (#179493)   via llvm-commits
• [llvm] [AMDGPU] Add CmpLG and OrN2 operators to LaneMaskConstants (PR #179493)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add CmpLG and OrN2 operators to LaneMaskConstants (PR #179493)   via llvm-commits
• [llvm] [AArch64] Fix a couple of typos (NFC) (PR #179639)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Fix a couple of typos (NFC) (PR #179639)   Benjamin Maxwell via llvm-commits
• [llvm] 071bb46 - [AMDGPU][SIRegisterInfo] Fix maxoffset calculation in buildSpillLoadStore (#179182)   via llvm-commits
• [llvm] [AMDGPU][SIRegisterInfo] Fix maxoffset calculation in buildSpillLoadStore (PR #179182)   Abhinav Garg via llvm-commits
• [llvm] [Uniformity] Avoid marking all PHIs as divergent in join blocks (PR #157808)   Carl Ritson via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Manuel Carrasco via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Matt Arsenault via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Matt Arsenault via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Sander de Smalen via llvm-commits
• [llvm] [InstCombine] Bail out on type mismatch in foldBitCastBitwiseLogic (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [Uniformity] Avoid marking all PHIs as divergent in join blocks (PR #157808)   via llvm-commits
• [llvm] [Uniformity] Avoid marking all PHIs as divergent in join blocks (PR #157808)   via llvm-commits
• [llvm] [InstCombine] Bail out on type mismatch in foldBitCastBitwiseLogic (PR #179640)   via llvm-commits
• [llvm] [InstCombine] Bail out on type mismatch in foldBitCastBitwiseLogic (PR #179640)   via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Sander de Smalen via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Lleu Yang via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add CmpLG and OrN2 operators to LaneMaskConstants (PR #179493)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   Jay Foad via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   Matt Arsenault via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   Matt Arsenault via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   Matt Arsenault via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   S. VenkataKeerthy via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   S. VenkataKeerthy via llvm-commits
• [llvm] 49bf907 - [NFC][LLVM] Make `MachineInstrBuilder::constrainAllUses` return `void` (#179632)   via llvm-commits
• [llvm] [NFC][LLVM] Make `MachineInstrBuilder::constrainAllUses` return `void` (PR #179632)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Expand VPBlendRecipe earlier in simplifyBlends (PR #171851)   Florian Hahn via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Steven Perron via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   Nashe Mncube via llvm-commits
• [llvm] Add clmul zext AArch64 lowering tests (PR #179641)   Matthew Devereau via llvm-commits
• [llvm] Add clmul zext AArch64 lowering tests (PR #179641)   via llvm-commits
• [llvm] [CodeGen] Simplify ExpandPostRA::LowerSubregToReg. NFC. (PR #179634)   Jay Foad via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Islam Imad via llvm-commits
• [llvm] [llvm-ir2vec] adding inst-embedding map API to ir2vec python bindings (PR #177308)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding BB-embedding map API to ir2vec python bindings (PR #177172)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   Florian Hahn via llvm-commits
• [llvm] [llvm-ir2vec] adding BB-embedding map API to ir2vec python bindings (PR #177172)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding function-embedding map API to ir2vec python bindings (PR #177166)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding inst-embedding map API to ir2vec python bindings (PR #177308)   Nishant Sachdeva via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Lleu Yang via llvm-commits
• [llvm] [LoopVectorize] Perform loop versioning for some early exit loops (PR #120603)   Florian Hahn via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   Florian Hahn via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   Florian Hahn via llvm-commits
• [llvm] [NFC][LLVM] Make `MachineInstrBuilder::constrainAllUses` return `void` (PR #179632)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] Fold EXPAND(X,Y,M) -> SELECT(M,X,Y) when M is a lowest bit mask (PR #179630)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold EXPAND(X,Y,M) -> SELECT(M,X,Y) when M is a lowest bit mask (PR #179630)   Simon Pilgrim via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Manuel Carrasco via llvm-commits
• [llvm] [AArch64] Codegen for AArch64 Return Address Signing Hardening (PR #176187)   Victor Campos via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [AArch64] Codegen for AArch64 Return Address Signing Hardening (PR #176187)   Victor Campos via llvm-commits
• [llvm] ea7f8c8 - [AArch64] Fix a couple of typos (NFC) (#179639)   via llvm-commits
• [llvm] [AArch64] Fix a couple of typos (NFC) (PR #179639)   Benjamin Maxwell via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [SROA] Avoid redundant `.oldload` generation when `memset` fully covers a partition (PR #179643)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [NFC][LoopDistribute] Add test for doubly nested loop (PR #179263)   Michael Kruse via llvm-commits
• [llvm] [SROA] Avoid redundant `.oldload` generation when `memset` fully covers a partition (PR #179643)   via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Matt Arsenault via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Matt Arsenault via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Matt Arsenault via llvm-commits
• [clang] [compiler-rt] [llvm] [PGO][AMDGPU] Add offload profiling with uniformity-aware optimization (PR #177665)   Matt Arsenault via llvm-commits
• [llvm] [BOLT] Fix fixed pic handling in indirect jumps (PR #178578)   Alexey Moksyakov via llvm-commits
• [llvm] [SROA] Avoid redundant `.oldload` generation when `memset` fully covers a partition (PR #179643)   via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Lleu Yang via llvm-commits
• [llvm] Add SDNodeFlag::NoConvergent (PR #179323)   Matt Arsenault via llvm-commits
• [llvm] [SROA] Avoid redundant `.oldload` generation when `memset` fully covers a partition (PR #179643)   via llvm-commits
• [llvm] [GlobalISel] Combine into abd[su] and legalize abd[su] (PR #179437)   Julian Pokrovsky via llvm-commits
• [llvm] 0fe9454 - [X86] Fold EXPAND(X, Y, M) -> SELECT(M, X, Y) when M is a lowest bit mask (#179630)   via llvm-commits
• [llvm] [X86] Fold EXPAND(X,Y,M) -> SELECT(M,X,Y) when M is a lowest bit mask (PR #179630)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold EXPAND(X,Y,M) -> SELECT(M,X,Y) when M is a lowest bit mask (PR #179630)   Simon Pilgrim via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   Matt Arsenault via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   Jonathan Thackray via llvm-commits
• [llvm] [CodeGen] Simplify ExpandPostRA::LowerSubregToReg. NFC. (PR #179634)   via llvm-commits
• [llvm] [Verifier] Make verifier fail when global variable size exceeds address space size (PR #179625)   Steffen Larsen via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   via llvm-commits
• [llvm] [InstCombine] Optimise the expression `(C & A) | (select (C ^ true), B, false) => (C & A) | (!C & B)` with `FoldOrOfAndsWithSelectToLogical` (PR #178438)   Rajveer Singh Bharadwaj via llvm-commits
• [llvm] [AArch64][llvm] Remove `+d128` gating on `sysp`, `msrr` and `mrrs` instructions (PR #178912)   Jonathan Thackray via llvm-commits
• [llvm] a13c6ea - [CodeGen] Simplify ExpandPostRA::LowerSubregToReg. NFC. (#179634)   via llvm-commits
• [llvm] [CodeGen] Simplify ExpandPostRA::LowerSubregToReg. NFC. (PR #179634)   Jay Foad via llvm-commits
• [llvm] [BasicAA][TLI] Treat local-linkage globals or known environments as not aliasing errno (PR #170290)   Antonio Frighetto via llvm-commits
• [llvm] [BasicAA][TLI] Treat local-linkage globals or known environments as not aliasing errno (PR #170290)   Antonio Frighetto via llvm-commits
• [llvm] [BasicAA][TLI] Treat local-linkage globals or known environments as not aliasing errno (PR #170290)   Antonio Frighetto via llvm-commits
• [llvm] [Verifier] Make verifier fail when global variable size exceeds address space size (PR #179625)   Steffen Larsen via llvm-commits
• [llvm] [BasicAA][TLI] Treat local-linkage globals or known environments as not aliasing errno (PR #170290)   Antonio Frighetto via llvm-commits
• [llvm] [DA] Introduce domain for monotonicity (PR #176367)   Ryotaro Kasuga via llvm-commits
• [llvm] [SROA] Avoid redundant `.oldload` generation when `memset` fully covers a partition (PR #179643)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   Florian Hahn via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   Florian Hahn via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   Florian Hahn via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Cullen Rhodes via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Cullen Rhodes via llvm-commits
• [llvm] [InstCombine] Bail out on type mismatch in foldBitCastBitwiseLogic (PR #179640)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Bail out on type mismatch in foldBitCastBitwiseLogic (PR #179640)   Antonio Frighetto via llvm-commits
• [llvm] [InstCombine] Bail out on type mismatch in foldBitCastBitwiseLogic (PR #179640)   Antonio Frighetto via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   John Brawn via llvm-commits
• [llvm] [SROA] Avoid redundant `.oldload` generation when `memset` fully covers a partition (PR #179643)   via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   via llvm-commits
• [llvm] [SROA] Avoid redundant `.oldload` generation when `memset` fully covers a partition (PR #179643)   via llvm-commits
• [llvm] [InstCombine] Bail out on type mismatch in foldBitCastBitwiseLogic (PR #179640)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Bail out on type mismatch in foldBitCastBitwiseLogic (PR #179640)   Nikita Popov via llvm-commits
• [llvm] [DAG] Define computeConstantRange for VSCALE folding (PR #176027)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [llvm] [DAG] Define computeConstantRange for VSCALE folding (PR #176027)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Define computeConstantRange for VSCALE folding (PR #176027)   Simon Pilgrim via llvm-commits
• [llvm] [DAG] Define computeConstantRange for VSCALE folding (PR #176027)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [llvm] [InstCombine] Bail out on type mismatch in foldBitCastBitwiseLogic (PR #179640)   Nikita Popov via llvm-commits
• [llvm] [RISCV] Add optimization for memset inline (PR #146673)   Boyao Wang via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   John Brawn via llvm-commits
• [llvm] [Verifier] Make verifier fail when global variable size exceeds address space size (PR #179625)   Nikita Popov via llvm-commits
• [llvm] Add clmul zext AArch64 lowering tests (PR #179641)   David Green via llvm-commits
• [llvm] Add clmul zext AArch64 lowering tests (PR #179641)   David Green via llvm-commits
• [llvm] Add clmul zext AArch64 lowering tests (PR #179641)   David Green via llvm-commits
• [llvm] Add clmul zext AArch64 lowering tests (PR #179641)   David Green via llvm-commits
• [llvm] Add clmul zext AArch64 lowering tests (PR #179641)   David Green via llvm-commits
• [llvm] Add clmul zext AArch64 lowering tests (PR #179641)   David Green via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [llvm] [LowerMemIntrinsics] Optimize memset lowering (PR #169040)   Fabian Ritter via llvm-commits
• [llvm] d24a675 - [LowerMemIntrinsics] Optimize memset lowering (#169040)   via llvm-commits
• [llvm] [LowerMemIntrinsics] Optimize memset lowering (PR #169040)   Fabian Ritter via llvm-commits
• [llvm] [NFC][LowerMemIntrinsics] Consistent parameter name comments in function calls (PR #176751)   Fabian Ritter via llvm-commits
• [llvm] [NFC][LowerMemIntrinsics] Consistent parameter name comments in function calls (PR #176751)   Fabian Ritter via llvm-commits
• [llvm] [NFC][AArch64] Split fptoi tests and add scal_to_vec convert tests (PR #179315)   David Green via llvm-commits
• [llvm] [AMDGPU] Add half vector support for table-driven libcall optimization (PR #178638)   Matt Arsenault via llvm-commits
• [llvm] [ASan] Don't mark alloca as safe if address escapes to callee (PR #178591)   via llvm-commits
• [llvm] [SROA] Avoid redundant `.oldload` generation when `memset` fully covers a partition (PR #179643)   via llvm-commits
• [llvm] [SROA] Avoid redundant `.oldload` generation when `memset` fully covers a partition (PR #179643)   via llvm-commits
• [llvm] [UTC] Add initial VPlan support. (PR #178534)   Florian Hahn via llvm-commits
• [llvm] [Clang] Add Picolibc environment type for triples (PR #169613)   via llvm-commits
• [llvm] [SDAG] SetCC: remove spurious extensions (PR #173110)   Simon Pilgrim via llvm-commits
• [llvm] [SDAG] SetCC: remove spurious extensions (PR #173110)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   via llvm-commits
• [llvm] [BasicBlockUtils] Fix loopinfo header in split block before (PR #179408)   Yevgeny Rouban via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Manuel Carrasco via llvm-commits
• [llvm] [BasicBlockUtils] Fix loopinfo header in split block before (PR #179408)   Yevgeny Rouban via llvm-commits
• [llvm] [BasicBlockUtilsTests] Added test case splitBlockBefore2. NFC (PR #179408)   Yevgeny Rouban via llvm-commits
• [llvm] [DirectX] Fix assertion in PointerTypeAnalysis with empty global_ctors (PR #179034)   via llvm-commits
• [llvm] [DAG] Define computeConstantRange for VSCALE folding (PR #176027)   via llvm-commits
• [llvm] [BasicBlockUtilsTests] Added test case splitBlockBefore2. NFC (PR #179408)   Yevgeny Rouban via llvm-commits
• [llvm] [BasicBlockUtilsTests] Added test case splitBlockBefore2. NFC (PR #179408)   Yevgeny Rouban via llvm-commits
• [llvm] [AMDGPU] Add half vector support for table-driven libcall optimization (PR #178638)   Steffen Larsen via llvm-commits
• [llvm] [AMDGPU] Reschedule loads in clauses to improve throughput (PR #102595)   Carl Ritson via llvm-commits
• [llvm] [Tablegen] Don't emit decoder tables with islands larger than 64 bits (PR #179651)   Petr Vesely via llvm-commits
• [llvm] [Clang] Add Picolibc environment type for triples (PR #169613)   Volodymyr Turanskyy via llvm-commits
• [llvm] [Tablegen] Don't emit decoder tables with islands larger than 64 bits (PR #179651)   via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Manuel Carrasco via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   via llvm-commits
• [llvm] [AMDGPU] Add half vector support for table-driven libcall optimization (PR #178638)   Steffen Larsen via llvm-commits
• [llvm] [AMDGPU] Add half vector support for table-driven libcall optimization (PR #178638)   Steffen Larsen via llvm-commits
• [llvm] [DAG] Define computeConstantRange for VSCALE folding (PR #176027)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Reschedule loads in clauses to improve throughput (PR #102595)   Carl Ritson via llvm-commits
• [llvm] [DA] Add test for RDIV misses dependency due to "minor algebra" (NFC) (PR #179653)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add test for RDIV misses dependency due to "minor algebra" (NFC) (PR #179653)   Ryotaro Kasuga via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   John Brawn via llvm-commits
• [llvm] [X86] Use shift+add/sub for vXi8 splat multiplies (PR #174110)   Simon Pilgrim via llvm-commits
• [llvm] be9ba44 - [AMDGPU] Add machineFunctionInfo to recent MIR tests (#179602)   via llvm-commits
• [llvm] [AMDGPU] Add machineFunctionInfo to recent MIR tests (PR #179602)   Carl Ritson via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Islam Imad via llvm-commits
• [llvm] [LowerMemIntrinsics] Optimize memset lowering (PR #169040)   LLVM Continuous Integration via llvm-commits
• [llvm] [LoopVectorize] Fix crash with GC statepoint in epilogue vectorization (PR #179459)   Luohao Wang via llvm-commits
• [llvm] [VectorCombine] Consolidate fragmented loads from shuffle chains into wide loads (PR #177571)   Simon Pilgrim via llvm-commits
• [llvm] [SROA] Avoid redundant `.oldload` generation when `memset` fully covers a partition (PR #179643)   Mingjie Xu via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   David Stuttard via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   Paul Walker via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   Paul Walker via llvm-commits
• [llvm] [BasicBlockUtilsTests] Added test case splitBlockBefore2. NFC (PR #179408)   Nikita Popov via llvm-commits
• [llvm] [BasicBlockUtilsTests] Added test case splitBlockBefore2. NFC (PR #179408)   Nikita Popov via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   Paul Walker via llvm-commits
• [llvm] [BasicBlockUtilsTests] Added test case splitBlockBefore2. NFC (PR #179408)   Nikita Popov via llvm-commits
• [llvm] SPIRVInstructionSelector::selectExtractVal - add missing brackets to assertion condition to fix gcc -Wparentheses warning (PR #179656)   Simon Pilgrim via llvm-commits
• [llvm] [SystemZ][z/OS] Reverse the order of instructions to save and restore CSRs (PR #179540)   via llvm-commits
• [llvm] SPIRVInstructionSelector::selectExtractVal - add missing brackets to assertion condition to fix gcc -Wparentheses warning (PR #179656)   Simon Pilgrim via llvm-commits
• [llvm] SPIRVInstructionSelector::selectExtractVal - add missing brackets to assertion condition to fix gcc -Wparentheses warning (PR #179656)   Marcos Maronas via llvm-commits
• [llvm] [SystemZ][z/OS] Reverse the order of instructions to save and restore CSRs (PR #179540)   Ulrich Weigand via llvm-commits
• [llvm] [SROA] Avoid redundant `.oldload` generation when `memset` fully covers a partition (PR #179643)   Nikita Popov via llvm-commits
• [llvm] [DirectX] Fix assertion in PointerTypeAnalysis with empty global_ctors (PR #179034)   via llvm-commits
• [llvm] [InstCombine] Bail out on type mismatch in foldBitCastBitwiseLogic (PR #179640)   Kacper Doga via llvm-commits
• [llvm] [VPlan] Add the cost of spills when considering register pressure (PR #179646)   John Brawn via llvm-commits
• [llvm] 802fd8c - [perf] Replace copy-assign by move-assign in llvm/lib/Target (#179464)   via llvm-commits
• [llvm] [perf] Replace copy-assign by move-assign in llvm/lib/Target (PR #179464)   via llvm-commits
• [llvm] [SystemZ][z/OS] Reverse the order of instructions to save and restore CSRs (PR #179540)   via llvm-commits
• [llvm] [SystemZ][z/OS] Reverse the order of instructions to save and restore CSRs (PR #179540)   via llvm-commits
• [llvm] [ExpandIRInsts] Freeze value before fptoi expansion (PR #179659)   Nikita Popov via llvm-commits
• [llvm] 516eb38 - [ExpandIRInsts] Freeze value before fptoi expansion (#179659)   via llvm-commits
• [llvm] [ExpandIRInsts] Freeze value before fptoi expansion (PR #179659)   Nikita Popov via llvm-commits
• [llvm] [SystemZ][z/OS] Reverse the order of instructions to save and restore CSRs (PR #179540)   Ulrich Weigand via llvm-commits
• [llvm] [AMDGPU] Handle vector types for reqd_work_group_size constant folding. (PR #179551)   Marcos Maronas via llvm-commits
• [llvm] [AMDGPU] Handle vector types for reqd_work_group_size constant folding. (PR #179551)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Lleu Yang via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Matt Arsenault via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   via llvm-commits
• [llvm] [llvm-profgen] Support loading symbols from symtab for COFF (PR #179175)   Haohai Wen via llvm-commits
• [llvm] [perf] Replace copy-assign by move-assign in llvm/lib/Target (PR #179464)   LLVM Continuous Integration via llvm-commits
• [llvm] cc2b48f - SPIRVInstructionSelector::selectExtractVal - add missing brackets to assertion condition to fix gcc -Wparentheses warning (#179656)   via llvm-commits
• [llvm] SPIRVInstructionSelector::selectExtractVal - add missing brackets to assertion condition to fix gcc -Wparentheses warning (PR #179656)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [analyzer] New checker: optin.core.UnconditionalVAArg (PR #175602)   Donát Nagy via llvm-commits
• [llvm] [bolt][x86] Fixed process indirect branch instruction (PR #179663)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][x86] Fixed process indirect branch instruction (PR #179663)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt][x86] Fixed process indirect branch instruction (PR #179663)   via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Islam Imad via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Islam Imad via llvm-commits
• [llvm] [bazel] Build mcp server for lldb (PR #178437)   Haojian Wu via llvm-commits
• [llvm] [bolt][x86] Fixed process indirect branch instruction (PR #179663)   via llvm-commits
• [llvm] [IR] Add MemsetPatternInst to the MemIntrinsic hierarchy (PR #153301)   Nikita Popov via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for enabling streaming with +fprcvt (PR #177333)   Jonathan Thackray via llvm-commits
• [llvm] [LoopVectorize] Support vectorization of overflow intrinsics (PR #174835)   Alexander Kornienko via llvm-commits
• [llvm] [DA] Add tests for dependencies are missed due to large BTC (NFC) (PR #179664)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for dependencies are missed due to large BTC (NFC) (PR #179664)   Ryotaro Kasuga via llvm-commits
• [llvm] [bolt][x86] Fixed process indirect branch instruction (PR #179663)   Alexey Moksyakov via llvm-commits
• [llvm] [AMDGPU] Add intrinsic exposing s_alloc_vgpr (PR #163951)   Diana Picus via llvm-commits
• [llvm] [LV] Allow loops with multiple early exits in legality checks. (PR #176403)   Alexander Kornienko via llvm-commits
• [llvm] [SystemZ][z/OS] Set R5 as not restored. (PR #179666)   via llvm-commits
• [llvm] [SystemZ][z/OS] Set R5 as not restored. (PR #179666)   via llvm-commits
• [flang] [llvm] [mlir] [openmp] [MLIR][OpenMP] Add omp.fuse operation (PR #168898)   Ferran Toda via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Jay Foad via llvm-commits
• [clang] [llvm] [Offloading] Offload Binary Format V2: Support Multiple Entries (PR #169425)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offloading] Offload Binary Format V2: Support Multiple Entries (PR #169425)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offloading] Offload Binary Format V2: Support Multiple Entries (PR #169425)   Joseph Huber via llvm-commits
• [clang] [llvm] [Offloading] Offload Binary Format V2: Support Multiple Entries (PR #169425)   Joseph Huber via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Rahul Joshi via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Rahul Joshi via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lld] [llvm] [NFC] Fix tests with invalid RUN directives (PR #179668)   Vladimir Vuksanovic via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lld] [llvm] [NFC] Fix tests with invalid RUN directives (PR #179668)   via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lld] [llvm] [NFC] Fix tests with invalid RUN directives (PR #179668)   via llvm-commits
• [llvm] [AArch64][SME] Add missing ZT0 transition (PR #179193)   Sander de Smalen via llvm-commits
• [llvm] [bolt][x86] Fixed process indirect branch instruction (PR #179663)   via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Rahul Joshi via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Rahul Joshi via llvm-commits
• [llvm] [VectorCombine] Consolidate fragmented loads from shuffle chains into wide loads (PR #177571)   via llvm-commits
• [llvm] [LoopVectorize] Support vectorization of overflow intrinsics (PR #174835)   Benjamin Maxwell via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Aiden Grossman via llvm-commits
• [llvm] c487e24 - [SPIR-V] Fix environment resolution causing legalization crash (#179052)   via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   Dmitry Sidorov via llvm-commits
• [llvm] [update_mc_test_checks] Fix llvm-mc invocation on Windows by avoiding echo pipe (PR #179381)   Aiden Grossman via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   Graham Hunter via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Rahul Joshi via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   Graham Hunter via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   Graham Hunter via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   Graham Hunter via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   Graham Hunter via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   Graham Hunter via llvm-commits
• [llvm] [LoopVectorize] Support vectorization of overflow intrinsics (PR #174835)   Benjamin Maxwell via llvm-commits
• [llvm] [NFC][LowerMemIntrinsics] Consistent parameter name comments in function calls (PR #176751)   Aiden Grossman via llvm-commits
• [llvm] [SPIR-V] Fix environment resolution causing legalization crash (PR #179052)   LLVM Continuous Integration via llvm-commits
• [llvm] [bolt][x86] Fixed process indirect branch instruction (PR #179663)   Alexey Moksyakov via llvm-commits
• [llvm] [AMDGPU] Handle vector types for reqd_work_group_size constant folding. (PR #179551)   Matt Arsenault via llvm-commits
• [llvm] [lit] Avoid multiprocessing for -j1 runs (PR #175587)   Aiden Grossman via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   via llvm-commits
• [llvm] [update_mc_test_checks] Fix llvm-mc invocation on Windows by avoiding echo pipe (PR #179381)   Harrison Hao via llvm-commits
• [llvm] [NewPM][X86] Make AsmPrinter work with NewPM (PR #173740)   Aiden Grossman via llvm-commits
• [llvm] [bolt][x86] Fixed process indirect branch instruction (PR #179663)   Alexey Moksyakov via llvm-commits
• [llvm] [NFC][LowerMemIntrinsics] Consistent parameter name comments in function calls (PR #176751)   Fabian Ritter via llvm-commits
• [llvm] 2af18a1 - [NFC][LowerMemIntrinsics] Consistent parameter name comments in function calls (#176751)   via llvm-commits
• [llvm] [NFC][LowerMemIntrinsics] Consistent parameter name comments in function calls (PR #176751)   Fabian Ritter via llvm-commits
• [llvm] [update_mc_test_checks] Fix llvm-mc invocation on Windows by avoiding echo pipe (PR #179381)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Add intrinsic exposing s_alloc_vgpr (PR #163951)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add intrinsic exposing s_alloc_vgpr (PR #163951)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add intrinsic exposing s_alloc_vgpr (PR #163951)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add intrinsic exposing s_alloc_vgpr (PR #163951)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add intrinsic exposing s_alloc_vgpr (PR #163951)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [AMDGPU] Handle vector types for reqd_work_group_size constant folding. (PR #179551)   Matt Arsenault via llvm-commits
• [llvm] [bolt][x86] Fixed process indirect branch instruction (PR #179663)   Alexey Moksyakov via llvm-commits
• [llvm] [Hexagon] Add global region scaffolding (PR #179541)   Fateme Hosseini via llvm-commits
• [llvm] [bolt][x86] Fixed process indirect branch instruction (PR #179663)   Alexey Moksyakov via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize rules for TFE buffer loads (PR #179529)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Have VCC as a first-class member of the SGPR pool. (PR #173870)   Ivan Kosarev via llvm-commits
• [llvm] [AMDGPU] Handle vector types for reqd_work_group_size constant folding. (PR #179551)   Marcos Maronas via llvm-commits
• [llvm] [Hexagon] Add global region scaffolding (PR #179541)   Fateme Hosseini via llvm-commits
• [llvm] [AMDGPU] Handle vector types for reqd_work_group_size constant folding. (PR #179551)   Marcos Maronas via llvm-commits
• [llvm] [AMDGPU] Handle vector types for reqd_work_group_size constant folding. (PR #179551)   Marcos Maronas via llvm-commits
• [llvm] [AMDGPU][DAGCombiner][GlobalISel] Prevent FMA contraction when multiply cannot be eliminated (PR #169735)   Matt Arsenault via llvm-commits
• [llvm] [NFCI][Analysis] Extract alloca slice analysis from SROA (PR #179593)   Jameson Nash via llvm-commits
• [llvm] [NFCI][Analysis] Extract alloca slice analysis from SROA (PR #179593)   Jameson Nash via llvm-commits
• [llvm] [update_mc_test_checks] Fix llvm-mc invocation on Windows by avoiding echo pipe (PR #179381)   Harrison Hao via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Alexandros Lamprineas via llvm-commits
• [llvm] [NewPM][X86] Make AsmPrinter work with NewPM (PR #173740)   Christudasan Devadasan via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   Amina Chabane via llvm-commits
• [llvm] [AMDGPU] Handle vector types for reqd_work_group_size constant folding. (PR #179551)   Matt Arsenault via llvm-commits
• [llvm] [Offload][L0] Print build and link logs upon failure (PR #179543)   Nick Sarnie via llvm-commits
• [llvm] [Offload][L0] Print build and link logs upon failure (PR #179543)   Nick Sarnie via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   Amina Chabane via llvm-commits
• [llvm] 637a038 - [SystemZ][GOFF] Implement lowerConstant (#179394)   via llvm-commits
• [llvm] [SystemZ][GOFF] Implement lowerConstant (PR #179394)   Tony Tao via llvm-commits
• [llvm] [update_mc_test_checks] Fix llvm-mc invocation on Windows by avoiding echo pipe (PR #179381)   Harrison Hao via llvm-commits
• [llvm] In-class initialize DenseMapBase members. (PR #177168)   Matt Davis via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [llvm] [AutoUpgrade] Handle invalid x86 intrinsics (PR #179374)   Kshitij Paranjape via llvm-commits
• [llvm] [X86] Fix incorrect SUBREG_TO_REG usage in a MIR test (PR #179682)   Jay Foad via llvm-commits
• [llvm] [X86] Fix incorrect SUBREG_TO_REG usage in a MIR test (PR #179682)   via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Alexandros Lamprineas via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Alexandros Lamprineas via llvm-commits
• [llvm] [InstructionSimplify] Extend simplifyICmpWithZero to handle equivalent zero RHS (PR #179055)   Kunqiu Chen via llvm-commits
• [llvm] Add clmul zext AArch64 lowering tests (PR #179641)   Matthew Devereau via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Piotr Sobczak via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Piotr Sobczak via llvm-commits
• [llvm] [DA] Add tests for dependencies are missed due to addrecs wrap (NFC) (PR #179683)   Ryotaro Kasuga via llvm-commits
• [llvm] Add clmul zext AArch64 lowering tests (PR #179641)   Matthew Devereau via llvm-commits
• [llvm] [DA] Add tests for dependencies are missed due to addrecs wrap (NFC) (PR #179683)   Ryotaro Kasuga via llvm-commits
• [llvm] [SystemZ][z/OS] Set R5 as not restored. (PR #179666)   Ulrich Weigand via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   Graham Hunter via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   Graham Hunter via llvm-commits
• [llvm] [DAG] Define computeConstantRange for VSCALE folding (PR #176027)   Neil Phan via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Alexandros Lamprineas via llvm-commits
• [llvm] [update_mc_test_checks] Fix llvm-mc invocation on Windows by avoiding echo pipe (PR #179381)   Brox Chen via llvm-commits
• [llvm] [AMDGPU] Handle vector types for reqd_work_group_size constant folding. (PR #179551)   Marcos Maronas via llvm-commits
• [llvm] [update_mc_test_checks] Fix llvm-mc invocation on Windows by avoiding echo pipe (PR #179381)   Aiden Grossman via llvm-commits
• [llvm] [LSR] Add unequal cost eval for dropping solutions (PR #178039)   Michael Berg via llvm-commits
• [llvm] [AMDGPU] Handle vector types for reqd_work_group_size constant folding. (PR #179551)   Marcos Maronas via llvm-commits
• [llvm] [InstructionSimplify] Extend simplifyICmpWithZero to handle equivalent zero RHS (PR #179055)   Kunqiu Chen via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize rules for TFE buffer loads (PR #179529)   Petar Avramovic via llvm-commits
• [llvm] [NFC][LowerMemIntrinsics] Consistent parameter name comments in function calls (PR #176751)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] Support both EBCDIC & ASCII form of type_info::name() (PR #179687)   Abhina Sree via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] Support both EBCDIC & ASCII form of type_info::name() (PR #179687)   via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] e6983d0 - [gn build] Port 5cc22a9772c6   LLVM GN Syncbot via llvm-commits
• [lldb] [llvm] [lldb] [Process/FreeBSD] Assume minimum is FreeBSD 13 (PR #179587)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb] [Process/FreeBSD] Assume minimum is FreeBSD 14 (PR #179587)   Minsoo Choo via llvm-commits
• [llvm] [AArch64] Avoid selecting XAR for reverse operations. (PR #178706)   Ricardo Jesus via llvm-commits
• [llvm] [DA] Add test for RDIV misses dependency due to "minor algebra" (NFC) (PR #179653)   Ryotaro Kasuga via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Handle vector types for reqd_work_group_size constant folding. (PR #179551)   Marcos Maronas via llvm-commits
• [llvm] [CodeGen] Remove unused first operand of SUBREG_TO_REG (PR #179690)   Jay Foad via llvm-commits
• [lldb] [llvm] [lldb] [Process/FreeBSD] Assume minimum is FreeBSD 14 (PR #179587)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb] [Process/FreeBSD] Assume minimum is FreeBSD 14 (PR #179587)   Minsoo Choo via llvm-commits
• [llvm] [CodeGen] Remove unused first operand of SUBREG_TO_REG (PR #179690)   via llvm-commits
• [llvm] [CodeGen] Remove unused first operand of SUBREG_TO_REG (PR #179690)   via llvm-commits
• [llvm] [CodeGen] Remove unused first operand of SUBREG_TO_REG (PR #179690)   via llvm-commits
• [lldb] [llvm] [lldb] [Process/FreeBSD] Assume minimum is FreeBSD 14 (PR #179587)   Minsoo Choo via llvm-commits
• [llvm] [DA] Add test for RDIV misses dependency due to "minor algebra" (NFC) (PR #179653)   Ryotaro Kasuga via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Matt Arsenault via llvm-commits
• [llvm] [DA] Add test for RDIV misses dependency due to "minor algebra" (NFC) (PR #179653)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add test for RDIV misses dependency due to "minor algebra" (NFC) (PR #179653)   via llvm-commits
• [llvm] [DA] Add tests for dependencies are missed due to large BTC (NFC) (PR #179664)   Ryotaro Kasuga via llvm-commits
• [llvm] [AArch64] Avoid selecting XAR for reverse operations. (PR #178706)   Ricardo Jesus via llvm-commits
• [llvm] [DA] Add tests for dependencies are missed due to large BTC (NFC) (PR #179664)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for dependencies are missed due to large BTC (NFC) (PR #179664)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for dependencies are missed due to large BTC (NFC) (PR #179664)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove fallback for scalar fp16 fcvtnu (PR #179693)   Joshua Rodriguez via llvm-commits
• [llvm] [AArch64][GlobalISel] WIP Remove fallback for scalar fp16 fcvtnu (PR #179693)   Joshua Rodriguez via llvm-commits
• [llvm] [X86] Fix incorrect SUBREG_TO_REG usage in a MIR test (PR #179682)   Simon Pilgrim via llvm-commits
• [lldb] [llvm] [lldb] Remove mips64 support for FreeBSD (PR #179582)   Minsoo Choo via llvm-commits
• [llvm] [DA] Add tests for dependencies are missed due to addrecs wrap (NFC) (PR #179683)   Ryotaro Kasuga via llvm-commits
• [lldb] [llvm] [lldb] Remove mips64 support for FreeBSD (PR #179582)   Minsoo Choo via llvm-commits
• [llvm] [DA] Add tests for dependencies are missed due to addrecs wrap (NFC) (PR #179683)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for dependencies are missed due to addrecs wrap (NFC) (PR #179683)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Add tests for dependencies are missed due to addrecs wrap (NFC) (PR #179683)   via llvm-commits
• [llvm] [SPIRV] Do not emit @llvm.used (PR #179498)   Steven Perron via llvm-commits
• [llvm] 2e58f60 - [AMDGPU][True16] t16 pseudo for mubuffer d16 load/store (#178822)   via llvm-commits
• [llvm] [AMDGPU][True16] t16 pseudo for mubuffer d16 load/store (PR #178822)   Brox Chen via llvm-commits
• [llvm] [mlir] [flang][openmp] Fix GPU byref reduction descriptor initialization (PR #178934)   Sunil Shrestha via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Rahul Joshi via llvm-commits
• [llvm] d82a6eb - [TableGen] Remove warning IntrinsicsToAttributesMap needs > 16 bits (#179533)   via llvm-commits
• [llvm] [TableGen] Remove warning IntrinsicsToAttributesMap needs > 16 bits (PR #179533)   Rahul Joshi via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add buffer load format D16 RegBankLegalize rules (PR #179566)   Matt Arsenault via llvm-commits
• [llvm] bc80d1a - [SystemZ][z/OS] Set R5 as not restored. (#179666)   via llvm-commits
• [llvm] [SystemZ][z/OS] Set R5 as not restored. (PR #179666)   Kai Nacke via llvm-commits
• [llvm] [GlobalISel] Combine into abd[su] and legalize abd[su] (PR #179437)   Julian Pokrovsky via llvm-commits
• [llvm] [ARM] Set operation action for UMULO and SMULO as Custom if not Thumb1 (PR #154253)   via llvm-commits
• [clang] [llvm] [DirectX] Making sure SROA is run when targeting DirectX (PR #179600)   Chris B via llvm-commits
• [llvm] [AMDGPU] Fix V_INDIRECT_REG_READ_GPR_IDX expansion with immediate index (PR #179699)   Petr Kurapov via llvm-commits
• [llvm] [AMDGPU] Fix V_INDIRECT_REG_READ_GPR_IDX expansion with immediate index (PR #179699)   via llvm-commits
• [llvm] 3c0e326 - [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (#174761)   via llvm-commits
• [llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)   Simon Pilgrim via llvm-commits
• [llvm] 569a9b4 - [SLP][NFC]Add another shl-to-add transformation test, NFC   Alexey Bataev via llvm-commits
• [llvm] [missed-opt][X86] Optimize fptosi+select down to a single cvttsd2si Instruction on X86 (PR #172710)   via llvm-commits
• [llvm] [AArc64][SDAG] Legalise BSWAP for Neon types. (PR #179702)   Ricardo Jesus via llvm-commits
• [llvm] [missed-opt][X86] Optimize fptosi+select down to a single cvttsd2si Instruction on X86 (PR #172710)   via llvm-commits
• [llvm] [missed-opt][X86] Optimize fptosi+select down to a single cvttsd2si Instruction on X86 (PR #172710)   via llvm-commits
• [llvm] [AArc64][SDAG] Legalise BSWAP for Neon types. (PR #179702)   via llvm-commits
• [llvm] [AArc64][SDAG] Legalise BSWAP for Neon types. (PR #179702)   via llvm-commits
• [llvm] [missed-opt][X86] Optimize fptosi+select down to a single cvttsd2si Instruction on X86 (PR #172710)   via llvm-commits
• [llvm] [missed-opt][X86] Optimize fptosi+select down to a single cvttsd2si Instruction on X86 (PR #172710)   via llvm-commits
• [llvm] [missed-opt][X86] Optimize fptosi+select down to a single cvttsd2si Instruction on X86 (PR #172710)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   via llvm-commits
• [llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)   Matt Arsenault via llvm-commits
• [llvm] [SystemZ][GOFF] Implement lowerConstant (PR #179394)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add G_SADDE/SSUBE RegBankLegalize rule (PR #179603)   Matt Arsenault via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Nikita Popov via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Nikita Popov via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Nikita Popov via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Nikita Popov via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Nikita Popov via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Nikita Popov via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Nikita Popov via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Nikita Popov via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Nikita Popov via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Nikita Popov via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Nikita Popov via llvm-commits
• [llvm] [AArch64][GlobalISel] WIP Remove fallback for scalar fp16 fcvtnu (PR #179693)   via llvm-commits
• [llvm] [AArch64][GlobalISel] WIP Remove fallback for scalar fp16 fcvtnu (PR #179693)   via llvm-commits
• [llvm] [AArch64][SDAG] Legalise BSWAP for Neon types. (PR #179702)   Ricardo Jesus via llvm-commits
• [llvm] 2828ee6 - [X86] Fix incorrect SUBREG_TO_REG usage in a MIR test (#179682)   via llvm-commits
• [llvm] [X86] Fix incorrect SUBREG_TO_REG usage in a MIR test (PR #179682)   Jay Foad via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Ulrich Weigand via llvm-commits
• [llvm] [CodeGen] Remove unused first operand of SUBREG_TO_REG (PR #179690)   Jay Foad via llvm-commits
• [llvm] [X86][test] Auto-generate test checks for some cfi tests. (PR #177248)   Mikhail Gudim via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators (PR #179336)   Andrei Elovikov via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators (PR #179336)   via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators (PR #179336)   via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators (PR #179336)   via llvm-commits
• [lldb] [llvm] [lldb] Remove mips64 support for FreeBSD (PR #179582)   David Spickett via llvm-commits
• [llvm] [AMDGPU] Add half vector support for table-driven libcall optimization (PR #178638)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add half vector support for table-driven libcall optimization (PR #178638)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add half vector support for table-driven libcall optimization (PR #178638)   Matt Arsenault via llvm-commits
• [lldb] [llvm] [lldb] Remove mips64 support for FreeBSD (PR #179582)   David Spickett via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators (PR #179336)   Andrei Elovikov via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators (PR #179336)   Andrei Elovikov via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators (PR #179336)   Andrei Elovikov via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators (PR #179336)   Andrei Elovikov via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Move eventCounter() function (PR #178949)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Move eventCounter() function (PR #178949)   via llvm-commits
• [llvm] [SDAG] Use the precise isTruncFree overload more often (PR #176575)   Matt Arsenault via llvm-commits
• [llvm] [AArch64] Codegen for AArch64 Return Address Signing Hardening (PR #176187)   Anatoly Trosinenko via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   Alex Wang via llvm-commits
• [llvm] [InstructionSimplify] Extend simplifyICmpWithZero to handle equivalent zero RHS (PR #179055)   Kunqiu Chen via llvm-commits
• [llvm] [InstructionSimplify] Extend simplifyICmpWithZero to handle equivalent zero RHS (PR #179055)   via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   Alex Wang via llvm-commits
• [llvm] 8b28f52 - [SystemZ][z/OS] Reverse the order of instructions to save and restore CSRs (#179540)   via llvm-commits
• [llvm] [SystemZ][z/OS] Reverse the order of instructions to save and restore CSRs (PR #179540)   Kai Nacke via llvm-commits
• [llvm] [AMDGPU] lower fptrunc.round(rtz) to cvt_pkrtz_f16_f32 (PR #177069)   Brox Chen via llvm-commits
• [llvm] [AMDGPU] lower fptrunc.round(rtz) to cvt_pkrtz_f16_f32 (PR #177069)   Brox Chen via llvm-commits
• [llvm] [LLVM][CodeGen][DirectX] Fix scalarisation when vector ConstantFP is used. (PR #172684)   Paul Walker via llvm-commits
• [clang] [llvm] [AArch64] Add support for intent to read prefetch intrinsic (PR #179709)   Kerry McLaughlin via llvm-commits
• [llvm] [AMDGPU] Fix V_INDIRECT_REG_READ_GPR_IDX expansion with immediate index (PR #179699)   via llvm-commits
• [llvm] c61d434 - [NVPTX][NFC] Update fence.py and cmpxchg.py to generate ptxas-sm_XY and ptxas-isa-X.Y checks in RUN lines (#179378)   via llvm-commits
• [llvm] [NVPTX][NFC] Update fence.py and cmpxchg.py to generate ptxas-sm_XY and ptxas-isa-X.Y checks in RUN lines (PR #179378)   Akshay Deodhar via llvm-commits
• [clang] [llvm] [AArch64] Add support for intent to read prefetch intrinsic (PR #179709)   via llvm-commits
• [clang] [llvm] [AArch64] Add support for intent to read prefetch intrinsic (PR #179709)   via llvm-commits
• [llvm] AMDGPU: Implement computeKnownFPClass for llvm.amdgcn.fract (PR #179134)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Use V_FMAC_F64 in "if (cond) a -= c" (PR #168710)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SDAG] Legalise BSWAP for Neon types. (PR #179702)   via llvm-commits
• [llvm] AMDGPU: Fix incorrect fold of undef for llvm.amdgcn.trig.preop (PR #179025)   Shilei Tian via llvm-commits
• [llvm] [LLVM][CodeGen][DirectX] Fix scalarisation when vector ConstantFP is used. (PR #172684)   Paul Walker via llvm-commits
• [llvm] [ExpandIRInsts] Support saturating fptoi (PR #179710)   Nikita Popov via llvm-commits
• [llvm] 8a83911 - AMDGPU: Fix incorrect fold of undef for llvm.amdgcn.trig.preop (#179025)   via llvm-commits
• [llvm] AMDGPU: Fix incorrect fold of undef for llvm.amdgcn.trig.preop (PR #179025)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Implement computeKnownFPClass for llvm.amdgcn.trig.preop (PR #179026)   Matt Arsenault via llvm-commits
• [llvm] e747287 - AMDGPU: Implement computeKnownFPClass for llvm.amdgcn.trig.preop (#179026)   via llvm-commits
• [llvm] AMDGPU: Implement computeKnownFPClass for llvm.amdgcn.trig.preop (PR #179026)   Matt Arsenault via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] Support both EBCDIC & ASCII form of type_info::name() (PR #179687)   Tony Tao via llvm-commits
• [clang] [libcxx] [llvm] [CIR][X86] Add support for vpshl/vpshr builtins (PR #179538)   Priyanshu Kumar via llvm-commits
• [clang] [libcxx] [llvm] [CIR][X86] Add support for vpshl/vpshr builtins (PR #179538)   Priyanshu Kumar via llvm-commits
• [clang] [libcxx] [llvm] [CIR][X86] Add support for vpshl/vpshr builtins (PR #179538)   Priyanshu Kumar via llvm-commits
• [llvm] 7df2bd6 - AMDGPU: Implement computeKnownFPClass for llvm.amdgcn.fract (#179134)   via llvm-commits
• [llvm] AMDGPU: Implement computeKnownFPClass for llvm.amdgcn.fract (PR #179134)   Matt Arsenault via llvm-commits
• [clang] [libcxx] [llvm] [CIR][X86] Add support for vpshl/vpshr builtins (PR #179538)   Priyanshu Kumar via llvm-commits
• [clang] [libcxx] [llvm] [CIR][X86] Add support for vpshl/vpshr builtins (PR #179538)   Priyanshu Kumar via llvm-commits
• [llvm] [LLVM][CodeGen][DirectX] Fix scalarisation when vector ConstantFP is used. (PR #172684)   Paul Walker via llvm-commits
• [clang] [libcxx] [llvm] [CIR][X86] Add support for vpshl/vpshr builtins (PR #179538)   Priyanshu Kumar via llvm-commits
• [clang] [libcxx] [llvm] [CIR][X86] Add support for vpshl/vpshr builtins (PR #179538)   Priyanshu Kumar via llvm-commits
• [clang] [libcxx] [llvm] [CIR][X86] Add support for vpshl/vpshr builtins (PR #179538)   Priyanshu Kumar via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   Craig Topper via llvm-commits
• [clang] [libcxx] [llvm] [CIR][X86] Add support for vpshl/vpshr builtins (PR #179538)   Priyanshu Kumar via llvm-commits
• [clang] [libcxx] [llvm] [CIR][X86] Add support for vpshl/vpshr builtins (PR #179538)   Priyanshu Kumar via llvm-commits
• [llvm] [InstCombine] Canonicalize zext+overflow check to overflow check if zext's only purpose is to check overflow (PR #179505)   via llvm-commits
• [clang] [libcxx] [llvm] [CIR][X86] Add support for vpshl/vpshr builtins (PR #179538)   Priyanshu Kumar via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   David Tenty via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   David Tenty via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   David Tenty via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   David Tenty via llvm-commits
• [clang] [clang-tools-extra] [llvm] [LLVM][CLANG] Update signal-handling behavior to comply with POSIX (PR #169340)   David Tenty via llvm-commits
• [clang] [llvm] Update my email across the project (PR #179361)   Reid Kleckner via llvm-commits
• [clang] [libcxx] [llvm] [CIR][X86] Add support for vpshl/vpshr builtins (PR #179538)   Priyanshu Kumar via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   Craig Topper via llvm-commits
• [clang] [libcxx] [llvm] [CIR][X86] Add support for vpshl/vpshr builtins (PR #179538)   Priyanshu Kumar via llvm-commits
• [clang] [libcxx] [llvm] [CIR][X86] Add support for vpshl/vpshr builtins (PR #179538)   Priyanshu Kumar via llvm-commits
• [clang] [libcxx] [llvm] [CIR][X86] Add support for vpshl/vpshr builtins (PR #179538)   Priyanshu Kumar via llvm-commits
• [clang] [libcxx] [llvm] [CIR][X86] Add support for vpshl/vpshr builtins (PR #179538)   Priyanshu Kumar via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Andrei Elovikov via llvm-commits
• [clang] [libcxx] [llvm] [CIR][X86] Add support for vpshl/vpshr builtins (PR #179538)   Priyanshu Kumar via llvm-commits
• [llvm] [InstructionSimplify] Extend simplifyICmpWithZero to handle equivalent zero RHS (PR #179055)   Kunqiu Chen via llvm-commits
• [llvm] [SystemZ][z/OS] Reverse the order of instructions to save and restore CSRs (PR #179540)   LLVM Continuous Integration via llvm-commits
• [libcxx] [llvm] [CIR][X86] Add support for vpshl/vpshr builtins (PR #179538)   Priyanshu Kumar via llvm-commits
• [llvm] [CodeGen] Remove unused first operand of SUBREG_TO_REG (PR #179690)   Matt Arsenault via llvm-commits
• [llvm] [CodeGen] Remove unused first operand of SUBREG_TO_REG (PR #179690)   Matt Arsenault via llvm-commits
• [llvm] [SeperateConstOffsetFromGEP] Update splitGEP to handle case where including base offset results in an offset that's too large (PR #177653)   Matt Arsenault via llvm-commits
• [llvm] [SeperateConstOffsetFromGEP] Update splitGEP to handle case where including base offset results in an offset that's too large (PR #177653)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   via llvm-commits
• [llvm] b0aea05 - [AMDGPU][GlobalISel] Add buffer load format D16 RegBankLegalize rules (#179566)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add buffer load format D16 RegBankLegalize rules (PR #179566)   via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Craig Topper via llvm-commits
• [llvm] AMDGPU: Strip sign bit operations on llvm.amdgcn.trig.preop uses (PR #179712)   Matt Arsenault via llvm-commits
• [llvm] [NewPM] Port x86-lvi-load (PR #179371)   Anshul Nigham via llvm-commits
• [llvm] AMDGPU: Strip sign bit operations on llvm.amdgcn.trig.preop uses (PR #179712)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Strip sign bit operations on llvm.amdgcn.trig.preop uses (PR #179712)   Matt Arsenault via llvm-commits
• [llvm] [NewPM] Port x86-lvi-load (PR #179371)   Anshul Nigham via llvm-commits
• [llvm] AMDGPU: Strip sign bit operations on llvm.amdgcn.trig.preop uses (PR #179712)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for enabling streaming with +fprcvt (PR #177333)   via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for enabling streaming with +fprcvt (PR #177333)   via llvm-commits
• [llvm] [CodeGen] Remove unused first operand of SUBREG_TO_REG (PR #179690)   Aiden Grossman via llvm-commits
• [llvm] 96448ef - [llvm-readelf] --unwind: Support DW_EH_PE_sdata8 encoding (#179152)   via llvm-commits
• [llvm] [llvm-readelf] --unwind: Support DW_EH_PE_sdata8 encoding (PR #179152)   Fangrui Song via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   via llvm-commits
• [llvm] [CodeGen] Remove unused first operand of SUBREG_TO_REG (PR #179690)   Craig Topper via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   YongKang Zhu via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for enabling streaming with +fprcvt (PR #177333)   Jonathan Thackray via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Add tied destination constraint to CustomSiFiveVMACC. (PR #179567)   Craig Topper via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for enabling streaming with +fprcvt (PR #177333)   Jonathan Thackray via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   YongKang Zhu via llvm-commits
• [llvm] 265a994 - [RISCV] Add C/Zcf/Zcd/Zce implication rules to subtarget construction. (#179615)   via llvm-commits
• [llvm] [RISCV] Add C/Zcf/Zcd/Zce implication rules to subtarget construction. (PR #179615)   Craig Topper via llvm-commits
• [llvm] [ExpandIRInsts] Support saturating fptoi (PR #179710)   Nikita Popov via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for enabling streaming with +fprcvt (PR #177333)   Jonathan Thackray via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Fangrui Song via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Fangrui Song via llvm-commits
• [llvm] 7ea33e6 - [CodeGen] Remove unused first operand of SUBREG_TO_REG (#179690)   via llvm-commits
• [llvm] [CodeGen] Remove unused first operand of SUBREG_TO_REG (PR #179690)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Teach SIPreEmitPeephole pass to preserve MachineLoopInfo (PR #178868)   Matt Arsenault via llvm-commits
• [llvm] [ExpandIRInsts] Support saturating fptoi (PR #179710)   Nikita Popov via llvm-commits
• [llvm] [ExpandIRInsts] Support saturating fptoi (PR #179710)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Teach SIPreEmitPeephole pass to preserve MachineLoopInfo (PR #178868)   Matt Arsenault via llvm-commits
• [llvm] [ExpandIRInsts] Support saturating fptoi (PR #179710)   via llvm-commits
• [llvm] [AMDGPU] Teach SIPreEmitPeephole pass to preserve MachineLoopInfo (PR #178868)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add buffer store byte/short RegBankLegalize rules (PR #179367)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add buffer store byte/short RegBankLegalize rules (PR #179367)   Matt Arsenault via llvm-commits
• [llvm] [NFC][LLVM][CodeGen][SVE] Restructure urshr related PatFrags. (PR #170521)   Paul Walker via llvm-commits
• [llvm] 273ee97 - [AMDGPU][GlobalISel] Add G_SADDE/SSUBE RegBankLegalize rule (#179603)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add G_SADDE/SSUBE RegBankLegalize rule (PR #179603)   via llvm-commits
• [llvm] [AMDGPU] Add DPP16 Row Share optimization for llvm.amdgcn.wave.shuffle (PR #177470)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][GISel] length aware BITCAST between different-element-width fixed vectors (PR #179123)   Shakil Ahmed via llvm-commits
• [llvm] [AArch64][GISel] length aware BITCAST between different-element-width fixed vectors (PR #179123)   Shakil Ahmed via llvm-commits
• [llvm] [SeperateConstOffsetFromGEP] Update splitGEP to handle case where including base offset results in an offset that's too large (PR #177653)   Matt Arsenault via llvm-commits
• [llvm] [SeperateConstOffsetFromGEP] Update splitGEP to handle case where including base offset results in an offset that's too large (PR #177653)   Matt Arsenault via llvm-commits
• [llvm] [SeperateConstOffsetFromGEP] Update splitGEP to handle case where including base offset results in an offset that's too large (PR #177653)   Matt Arsenault via llvm-commits
• [llvm] [SeperateConstOffsetFromGEP] Update splitGEP to handle case where including base offset results in an offset that's too large (PR #177653)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Remove deprecated RISCVSubtarget::hasStdExtCOrZca(). NFC (PR #179616)   Craig Topper via llvm-commits
• [llvm] 7083354 - [RISCV] Remove deprecated RISCVSubtarget::hasStdExtCOrZca(). NFC (#179616)   via llvm-commits
• [llvm] [RISCV] Remove deprecated RISCVSubtarget::hasStdExtCOrZca(). NFC (PR #179616)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add tied destination constraint to CustomSiFiveVMACC. (PR #179567)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add tied destination constraint to CustomSiFiveVMACC. (PR #179567)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Fix V_INDIRECT_REG_READ_GPR_IDX expansion with immediate index (PR #179699)   Matt Arsenault via llvm-commits
• [llvm] [Hexagon] Add global region scaffolding (PR #179541)   Yashas Andaluri via llvm-commits
• [llvm] [AArch64] Lower bfloat FADD/SUB to BFMLAL top/bottom instructions (PR #174814)   Benjamin Maxwell via llvm-commits
• [llvm] 6d96ae6 - [RISCV] Add tied destination constraint to CustomSiFiveVMACC. (#179567)   via llvm-commits
• [llvm] [RISCV] Add tied destination constraint to CustomSiFiveVMACC. (PR #179567)   Craig Topper via llvm-commits
• [llvm] [Hexagon] Add post-RA live variables analysis (PR #179531)   Yashas Andaluri via llvm-commits
• [llvm] DAG: Replace legal type check in EmitCopyFromReg (PR #177788)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add G_SADDE/SSUBE RegBankLegalize rule (PR #179603)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] lower1BitShuffle - recognise a blend shuffle that can lower to AND/MASKZ pattern (PR #179717)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [llvm] [X86] lower1BitShuffle - recognise a blend shuffle that can lower to AND/MASKZ pattern (PR #179717)   via llvm-commits
• [llvm] [Tablegen] Don't emit decoder tables with islands larger than 64 bits (PR #179651)   Sam Elliott via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Yoonseo Choi via llvm-commits
• [llvm] [llvm][ADT] Mark scope_exit contructors [[nodiscard]] (PR #179720)   Balázs Benics via llvm-commits
• [llvm] [llvm][ADT] Mark scope_exit contructors [[nodiscard]] (PR #179720)   via llvm-commits
• [clang] [llvm] [DirectX] Making sure SROA is run when targeting DirectX (PR #179600)   via llvm-commits
• [clang] [llvm] [Offloading] Offload Binary Format V2: Support Multiple Entries (PR #169425)   Yury Plyakhin via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [clang] [llvm] [DirectX] Making sure SROA is run when targeting DirectX (PR #179600)   via llvm-commits
• [llvm] [ASan] Don't mark alloca as safe if address escapes to callee (PR #178591)   Florian Mayer via llvm-commits
• [llvm] [ASan] Don't mark alloca as safe if address escapes to callee (PR #178591)   Florian Mayer via llvm-commits
• [llvm] e8b7181 - [Evaluator] require invariant size to fully span the global (#179518)   via llvm-commits
• [llvm] [Evaluator] require invariant size to fully span the global (PR #179518)   Jameson Nash via llvm-commits
• [llvm] [AMDGPU] Fix missing waitcnt after buffer_wbl2 (PR #178316)   Austin Kerbow via llvm-commits
• [llvm] 9a47c3b - [RegAlloc] Change the computation of CSRCost (#177226)   via llvm-commits
• [llvm] [SelectionDAGBuilder] Remove NoNaNsFPMath uses (PR #169904)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAGBuilder] Remove NoNaNsFPMath uses (PR #169904)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAGBuilder] Remove NoNaNsFPMath uses (PR #169904)   Matt Arsenault via llvm-commits
• [llvm] [RegAlloc] Change the computation of CSRCost (PR #177226)   via llvm-commits
• [llvm] [AMDGPU] Replace getAllocatedType with getAllocationSize in PromoteAlloca (PR #179523)   Jameson Nash via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   Jay Foad via llvm-commits
• [llvm] wasm: recognize `any_true` and `all_true` (PR #155885)   Petr Penzin via llvm-commits
• [llvm] wasm: recognize `any_true` and `all_true` (PR #155885)   Petr Penzin via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   Jay Foad via llvm-commits
• [llvm] [LLVM] Relax clobbering checks for calls to consider writes only (PR #179721)   via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators (PR #179336)   Andrei Elovikov via llvm-commits
• [llvm] [LLVM] Relax clobbering checks for calls to consider writes only (PR #179721)   via llvm-commits
• [llvm] [Clang][WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Kamil Jakubus via llvm-commits
• [llvm] [Clang][WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for enabling streaming with +fprcvt (PR #177333)   Jonathan Thackray via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   via llvm-commits
• [llvm] [Clang][WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   via llvm-commits
• [llvm] [AArch64][llvm] Pre-commit tests for enabling streaming with +fprcvt (PR #177333)   Jonathan Thackray via llvm-commits
• [llvm] ba8df39 - Add SDNodeFlag::NoConvergent (#179323)   via llvm-commits
• [llvm] Add SDNodeFlag::NoConvergent (PR #179323)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   Matt Arsenault via llvm-commits
• [llvm] [Clang][WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Kamil Jakubus via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Stanislav Mekhanoshin via llvm-commits
• [clang] [llvm] [MTE] Add an attribute to opt-in memory tagging of global variables while using fsanitize=memtag-globals (#166380) (PR #168535)   Peter Collingbourne via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [bazel][mlir][shard, mpi] Port #178870: arith dialect dep (PR #179723)   Jordan Rupprecht via llvm-commits
• [llvm] [Clang][WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   via llvm-commits
• [llvm] [RISCV] Cost UDIV/UREM by a constant power of 2 as a SHL/AND in getArithmeticInstrCost() (PR #179570)   Ryan Buchner via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Peter Smith via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Alexander Kornienko via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   via llvm-commits
• [clang] [llvm] [Clang] Show inlining hints for __attribute__((warning/error)) (PR #174892)   Justin Stitt via llvm-commits
• [llvm] b9b7b31 - [AMDGPU][MC] Allow nodone etc. in exp instructions (#172749)   via llvm-commits
• [llvm] [AMDGPU][MC] Allow nodone etc. in exp instructions (PR #172749)   Jun Wang via llvm-commits
• [llvm] [bazel][mlir][shard, mpi] Port #178870: arith dialect dep (PR #179723)   Jordan Rupprecht via llvm-commits
• [llvm] [X86] lower1BitShuffle - recognise a blend shuffle that can lower to AND/MASKZ pattern (PR #179717)   via llvm-commits
• [llvm] [LV][AArch64] Improve strided access vectorization for AArch64 SVE (PR #164205)   Andrei Elovikov via llvm-commits
• [llvm] [bazel][mlir][shard, mpi] Port #178870: arith dialect dep (PR #179723)   Jordan Rupprecht via llvm-commits
• [llvm] [AMDGPU] Use V_FMAC_F64 in "if (cond) a -= c" (PR #168710)   Valery Pykhtin via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Yoonseo Choi via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Yoonseo Choi via llvm-commits
• [llvm] [RISCV] Cost UDIV/UREM by a constant power of 2 as a SHL/AND in getArithmeticInstrCost() (PR #179570)   Ryan Buchner via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Yoonseo Choi via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   via llvm-commits
• [llvm] [LSV] Support vectorization of mixed-type contiguous accesses (PR #177908)   Drew Kersnar via llvm-commits
• [llvm] [RISCV] Remove codegen for trivial VP intrinsics (PR #179622)   Min-Yih Hsu via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators (PR #179336)   via llvm-commits
• [llvm] [RISCV] Remove codegen for trivial VP intrinsics (PR #179622)   Min-Yih Hsu via llvm-commits
• [llvm] [AMDGPU] Optimize S_OR_B32 to S_ADDK_I32 where possible (PR #177949)   via llvm-commits
• [llvm] [RISCV] Cost UDIV/UREM by a constant power of 2 as a SHL/AND in getArithmeticInstrCost() (PR #179570)   Ryan Buchner via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   via llvm-commits
• [llvm] [DA] Introduce domain for monotonicity (PR #176367)   Michael Kruse via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Nick Desaulniers via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   via llvm-commits
• [llvm] [InstCombine] Fold `(trunc X)` into `X & Mask` inside `decomposeBitTestICmp` (PR #171195)   Yingwei Zheng via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   Eli Friedman via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   Eli Friedman via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   Eli Friedman via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   Eli Friedman via llvm-commits
• [llvm] [DirectX] Fix assertion in PointerTypeAnalysis with empty global_ctors (PR #179034)   Justin Bogner via llvm-commits
• [llvm] Support: allow `llvm::sys::fs::rename` to rename a directory on Windows (PR #179739)   Saleem Abdulrasool via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Fix missing waitcnt after buffer_wbl2 (PR #178316)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [AMDGPU] Limit tensor load/store to gfx1250 only. NFC (PR #179737)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   via llvm-commits
• [llvm] [LLVM][CodeGen][DirectX] Fix scalarisation when vector ConstantFP is used. (PR #172684)   Deric C. via llvm-commits
• [llvm] Inliner: Handle nofpclass return attributes (PR #179776)   Matt Arsenault via llvm-commits
• [llvm] Inliner: Handle nofpclass return attributes (PR #179776)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Shilei Tian via llvm-commits
• [llvm] Inliner: Handle nofpclass return attributes (PR #179776)   Matt Arsenault via llvm-commits
• [llvm] Inliner: Handle nofpclass return attributes (PR #179776)   via llvm-commits
• [llvm] [RISCV] Remove codegen for trivial VP intrinsics (PR #179622)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove codegen for trivial VP intrinsics (PR #179622)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove codegen for trivial VP intrinsics (PR #179622)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove codegen for trivial VP intrinsics (PR #179622)   Craig Topper via llvm-commits
• [llvm] [msan][NFCI] Add test for switch() (PR #179775)   Thurston Dang via llvm-commits
• [llvm] [RISCV] improve `musttail` support (PR #170547)   Craig Topper via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_FMIN*/MAX* (PR #179778)   via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_FMIN*/MAX* (PR #179778)   via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Nick Desaulniers via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Gábor Spaits via llvm-commits
• [llvm] [X86] lower1BitShuffle - recognise a blend shuffle that can lower to AND/MASKZ pattern (PR #179717)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Handle vector types for reqd_work_group_size constant folding. (PR #179551)   Marcos Maronas via llvm-commits
• [llvm] d97ce9b - [LV] Use DomTree DFS numbers to sort early exit blocks.   Florian Hahn via llvm-commits
• [llvm] [LV] Allow loops with multiple early exits in legality checks. (PR #176403)   Florian Hahn via llvm-commits
• [llvm] 66ba9c9 - [MLGO] Ensure cmd_filter is marked Optional (#179781)   via llvm-commits
• [llvm] [MLGO] Ensure cmd_filter is marked Optional (PR #179781)   Aiden Grossman via llvm-commits
• [llvm] [DebugInfo] Fix an assertion in DWARFTypePrinter (PR #178986)   Peter Rong via llvm-commits
• [llvm] Reland "[NVPTX][AtomicExpandPass] Complete support for AtomicRMW in NVPTX (#176015)" (PR #179553)   Alex MacLean via llvm-commits
• [llvm] [llvm][ADT] Mark scope_exit contructors [[nodiscard]] (PR #179720)   Victor Chernyakin via llvm-commits
• [llvm] [BasicAA][TLI] Treat local-linkage globals or known environments as not aliasing errno (PR #170290)   Daniel Thornburgh via llvm-commits
• [llvm] workflows/release-binaries: Add support for Windows ARM builds (PR #177609)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm/CAS] Add file-based APIs to `OnDiskGraphDB` (PR #179782)   Argyrios Kyrtzidis via llvm-commits
• [llvm] [llvm/CAS] Add file-based APIs to `OnDiskGraphDB` (PR #179782)   Argyrios Kyrtzidis via llvm-commits
• [llvm] [DebugInfo] Fix an assertion in DWARFTypePrinter (PR #178986)   Peter Rong via llvm-commits
• [llvm] Removed incorrect "DS Store drain" check. (PR #179818)   via llvm-commits
• [llvm] Removed incorrect "DS Store drain" check. (PR #179818)   via llvm-commits
• [llvm] [DebugInfo] Fix an assertion in DWARFTypePrinter (PR #178986)   via llvm-commits
• [llvm] Revert "[LoopVectorize] Support vectorization of overflow intrinsics" (PR #179819)   Alexander Kornienko via llvm-commits
• [llvm] [DebugInfo] Fix an assertion in DWARFTypePrinter (PR #178986)   Peter Rong via llvm-commits
• [llvm] [VPlan] Create edge mask for single-destination switch (PR #179107)   via llvm-commits
• [llvm] Revert "[LoopVectorize] Support vectorization of overflow intrinsics" (PR #179819)   via llvm-commits
• [llvm] [DebugInfo] Fix an assertion in DWARFTypePrinter (PR #178986)   Peter Rong via llvm-commits
• [libc] [llvm] [libc][math][c23] Implement higher math function `cbrtf16` in LLVM libc (PR #132484)   Krishna Pandey via llvm-commits
• [llvm] [LoopVectorize] Support vectorization of overflow intrinsics (PR #174835)   Alexander Kornienko via llvm-commits
• [llvm] [DebugInfo] Fix an assertion in DWARFTypePrinter (PR #178986)   Peter Rong via llvm-commits
• [llvm] Revert "[LoopVectorize] Support vectorization of overflow intrinsics" (PR #179819)   Alexander Kornienko via llvm-commits
• [llvm] [IVDescriptors] Identify min/max recurrences in single pass. (PR #163460)   via llvm-commits
• [llvm] [IVDescriptors] Identify min/max recurrences in single pass. (PR #163460)   via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Vlad Serebrennikov via llvm-commits
• [llvm] 0b3934d - [SROA] Avoid redundant `.oldload` generation when `memset` fully covers a partition (#179643)   via llvm-commits
• [llvm] [SROA] Avoid redundant `.oldload` generation when `memset` fully covers a partition (PR #179643)   Mingjie Xu via llvm-commits
• [llvm] 5eba0e5 - gn build: Use llvm-nm instead of nm to generate version script.   Peter Collingbourne via llvm-commits
• [llvm] 16e2e7f - gn build: Generate dynamic lists for ubsan.   Peter Collingbourne via llvm-commits
• [llvm] [SystemZ] Enable rematerialization for scalar loads (PR #179838)   via llvm-commits
• [llvm] [SystemZ] Enable rematerialization for scalar loads (PR #179838)   via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Petr Penzin via llvm-commits
• [llvm] Reland "[NVPTX] Weak cmpxchg unittests for NVPTX (#176078)" (PR #179829)   via llvm-commits
• [llvm] workflows/release-asset-audit: Split workflow into two jobs (PR #179833)   Aiden Grossman via llvm-commits
• [llvm] [symbolizer] Add a --pdb option. (PR #171053)   Yuxuan Shui via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Vlad Serebrennikov via llvm-commits
• [llvm] [symbolizer] Add a --pdb option. (PR #171053)   Yuxuan Shui via llvm-commits
• [llvm] [llvm-profgen] Fix PDB dependency (PR #179830)   Kewen Meng via llvm-commits
• [llvm] [NewPM] Port x86-lvi-load (PR #179371)   Aiden Grossman via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   via llvm-commits
• [llvm] Fix profile metadata propagation in InstCombine takeLog2 (PR #179331)   Snehasish Kumar via llvm-commits
• [llvm] [AMDGPU] Extend DS loop wait optimization with flush point tracking (PR #175658)   via llvm-commits
• [llvm] Fix profile metadata propagation in InstCombine takeLog2 (PR #179331)   via llvm-commits
• [llvm] [llvm-profgen] Support loading symbols from symtab for COFF (PR #179175)   Haohai Wen via llvm-commits
• [llvm] [InstCombine] Fix profile metadata propagation in takeLog2 (PR #179331)   Aiden Grossman via llvm-commits
• [llvm] [llvm-profgen] Support loading symbols from symtab for COFF (PR #179175)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm-profgen] Support loading symbols from symtab for COFF (PR #179175)   LLVM Continuous Integration via llvm-commits
• [llvm] [msan][NFCI] Generalize handleAVX512VectorGenericMaskedFP (PR #179850)   Thurston Dang via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Heejin Ahn via llvm-commits
• [llvm] [msan][NFCI] Generalize handleAVX512VectorGenericMaskedFP (PR #179850)   via llvm-commits
• [llvm] [msan][NFCI] Generalize handleAVX512VectorGenericMaskedFP (PR #179850)   via llvm-commits
• [llvm] [RISCV] Remove codegen for trivial VP intrinsics (PR #179622)   Pengcheng Wang via llvm-commits
• [llvm] 42f423d - [msan][NFCI] Add test for switch() (#179775)   via llvm-commits
• [llvm] [MachinePipelner] Add loop-carried dependencies for global barriers (PR #174391)   Ryotaro Kasuga via llvm-commits
• [llvm] [SimplifyCFG][PGO] Add missing overflow check to ConstantFoldTerminator (PR #178964)   via llvm-commits
• [llvm] 37bbeb3 - [DA] Add tests for dependencies are missed due to large BTC (NFC) (#179664)   via llvm-commits
• [llvm] [DA] Add tests for dependencies are missed due to large BTC (NFC) (PR #179664)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [WebAssembly][FastISel] Make use of `sign-ext` proposals instructions when available (PR #179855)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][FastISel] Make use of `sign-ext` proposals instructions when available (PR #179855)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][FastISel] Make use of `sign-ext` proposals instructions when available (PR #179855)   via llvm-commits
• [llvm] OCaml bindings: Remove `ctypes` dependency (PR #179417)   Alan Hu via llvm-commits
• [llvm] [NFC][AMDGPU] Reorganize gfx125x features (PR #179843)   Shilei Tian via llvm-commits
• [llvm] [DAGCombiner] Fold trunc(build_vector(ext(x), ext(x)) -> build_vector(x,x) (PR #179857)   Liao Chunyu via llvm-commits
• [llvm] [DAGCombiner] Fold trunc(build_vector(ext(x), ext(x)) -> build_vector(x,x) (PR #179857)   via llvm-commits
• [llvm] [DAGCombiner] Fold trunc(build_vector(ext(x), ext(x)) -> build_vector(x,x) (PR #179857)   via llvm-commits
• [llvm] AMDGPU: Add nofpclass when expanding pow (PR #177933)   Shilei Tian via llvm-commits
• [llvm] 93d99e3 - [NFC][AMDGPU] Reorganize gfx125x features (#179843)   via llvm-commits
• [llvm] [NFC][AMDGPU] Reorganize gfx125x features (PR #179843)   Chinmay Deshpande via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Sameer Sahasrabuddhe via llvm-commits
• [lld] [lld][Hexagon] Fix R_HEX_TPREL_11_X relocation on duplex instructions (PR #179860)   Brian Cain via llvm-commits
• [lld] [lld][Hexagon] Fix R_HEX_TPREL_11_X relocation on duplex instructions (PR #179860)   via llvm-commits
• [lld] [lld][Hexagon] Fix R_HEX_TPREL_11_X relocation on duplex instructions (PR #179860)   Brian Cain via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [llvm] [MachinePipeliner] Add loop-carried dependences for FPExceptions (PR #174392)   Ryotaro Kasuga via llvm-commits
• [llvm] [VPlan] Introduce generic variable-length step support (PR #177114)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce generic variable-length step support (PR #177114)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce generic variable-length step support (PR #177114)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce generic variable-length step support (PR #177114)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce generic variable-length step support (PR #177114)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce generic variable-length step support (PR #177114)   Luke Lau via llvm-commits
• [llvm] [VPlan] Introduce generic variable-length step support (PR #177114)   Luke Lau via llvm-commits
• [llvm] [MachinePipeliner] Add loop-carried dependences for FPExceptions (PR #174392)   Ryotaro Kasuga via llvm-commits
• [llvm] 79a26b9 - [RISCV] Update Andes45 vector integer arithmetic scheduling info (#174538)   via llvm-commits
• [llvm] [RISCV] Update Andes45 vector integer arithmetic scheduling info (PR #174538)   Jim Lin via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [WebAssembly][FastISel] Make use of `sign-ext` proposals instructions when available (PR #179855)   Demetrius Kanios via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [lld] [ELF] Fix IRELATIVE addend if the resolver address is updated by linker relaxation (PR #179063)   via llvm-commits
• [llvm] [RISCV] Remove trivial constant from fixed-vectors-vminu-vp.ll test. NFC (PR #179868)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove trivial constant from fixed-vectors-vminu-vp.ll test. NFC (PR #179868)   via llvm-commits
• [llvm] [BasicBlockUtilsTests] Added test case splitBlockBefore2. NFC (PR #179408)   LLVM Continuous Integration via llvm-commits
• [llvm] [PDB] Fix and simplify module index lookup (PR #179869)   Haohai Wen via llvm-commits
• [llvm] [PDB] Fix and simplify module index lookup (PR #179869)   via llvm-commits
• [llvm] 2ca54b4 - [MachinePipeliner] Remove isLoopCarriedDep calls in computeStart (#174393)   via llvm-commits
• [llvm] [MachinePipeliner] Remove isLoopCarriedDep calls in computeStart (PR #174393)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Remove isLoopCarriedDep and use DDG (PR #174394)   Ryotaro Kasuga via llvm-commits
• [llvm] [NewPM] Port x86-cleanup-local-dynamic-tls (PR #179864)   via llvm-commits
• [llvm] [RISCV] Remove codegen for trivial VP intrinsics (PR #179622)   Luke Lau via llvm-commits
• [llvm] [MachinePipeliner] Remove isLoopCarriedDep and use DDG (PR #174394)   Ryotaro Kasuga via llvm-commits
• [llvm] [MachinePipeliner] Remove isLoopCarriedDep calls in computeStart (PR #174393)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Call updateCZceFeatureImplications from RISCVAsmParser::setFeatureBits. (PR #179870)   Craig Topper via llvm-commits
• [llvm] [MachinePipeliner] Remove isLoopCarriedDep and use DDG (PR #174394)   Ryotaro Kasuga via llvm-commits
• [llvm] [RISCV] Call updateCZceFeatureImplications from RISCVAsmParser::setFeatureBits. (PR #179870)   via llvm-commits
• [llvm] [RISCV] Remove trivial constant from fixed-vectors-vminu-vp.ll test. NFC (PR #179868)   Craig Topper via llvm-commits
• [clang] [compiler-rt] [llvm] [AIX] Implement the ifunc attribute. (PR #153049)   Timm Baeder via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   Kito Cheng via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   via llvm-commits
• [llvm] [AMDGPU] Non convergent readfirstlane does not depend on EXEC. NFCI. (PR #179821)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   Sam Elliott via llvm-commits
• [llvm] [AMDGPU] Non convergent readfirstlane does not depend on EXEC. NFCI. (PR #179821)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   Sam Elliott via llvm-commits
• [llvm] [NFC][LoopDistribute] Add test for doubly nested loop (PR #179263)   Ryotaro Kasuga via llvm-commits
• [llvm] [InstCombine] Fix profile metadata propagation in takeLog2 (PR #179331)   Mircea Trofin via llvm-commits
• [llvm] [RFC][ThinLTO] Reduce the number of function name promotions (PR #178587)   Teresa Johnson via llvm-commits
• [llvm] [RFC][ThinLTO] Reduce the number of function name promotions (PR #178587)   Teresa Johnson via llvm-commits
• [llvm] [RFC][ThinLTO] Reduce the number of function name promotions (PR #178587)   Teresa Johnson via llvm-commits
• [llvm] [RFC][ThinLTO] Reduce the number of function name promotions (PR #178587)   Teresa Johnson via llvm-commits
• [llvm] [RFC][ThinLTO] Reduce the number of function name promotions (PR #178587)   Teresa Johnson via llvm-commits
• [llvm] [RFC][ThinLTO] Reduce the number of function name promotions (PR #178587)   Teresa Johnson via llvm-commits
• [llvm] [RFC][ThinLTO] Reduce the number of function name promotions (PR #178587)   Teresa Johnson via llvm-commits
• [llvm] [mlir] [MLIR][OpenMP] Add Taskloop Collapse Support (PR #175924)   Kaviya Rajendiran via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Kamil Jakubus via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Kamil Jakubus via llvm-commits
• [llvm] [NewPM] Port x86-indirect-branch-tracking (PR #179874)   Kyungtak Woo via llvm-commits
• [llvm] [NewPM] Port x86-indirect-branch-tracking (PR #179874)   via llvm-commits
• [llvm] [VPlan] Create edge mask for single-destination switch (PR #179107)   via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Demetrius Kanios via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   Kito Cheng via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Kamil Jakubus via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   Kito Cheng via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   Kito Cheng via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   Kito Cheng via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   Kito Cheng via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Adar Dagan via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Adar Dagan via llvm-commits
• [llvm] [X86] lower1BitShuffle - recognise a blend shuffle that can lower to AND/MASKZ pattern (PR #179717)   Simon Pilgrim via llvm-commits
• [llvm] [X86] lower1BitShuffle - recognise a blend shuffle that can lower to AND/MASKZ pattern (PR #179717)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Non convergent readfirstlane does not depend on EXEC. NFCI. (PR #179821)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [RISCV] Remove redundant vand.vi with fpto*i to i1 (PR #179876)   Luke Lau via llvm-commits
• [llvm] [RISCV] Remove redundant vand.vi with fpto*i to i1 (PR #179876)   via llvm-commits
• [llvm] 3bbf748 - [VPlan] Create edge mask for single-destination switch (#179107)   via llvm-commits
• [llvm] [VPlan] Create edge mask for single-destination switch (PR #179107)   Luke Lau via llvm-commits
• [llvm] [VPlan] Create edge mask for single-destination switch (PR #179107)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [NewPM] Port x86-indirect-branch-tracking (PR #179874)   via llvm-commits
• [llvm] [VPlan] Create edge mask for single-destination switch (PR #179107)   via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Kamil Jakubus via llvm-commits
• [llvm] MIPS: Fix unsigned compare with zero in MipsSEInstrInfo::copyPhysReg (PR #179866)   YunQiang Su via llvm-commits
• [llvm] [NewPM] Port x86-indirect-branch-tracking (PR #179874)   Kyungtak Woo via llvm-commits
• [llvm] 6933962 - [NFC][LoopDistribute] Add test for doubly nested loop (#179263)   via llvm-commits
• [llvm] [NFC][LoopDistribute] Add test for doubly nested loop (PR #179263)   Madhur Amilkanthwar via llvm-commits
• [llvm] [NewPM] Port x86-indirect-branch-tracking (PR #179874)   via llvm-commits
• [lld] [RISCV][LLD] Zcmt RISC-V extension in lld (PR #163142)   via llvm-commits
• [llvm] [NewPM] Port x86-indirect-branch-tracking (PR #179874)   Kyungtak Woo via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Demetrius Kanios via llvm-commits
• [llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)   David Green via llvm-commits
• [llvm] [RISCV] Lower disjoint shuffle of shuffles to MERGE-GATHER sequence (PR #178095)   Ryan Buchner via llvm-commits
• [clang] [llvm] Inliner: Handle nofpclass return attributes (PR #179776)   Matt Arsenault via llvm-commits
• [llvm] [llvm][.gitignore] macOS case-sensitive update (PR #177971)   Nikita Popov via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Honey Goyal via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Honey Goyal via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [lld] [lld][BP] Fix nondeterministic function order by using std::map (PR #179841)   via llvm-commits
• [llvm] [RISCV] Lower disjoint shuffle of shuffles to MERGE-GATHER sequence (PR #178095)   Ryan Buchner via llvm-commits
• [llvm] [RISCV] Lower disjoint shuffle of shuffles to MERGE-GATHER sequence (PR #178095)   Ryan Buchner via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [llvm] [IROutliner] Correctly Replace Outlined Constants with Arguments (PR #179885)   Sam Elliott via llvm-commits
• [llvm] [IROutliner] Correctly Replace Outlined Constants with Arguments (PR #179885)   via llvm-commits
• [llvm] [AMDGPU] Fix missing waitcnt after buffer_wbl2 (PR #178316)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Don't expose internal data structure to user (PR #179736)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Don't expose internal data structure to user (PR #179736)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Don't expose internal data structure to user (PR #179736)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Don't expose internal data structure to user (PR #179736)   Jay Foad via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Honey Goyal via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   Honey Goyal via llvm-commits
• [llvm] [AMDGPU] Optimize S_OR_B32 to S_ADDK_I32 where possible (PR #177949)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Optimize S_OR_B32 to S_ADDK_I32 where possible (PR #177949)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Optimize S_OR_B32 to S_ADDK_I32 where possible (PR #177949)   Jay Foad via llvm-commits
• [llvm] [IROutliner] Correctly Replace Outlined Constants with Arguments (PR #179885)   Sam Elliott via llvm-commits
• [llvm] [X86] Fixed truncated masked stores (PR #179853)   Phoebe Wang via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [llvm] c7dd96e - [AArch64][SME] Add missing ZT0 transition (#179193)   via llvm-commits
• [llvm] [AArch64][SME] Add missing ZT0 transition (PR #179193)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64][SME] Add missing ZT0 transition (PR #179193)   Benjamin Maxwell via llvm-commits
• [llvm] 8949c6d - [MLIR][OpenMP] Add Taskloop Collapse Support (#175924)   via llvm-commits
• [llvm] [mlir] [MLIR][OpenMP] Add Taskloop Collapse Support (PR #175924)   Jack Styles via llvm-commits
• [llvm] [DAGCombiner] Fold trunc(build_vector(ext(x), ext(x)) -> build_vector(x,x) (PR #179857)   Luke Lau via llvm-commits
• [llvm] [DAGCombiner] Fold trunc(build_vector(ext(x), ext(x)) -> build_vector(x,x) (PR #179857)   Luke Lau via llvm-commits
• [llvm] [DAGCombiner] Fold trunc(build_vector(ext(x), ext(x)) -> build_vector(x,x) (PR #179857)   Luke Lau via llvm-commits
• [llvm] [DA] Add tests for dependencies are missed due to large BTC (NFC) (PR #179664)   Sjoerd Meijer via llvm-commits
• [llvm] [AArch64] Add test coverage for funnel shift with undef amount. NFC (PR #179888)   Cullen Rhodes via llvm-commits
• [llvm] [DAGCombiner] Fold trunc(build_vector(ext(x), ext(x)) -> build_vector(x,x) (PR #179857)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Fold trunc(build_vector(ext(x), ext(x)) -> build_vector(x,x) (PR #179857)   Simon Pilgrim via llvm-commits
• [llvm] [DAGCombiner] Fold trunc(build_vector(ext(x), ext(x)) -> build_vector(x,x) (PR #179857)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64] Add test coverage for funnel shift with undef amount. NFC (PR #179888)   via llvm-commits
• [llvm] [AArch64] Add test coverage for funnel shift with undef amount. NFC (PR #179888)   via llvm-commits
• [llvm] [IROutliner] Correctly Replace Outlined Constants with Arguments (PR #179885)   Chuanqi Xu via llvm-commits
• [llvm] MIPS: Fix unsigned compare with zero in MipsSEInstrInfo::copyPhysReg (PR #179866)   Nikita Popov via llvm-commits
• [llvm] [AArch64][SME] Add missing ZT0 transition (PR #179193)   via llvm-commits
• [llvm] [AMDGPU] Fix crash in InstCombine (PR #179511)   Alexey Sachkov via llvm-commits
• [llvm] [X86] lower1BitShuffle - recognise a blend shuffle that can lower to AND/MASKZ pattern (PR #179717)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Fix crash in InstCombine (PR #179511)   Alexey Sachkov via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   Julian Pokrovsky via llvm-commits
• [llvm] [AArch64] Add test coverage for funnel shift with undef amount. NFC (PR #179888)   David Green via llvm-commits
• [llvm] 209ff8b - MIPS: Fix unsigned compare with zero in MipsSEInstrInfo::copyPhysReg (#179866)   via llvm-commits
• [llvm] MIPS: Fix unsigned compare with zero in MipsSEInstrInfo::copyPhysReg (PR #179866)   YunQiang Su via llvm-commits
• [llvm] [X86] Fixed truncated masked stores (PR #179853)   Shengchen Kan via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   via llvm-commits
• [llvm] [AMDGPU] Fix crash in InstCombine (PR #179511)   Alexey Sachkov via llvm-commits
• [llvm] [X86] Fixed truncated masked stores (PR #179853)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fixed truncated masked stores (PR #179853)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fixed truncated masked stores (PR #179853)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   Julian Pokrovsky via llvm-commits
• [llvm] [LLVM] Refine MemoryEffect handling for target-specific intrinsics (PR #155590)   via llvm-commits
• [llvm] MIPS: Fix unsigned compare with zero in MipsSEInstrInfo::copyPhysReg (PR #179866)   YunQiang Su via llvm-commits
• [llvm] [X86] Fixed truncated masked stores (PR #179853)   Phoebe Wang via llvm-commits
• [llvm] MIPS: Fix unsigned compare with zero in MipsSEInstrInfo::copyPhysReg (PR #179866)   YunQiang Su via llvm-commits
• [llvm] [DA] Add test for RDIV misses dependency due to "minor algebra" (NFC) (PR #179653)   Sjoerd Meijer via llvm-commits
• [llvm] [Tablegen] Don't emit decoder tables with islands larger than 64 bits (PR #179651)   Petr Vesely via llvm-commits
• [llvm] [X86] Fixed truncated masked stores (PR #179853)   Shengchen Kan via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   Sander de Smalen via llvm-commits
• [llvm] MIPS: Fix unsigned compare with zero in MipsSEInstrInfo::copyPhysReg (PR #179866)   via llvm-commits
• [llvm] [LLVM] Relax clobbering checks for calls to consider writes only (PR #179721)   Nikita Popov via llvm-commits
• [clang] [llvm] [Triple] Make a target triple "os" for firmware (PR #176272)   David Spickett via llvm-commits
• [llvm] [RISCV] Remove redundant vand.vi with fpto*i to i1 (PR #179876)   Pengcheng Wang via llvm-commits
• [clang-tools-extra] [llvm] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)   Pierre van Houtryve via llvm-commits
• [llvm] [HotColdSplit] Add `nofuncsplit` attribute and skip it in HotColdSplit pass (PR #179002)   Nikita Popov via llvm-commits
• [llvm] [CodeGen] Remove unused first operand of SUBREG_TO_REG (PR #179690)   Jay Foad via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [lldb] [llvm] [lldb] Remove mips64 support for FreeBSD (PR #179582)   David Spickett via llvm-commits
• [llvm] [AMDGPU] Fix crash in InstCombine (PR #179511)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix crash in InstCombine (PR #179511)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix crash in InstCombine (PR #179511)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix crash in InstCombine (PR #179511)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][SME] Add missing ZT0 transition (PR #179193)   LLVM Continuous Integration via llvm-commits
• [lldb] [llvm] [lldb] Remove mips64 support for FreeBSD (PR #179582)   David Spickett via llvm-commits
• [llvm] [DA] Introduce domain for monotonicity (PR #176367)   Sjoerd Meijer via llvm-commits
• [llvm] [X86] Remove `NoSignedZerosFPMath` uses (PR #163902)   Mikołaj Piróg via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Nathan Gauër via llvm-commits
• [llvm] [Tablegen] Don't emit decoder tables with islands larger than 64 bits (PR #179651)   Petr Vesely via llvm-commits
• [llvm] [llvm] Update policy for Doxygen comments in the Coding Standards (PR #179898)   Jonas Devlieghere via llvm-commits
• [llvm] [LLVM][AArch64] Add target-aware printing for target memory locations (PR #178689)   via llvm-commits
• [llvm] [AsmParser] Track value references and function arguments (PR #174566)   Sven van Haastregt via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Nathan Gauër via llvm-commits
• [llvm] [AArch64] Add test coverage for funnel shift with undef amount. NFC (PR #179888)   Ryan Cowan via llvm-commits
• [clang-tools-extra] [llvm] New check `misc-header-guard` (PR #177315)   Baranov Victor via llvm-commits
• [llvm] [Analysis] Track offsets in PtrUseVisitor to revisit when required (PR #179726)   Nikita Popov via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Pierre van Houtryve via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   David Green via llvm-commits
• [llvm] 135ec4e - [AArch64] Add test coverage for funnel shift with undef amount. NFC (#179888)   via llvm-commits
• [llvm] [AArch64] Add test coverage for funnel shift with undef amount. NFC (PR #179888)   Cullen Rhodes via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Nathan Gauër via llvm-commits
• [llvm] [LLVM][AArch64] Add target-aware printing for target memory locations (PR #178689)   Antonio Frighetto via llvm-commits
• [llvm] [LLVM][AArch64] Add target-aware printing for target memory locations (PR #178689)   Antonio Frighetto via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Nathan Gauër via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   Amina Chabane via llvm-commits
• [lld] [llvm] [LIT][LLD] Fix Windows test failures due to path separator mismatches (PR #179865)   Hans Wennborg via llvm-commits
• [lld] [llvm] [LIT][LLD] Fix Windows test failures due to path separator mismatches (PR #179865)   Hans Wennborg via llvm-commits
• [lld] [llvm] [LIT][LLD] Fix Windows test failures due to path separator mismatches (PR #179865)   Hans Wennborg via llvm-commits
• [llvm] [llvm] Update policy for Doxygen comments in the Coding Standards (PR #179898)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [llvm] Update policy for Doxygen comments in the Coding Standards (PR #179898)   Nikita Popov via llvm-commits
• [llvm] [llvm] Update policy for Doxygen comments in the Coding Standards (PR #179898)   Nikita Popov via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   via llvm-commits
• [llvm] [DA] Introduce domain for monotonicity (PR #176367)   Ehsan Amiri via llvm-commits
• [llvm] [LLVM][AArch64] Add target-aware printing for target memory locations (PR #178689)   Nikita Popov via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Alexandros Lamprineas via llvm-commits
• [llvm] [X86] Fold XOR of two vgf2p8affineqb instructions with same input (PR #179900)   via llvm-commits
• [llvm] [llvm] Update policy for Doxygen comments in the Coding Standards (PR #179898)   Jonas Devlieghere via llvm-commits
• [llvm] [X86] Fold XOR of two vgf2p8affineqb instructions with same input (PR #179900)   via llvm-commits
• [llvm] f6e1306 - [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (#179249)   via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ehsan Amiri via llvm-commits
• [llvm] [llvm] Update policy for Doxygen comments in the Coding Standards (PR #179898)   Jonas Devlieghere via llvm-commits
• [llvm] 32cf905 - [AutoUpgrade] Handle invalid x86 intrinsics (#179374)   via llvm-commits
• [llvm] [AutoUpgrade] Handle invalid x86 intrinsics (PR #179374)   Nikita Popov via llvm-commits
• [llvm] [llvm] Update policy for Doxygen comments in the Coding Standards (PR #179898)   Jonas Devlieghere via llvm-commits
• [llvm] [AutoUpgrade] Handle invalid x86 intrinsics (PR #179374)   Nikita Popov via llvm-commits
• [llvm] [llvm] Update policy for Doxygen comments in the Coding Standards (PR #179898)   Jonas Devlieghere via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] ad86f7d - [AArch64] Use brk{a,b} for a lane mask from cttz.elts (#178674)   via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   Graham Hunter via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ehsan Amiri via llvm-commits
• [clang-tools-extra] [llvm] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] [DA] Add tests for dependencies are missed due to large BTC (NFC) (PR #179664)   Ehsan Amiri via llvm-commits
• [llvm] [AArch64] Fix regression from “Fold scalar-to-vector shuffles into DUP/FMOV" (PR #178227)   David Green via llvm-commits
• [llvm] 205ee34 - [flang][openmp] Fix GPU byref reduction descriptor initialization (#178934)   via llvm-commits
• [llvm] [mlir] [flang][openmp] Fix GPU byref reduction descriptor initialization (PR #178934)   Kareem Ergawy via llvm-commits
• [llvm] [mlir] [flang][openmp] Fix GPU byref reduction descriptor initialization (PR #178934)   via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [clang-tools-extra] [llvm] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [clang-tools-extra] [llvm] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] [AArch64] Add FeatureUseFixedOverScalableIfEqualCost to Neoverse-V3 and Neoverse-V3ae (PR #179903)   David Green via llvm-commits
• [llvm] [AArch64] Add FeatureUseFixedOverScalableIfEqualCost to Neoverse-V3 and Neoverse-V3ae (PR #179903)   via llvm-commits
• [llvm] [AArch64] Add FeatureUseFixedOverScalableIfEqualCost to Neoverse-V3 and Neoverse-V3ae (PR #179903)   via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Sander de Smalen via llvm-commits
• [llvm] [SPIRV] Implement lowering for HLSL Texture2D sampling intrinsics (PR #179312)   Nathan Gauër via llvm-commits
• [llvm] [SPIRV] Implement lowering for HLSL Texture2D sampling intrinsics (PR #179312)   Nathan Gauër via llvm-commits
• [llvm] [SPIRV] Implement lowering for HLSL Texture2D sampling intrinsics (PR #179312)   Nathan Gauër via llvm-commits
• [llvm] [SPIRV] Implement lowering for HLSL Texture2D sampling intrinsics (PR #179312)   Nathan Gauër via llvm-commits
• [clang] [flang] [llvm] [CMake] Drop per-target LLVM_REQUIRES_RTTI (PR #174201)   Alexis Engelke via llvm-commits
• [llvm] [llvm-ir2vec] adding BB-embedding map API to ir2vec python bindings (PR #177172)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] adding BB-embedding map API to ir2vec python bindings (PR #177172)   Nishant Sachdeva via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Support v_lshl_add_u64 with non-constant shift amount (PR #179904)   Frederik Harwath via llvm-commits
• [llvm] [llvm] Update policy for Doxygen comments in the Coding Standards (PR #179898)   Nikita Popov via llvm-commits
• [llvm] [llvm-ir2vec] adding BB-embedding map API to ir2vec python bindings (PR #177172)   Nishant Sachdeva via llvm-commits
• [llvm] [X86] Add test for VPBLENDW Tuning (PR #179906)   via llvm-commits
• [llvm] [X86] Add test for VPBLENDW Tuning (PR #179906)   via llvm-commits
• [llvm] Adding FuncEmb API to ir2vec python bindings (PR #179905)   Nishant Sachdeva via llvm-commits
• [llvm] [X86] Fixed truncated masked stores (PR #179853)   Phoebe Wang via llvm-commits
• [llvm] [X86] Fixed truncated masked stores (PR #179853)   Phoebe Wang via llvm-commits
• [llvm] FunctionAttrs: Remove redundant cast to Instruction (PR #179907)   Matt Arsenault via llvm-commits
• [llvm] [X86] Fold XOR of two vgf2p8affineqb instructions with same input (PR #179900)   Simon Pilgrim via llvm-commits
• [llvm] FunctionAttrs: Remove redundant cast to Instruction (PR #179907)   Matt Arsenault via llvm-commits
• [llvm] FunctionAttrs: Remove redundant cast to Instruction (PR #179907)   Matt Arsenault via llvm-commits
• [llvm] [X86] Fixed truncated masked stores (PR #179853)   Phoebe Wang via llvm-commits
• [llvm] FunctionAttrs: Remove redundant cast to Instruction (PR #179907)   Matt Arsenault via llvm-commits
• [llvm] FunctionAttrs: Remove redundant cast to Instruction (PR #179907)   via llvm-commits
• [llvm] Adding FuncEmb API to ir2vec python bindings (PR #179905)   Nishant Sachdeva via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] [X86] Add test for VPBLENDW Tuning (PR #179906)   Simon Pilgrim via llvm-commits
• [llvm] b0827f3 - [LLVM] Select fma_mix for v_cvt_f32_f16 and v_add_f32/v_mul_f32 (#160151)   via llvm-commits
• [llvm] [LLVM] Select fma_mix for v_cvt_f32_f16 and v_add_f32/v_mul_f32 (PR #160151)   Acim Maravic via llvm-commits
• [llvm] [AArch64][GlobalISel] Use GPR for illegal fconstants and extend < 32 bit GPR constants to 32 bits (PR #178692)   Ryan Cowan via llvm-commits
• [llvm] [llvm-ir2vec] Adding FuncEmb API to ir2vec python bindings (PR #179908)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding FuncEmb API to ir2vec python bindings (PR #179908)   via llvm-commits
• [llvm] [llvm-ir2vec] Adding FuncEmb API to ir2vec python bindings (PR #179908)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding FuncEmb API to ir2vec python bindings (PR #179908)   Nishant Sachdeva via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Move instruction collection into a separate function (PR #179358)   Stephen Thomas via llvm-commits
• [llvm] [Analysis] Track offsets in PtrUseVisitor to revisit when required (PR #179726)   Nikita Popov via llvm-commits
• [llvm] [RISCV] Lower disjoint shuffle of shuffles to MERGE-GATHER sequence (PR #178095)   Luke Lau via llvm-commits
• [llvm] [RISCV] Lower disjoint shuffle of shuffles to MERGE-GATHER sequence (PR #178095)   Luke Lau via llvm-commits
• [llvm] [RISCV] Lower disjoint shuffle of shuffles to MERGE-GATHER sequence (PR #178095)   Luke Lau via llvm-commits
• [llvm] [RISCV] Lower disjoint shuffle of shuffles to MERGE-GATHER sequence (PR #178095)   Luke Lau via llvm-commits
• [llvm] [RISCV] Lower disjoint shuffle of shuffles to MERGE-GATHER sequence (PR #178095)   Luke Lau via llvm-commits
• [llvm] Reapply "AMDGPU: Use real copysign in fast pow (#97152)" (PR #178036)   Matt Arsenault via llvm-commits
• [llvm] [DAG] visitFREEZE - nodes that allow multiple frozen operands should directly freeze all operands (PR #160914)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [LFI] Add MCLFIRewriter infrastructure (PR #172906)   Alexis Engelke via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Gergely Bálint via llvm-commits
• [llvm] [ARM] Recognize abi tag module flags (PR #161306)   David Green via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Gergely Bálint via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Gergely Bálint via llvm-commits
• [llvm] [llvm-ir2vec] Adding FuncEmb API to ir2vec python bindings (PR #179908)   S. VenkataKeerthy via llvm-commits
• [llvm] [llvm-ir2vec] Adding FuncEmb API to ir2vec python bindings (PR #179908)   S. VenkataKeerthy via llvm-commits
• [llvm] [AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (PR #179909)   Sander de Smalen via llvm-commits
• [llvm] [DA] Introduce domain for monotonicity (PR #176367)   Sjoerd Meijer via llvm-commits
• [llvm] [AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (PR #179909)   via llvm-commits
• [llvm] fc0c707 - [NFC][LLVM][CodeGen][SVE] Restructure urshr related PatFrags. (#170521)   via llvm-commits
• [llvm] [NFC][LLVM][CodeGen][SVE] Restructure urshr related PatFrags. (PR #170521)   Paul Walker via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   Matt Arsenault via llvm-commits
• [llvm] [llvm][Support] Add InMemoryOutputBackend (PR #179515)   Balázs Benics via llvm-commits
• [llvm] [DAG] visitFREEZE - nodes that allow multiple frozen operands should directly freeze all operands (PR #160914)   via llvm-commits
• [llvm] [DAG] visitFREEZE - nodes that allow multiple frozen operands should directly freeze all operands (PR #160914)   via llvm-commits
• [llvm] [llvm][ADT] Mark scope_exit contructors [[nodiscard]] (PR #179720)   Balázs Benics via llvm-commits
• [llvm] DAG: Use poison for unused shuffle operands in legalizer (PR #177578)   Björn Pettersson via llvm-commits
• [llvm] [llvm][ADT] Mark scope_exit contructors [[nodiscard]] (PR #179720)   Balázs Benics via llvm-commits
• [llvm] [AsmParser] Track value references and function arguments (PR #174566)   Mikael Holmen via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize rules for TFE buffer loads (PR #179529)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize rules for TFE buffer loads (PR #179529)   Petar Avramovic via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   via llvm-commits
• [llvm] [X86] Fixed truncated masked stores (PR #179853)   Simon Pilgrim via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   via llvm-commits
• [llvm] [AMDGPU] Optimize S_OR_B32 to S_ADDK_I32 where possible (PR #177949)   via llvm-commits
• [llvm] [ARM] Use REG_SEQUENCE instead of SUBREG_TO_REG for crypto patterns. NFCI. (PR #179910)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Optimize S_OR_B32 to S_ADDK_I32 where possible (PR #177949)   via llvm-commits
• [llvm] [ARM] Use REG_SEQUENCE instead of SUBREG_TO_REG for crypto patterns. NFCI. (PR #179910)   via llvm-commits
• [llvm] [ARM] Use REG_SEQUENCE instead of SUBREG_TO_REG for crypto patterns. NFCI. (PR #179910)   Jay Foad via llvm-commits
• [llvm] [AArch64] Add FeatureUseFixedOverScalableIfEqualCost to Neoverse-V3 and Neoverse-V3ae (PR #179903)   Sjoerd Meijer via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Graham Hunter via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Graham Hunter via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Graham Hunter via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Graham Hunter via llvm-commits
• [llvm] [AMDGPU] Optimize S_OR_B32 to S_ADDK_I32 where possible (PR #177949)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add buffer load format D16 RegBankLegalize rules (PR #179566)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] Optimize S_OR_B32 to S_ADDK_I32 where possible (PR #177949)   via llvm-commits
• [llvm] 3e7d47d - FunctionAttrs: Remove redundant cast to Instruction (#179907)   via llvm-commits
• [llvm] FunctionAttrs: Remove redundant cast to Instruction (PR #179907)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [DAG] visitFREEZE - nodes that allow multiple frozen operands should directly freeze all operands (PR #160914)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   LLVM Continuous Integration via llvm-commits
• [lld] [llvm] [LIT][LLD] Fix Windows test failures due to path separator mismatches (PR #179865)   Martin Storsjö via llvm-commits
• [lld] [llvm] [LIT][LLD] Fix Windows test failures due to path separator mismatches (PR #179865)   Martin Storsjö via llvm-commits
• [llvm] [ARM] Recognize abi tag module flags (PR #161306)   via llvm-commits
• [llvm] [ARM] Recognize abi tag module flags (PR #161306)   via llvm-commits
• [llvm] [AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (PR #179909)   Paul Walker via llvm-commits
• [llvm] [AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (PR #179909)   Paul Walker via llvm-commits
• [llvm] [AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (PR #179909)   Paul Walker via llvm-commits
• [llvm] [llvm-ir2vec] Adding FuncEmb API to ir2vec python bindings (PR #179908)   Nishant Sachdeva via llvm-commits
• [lld] [llvm] [LIT][LLD] Fix Windows test failures due to path separator mismatches (PR #179865)   Martin Storsjö via llvm-commits
• [llvm] [llvm-ir2vec] Adding FuncEmb API to ir2vec python bindings (PR #179908)   Nishant Sachdeva via llvm-commits
• [llvm] [AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (PR #179909)   Paul Walker via llvm-commits
• [llvm] [AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (PR #179909)   Paul Walker via llvm-commits
• [llvm] [llvm-ir2vec] Adding FuncEmb API to ir2vec python bindings (PR #179908)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (PR #179909)   Paul Walker via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [clang] [clang-tools-extra] [llvm] [WebAssembly][Sanitizer] WebAssembly Memory Tagging (PR #162972)   via llvm-commits
• [llvm] [AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (PR #179909)   Paul Walker via llvm-commits
• [llvm] [AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (PR #179909)   Graham Hunter via llvm-commits
• [llvm] [AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (PR #179909)   Paul Walker via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (PR #179909)   Paul Walker via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize rules for buffer store variants (PR #178488)   Petar Avramovic via llvm-commits
• [llvm] [SLP]Remove LoadCombine workaround after handling of the copyables (PR #174205)   Alexey Bataev via llvm-commits
• [llvm] [AMDGPU] Support v_lshl_add_u64 with non-constant shift amount (PR #179904)   Frederik Harwath via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   Chandana Mudda via llvm-commits
• [llvm] [mlir] [clang-tidy] pro-type-vararg: Allow type-generic builtins in variadic functions #179845 (PR #179896)   Akimasa Watanuki via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Alexandros Lamprineas via llvm-commits
• [llvm] [VectorCombine] Fix crash in foldEquivalentReductionCmp on i1 vector (PR #179917)   Valeriy Savchenko via llvm-commits
• [llvm] [AMDGPU] Support v_lshl_add_u64 with non-constant shift amount (PR #179904)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Support v_lshl_add_u64 with non-constant shift amount (PR #179904)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Support v_lshl_add_u64 with non-constant shift amount (PR #179904)   Jay Foad via llvm-commits
• [llvm] [VectorCombine] Fix crash in foldEquivalentReductionCmp on i1 vector (PR #179917)   via llvm-commits
• [llvm] [VectorCombine] Fix crash in foldEquivalentReductionCmp on i1 vector (PR #179917)   via llvm-commits
• [llvm] Add clmul zext AArch64 lowering tests (PR #179641)   Matthew Devereau via llvm-commits
• [llvm] Add clmul zext AArch64 lowering tests (PR #179641)   Matthew Devereau via llvm-commits
• [llvm] [VectorCombine] Fix crash in foldEquivalentReductionCmp on i1 vector (PR #179917)   Simon Pilgrim via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Enable strict mode in divsf3/mulsf3 tests (PR #179918)   Simon Tatham via llvm-commits
• [llvm] [VectorCombine] Fix crash in foldEquivalentReductionCmp on i1 vector (PR #179917)   Valeriy Savchenko via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   Mikael Holmen via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Ramkumar Ramachandra via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Enable strict mode in divsf3/mulsf3 tests (PR #179918)   via llvm-commits
• [llvm] [AMDGPU] Support v_lshl_add_u64 with non-constant shift amount (PR #179904)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Support v_lshl_add_u64 with non-constant shift amount (PR #179904)   Matt Arsenault via llvm-commits
• [llvm] [llvm][ADT] Mark scope_exit contructors [[nodiscard]] (PR #179720)   via llvm-commits
• [llvm] [AMDGPU] Support v_lshl_add_u64 with non-constant shift amount (PR #179904)   Matt Arsenault via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Graham Hunter via llvm-commits
• [llvm] [DebugInfo] Add macro tracking support to DebugInfoFinder (PR #179931)   Manuel Carrasco via llvm-commits
• [llvm] d1598c9 - [ARM] Recognize abi tag module flags (#161306)   via llvm-commits
• [llvm] [ARM] Recognize abi tag module flags (PR #161306)   via llvm-commits
• [llvm] [LLVM][CodeGen][DirectX] Fix scalarisation when vector ConstantFP is used. (PR #172684)   Paul Walker via llvm-commits
• [llvm] [DebugInfo] Add macro tracking support to DebugInfoFinder (PR #179931)   via llvm-commits
• [llvm] [SystemZ][z/OS] Use the text section for jump tables (PR #179793)   Ulrich Weigand via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Dominik Steenken via llvm-commits
• [llvm] [ARM] support `r14` as an alias for `lr` (PR #179740)   Alex Rønne Petersen via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Pierre van Houtryve via llvm-commits
• [llvm] [GOFF] Set reference to ADA (PR #179734)   Ulrich Weigand via llvm-commits
• [llvm] [SimplifyCFG][PGO] Add missing overflow check to ConstantFoldTerminator (PR #178964)   via llvm-commits
• [llvm] [SimplifyCFG][PGO] Add missing overflow check to ConstantFoldTerminator (PR #178964)   Mitchel Dickerson via llvm-commits
• [clang-tools-extra] [llvm] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] MIPS: readsWritesFloatRegister, inc Idx for continue (PR #179932)   YunQiang Su via llvm-commits
• [llvm] MIPS: readsWritesFloatRegister, inc Idx for continue (PR #179932)   via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Jay Foad via llvm-commits
• [llvm] github-automation.py: Fix mis-indented statement (PR #149653)   Cullen Rhodes via llvm-commits
• [llvm] [ARM] Recognize abi tag module flags (PR #161306)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Matt Arsenault via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Matt Arsenault via llvm-commits
• [llvm] [ARM] Remove `NoInfsFPMath` and `NoNaNsFPMath` uses (PR #179935)   via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Matt Arsenault via llvm-commits
• [llvm] Attributor: Add -light options to -attributor-enable flag (PR #179346)   Zibi Sarbinowski via llvm-commits
• [llvm] [SLP]Remove LoadCombine workaround after handling of the copyables (PR #174205)   Simon Pilgrim via llvm-commits
• [llvm] [llvm][ADT] Mark scope_exit contructors [[nodiscard]] (PR #179720)   Michael Buch via llvm-commits
• [llvm] 238ccd0 - [llvm][ADT] Mark scope_exit contructors [[nodiscard]] (#179720)   via llvm-commits
• [llvm] [llvm][ADT] Mark scope_exit contructors [[nodiscard]] (PR #179720)   Balázs Benics via llvm-commits
• [llvm] Attributor: Add -light options to -attributor-enable flag (PR #179346)   Zibi Sarbinowski via llvm-commits
• [llvm] [LLVM][CodeGen][DirectX] Fix scalarisation when vector ConstantFP is used. (PR #172684)   via llvm-commits
• [llvm] [X86] Blocklist instructions that are unsafe for masked-load folding. (PR #178888)   via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Ramkumar Ramachandra via llvm-commits
• [llvm] [DebugInfo] Add macro tracking support to DebugInfoFinder (PR #179931)   Manuel Carrasco via llvm-commits
• [llvm] Attributor: Add -light options to -attributor-enable flag (PR #179346)   Matt Arsenault via llvm-commits
• [llvm] Reapply "AMDGPU: Use real copysign in fast pow (#97152)" (PR #178036)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Pierre van Houtryve via llvm-commits
• [llvm] [llvm][.gitignore] macOS case-sensitive update (PR #177971)   via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Pierre van Houtryve via llvm-commits
• [llvm] [X86] Fold XOR of two vgf2p8affineqb instructions with same input (PR #179900)   via llvm-commits
• [llvm] 744827e - [X86] Fixed truncated masked stores (#179853)   via llvm-commits
• [llvm] [X86] Fixed truncated masked stores (PR #179853)   Phoebe Wang via llvm-commits
• [llvm] [X86] Fixed truncated masked stores (PR #179491)   via llvm-commits
• [llvm] [X86] Fixed truncated masked stores (PR #179491)   via llvm-commits
• [compiler-rt] [llvm] [Profile] Enable binary profile correlation for Mach-O binaries (PR #179937)   Marina Taylor via llvm-commits
• [compiler-rt] [llvm] [Profile] Enable binary profile correlation for Mach-O binaries (PR #179937)   via llvm-commits
• [llvm] [DebugInfo] Add macro tracking support to DebugInfoFinder (PR #179931)   Manuel Carrasco via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16fmaf128 to Header Only (PR #177850)   Muhammad Bassiouni via llvm-commits
• [llvm] [mlir] [clang-tidy] pro-type-vararg: Allow type-generic builtins in variadic functions #179845 (PR #179896)   Saksham Singhal via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16fmaf to Header Only. (PR #178851)   Muhammad Bassiouni via llvm-commits
• [llvm] [mlir] [clang-tidy] pro-type-vararg: Allow type-generic builtins in variadic functions #179845 (PR #179896)   Saksham Singhal via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmaf128 into a header only. (PR #177873)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmaf128 into a header only. (PR #177873)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmaf128 into a header only. (PR #177873)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmal to Header Only. (PR #179069)   Muhammad Bassiouni via llvm-commits
• [clang] [llvm] [SystemZ][z/OS] Support both EBCDIC & ASCII form of type_info::name() (PR #179687)   Abhina Sree via llvm-commits
• [llvm] [mlir] [clang-tidy] pro-type-vararg: Allow type-generic builtins in variadic functions #179845 (PR #179896)   Saksham Singhal via llvm-commits
• [llvm] f3bd1b9 - [SystemZ][z/OS] Use the text section for jump tables (#179793)   via llvm-commits
• [llvm] [SystemZ][z/OS] Use the text section for jump tables (PR #179793)   Kai Nacke via llvm-commits
• [llvm] 96d2cb4 - [LLVM][CodeGen][DirectX] Fix scalarisation when vector ConstantFP is used. (#172684)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16sqrtf128 to Header Only. (PR #178750)   Muhammad Bassiouni via llvm-commits
• [llvm] [LLVM][CodeGen][DirectX] Fix scalarisation when vector ConstantFP is used. (PR #172684)   Paul Walker via llvm-commits
• [clang] [llvm] [AMDGPU] Fix crash in InstCombine (PR #179511)   Alexey Sachkov via llvm-commits
• [llvm] [X86] Fold XOR of two vgf2p8affineqb instructions with same input (PR #179900)   Simon Pilgrim via llvm-commits
• [clang] [llvm] [AMDGPU] Fix crash in InstCombine (PR #179511)   via llvm-commits
• [clang] [llvm] [AMDGPU] Fix crash in InstCombine (PR #179511)   Alexey Sachkov via llvm-commits
• [clang] [llvm] [AMDGPU] Fix crash in InstCombine (PR #179511)   Alexey Sachkov via llvm-commits
• [llvm] [ARM] Remove `NoInfsFPMath` and `NoNaNsFPMath` uses (PR #179935)   via llvm-commits
• [llvm] [ARM] Remove `NoInfsFPMath` and `NoNaNsFPMath` uses (PR #179935)   via llvm-commits
• [clang] [llvm] [AMDGPU] Fix crash in InstCombine (PR #179511)   Alexey Sachkov via llvm-commits
• [clang] [llvm] [AMDGPU] Fix crash in InstCombine (PR #179511)   Alexey Sachkov via llvm-commits
• [clang] [llvm] [AMDGPU] Fix crash in InstCombine (PR #179511)   Alexey Sachkov via llvm-commits
• [libc] [llvm] [libc][math] Move hypot to shared/math and make it constexpr (PR #177588)   Muhammad Bassiouni via llvm-commits
• [llvm] [X86] Fold XOR of two vgf2p8affineqb instructions with same input (PR #179900)   via llvm-commits
• [llvm] [missed-opt][X86] Optimize fptosi+select down to a single cvttsd2si Instruction on X86 (PR #172710)   Simon Pilgrim via llvm-commits
• [llvm] [missed-opt][X86] Optimize fptosi+select down to a single cvttsd2si Instruction on X86 (PR #172710)   Simon Pilgrim via llvm-commits
• [libc] [llvm] [libc][math] Refactor llogbl to be header-only and constexpr (PR #175376)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor logb implementation to header-only (PR #175719)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor logbl to Header Only. (PR #176832)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor sinpif16 to header only. (PR #178503)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor log10f16 to Header Only. (PR #176523)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor log10f to Header Only. (PR #176520)   Muhammad Bassiouni via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Graham Hunter via llvm-commits
• [llvm] [mlir] [clang-tidy] pro-type-vararg: Allow type-generic builtins in variadic functions #179845 (PR #179896)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor log1pf to Header Only. (PR #176525)   Muhammad Bassiouni via llvm-commits
• [llvm] 2502e3b - IR: Promote "denormal-fp-math" to a first class attribute (#174293)   via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Matt Arsenault via llvm-commits
• [libc] [llvm] [libc][math] Refactor log2f16 to Header Only. (PR #176526)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor log2f to Header Only. (PR #176527)   Muhammad Bassiouni via llvm-commits
• [llvm] [DebugInfo] Add macro tracking support to DebugInfoFinder (PR #179931)   Manuel Carrasco via llvm-commits
• [libc] [llvm] [libc][math] Refactor pow to Header Only. (PR #176529)   Muhammad Bassiouni via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Sander de Smalen via llvm-commits
• [llvm] [DebugInfo] Add macro tracking support to DebugInfoFinder (PR #179931)   Manuel Carrasco via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   LLVM Continuous Integration via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Paschalis Mpeis via llvm-commits
• [llvm] [AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (PR #179909)   Sander de Smalen via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Paschalis Mpeis via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   LLVM Continuous Integration via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Sander de Smalen via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Sander de Smalen via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Sander de Smalen via llvm-commits
• [llvm] 3ee7a2f - Add clmul zext AArch64 lowering tests (#179641)   via llvm-commits
• [llvm] Add clmul zext AArch64 lowering tests (PR #179641)   Matthew Devereau via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [SPIR-V] initial support for @llvm.structured.gep (PR #178668)   Nathan Gauër via llvm-commits
• [llvm] [llvm] Update policy for Doxygen comments in the Coding Standards (PR #179898)   Aaron Ballman via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   Muhammad Bassiouni via llvm-commits
• [llvm] 05a2b14 - [LV] Optimize FindLast recurrences to FindIV (NFCI). (#177870)   via llvm-commits
• [llvm] [LV] Optimize FindLast recurrences to FindIV (NFCI). (PR #177870)   Florian Hahn via llvm-commits
• [llvm] [ExpandIRInsts] Allow int bw == float bw in itofp (PR #179943)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [ExpandIRInsts] Allow int bw == float bw in itofp (PR #179943)   via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [ARM] Remove `NoInfsFPMath` and `NoNaNsFPMath` uses (PR #179935)   Matt Arsenault via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [clang] [llvm] [AMDGPU] Fix crash in InstCombine (PR #179511)   Matt Arsenault via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [llvm] [ExpandIRInsts] Allow int bw == float bw in itofp (PR #179943)   Matt Arsenault via llvm-commits
• [llvm] [NFC][LowerMemIntrinsics] Use TypeSize consistently for type sizes (PR #179945)   Fabian Ritter via llvm-commits
• [llvm] [NFC][LowerMemIntrinsics] Use TypeSize consistently for type sizes (PR #179945)   Fabian Ritter via llvm-commits
• [llvm] [NewPM] Port x86-cleanup-local-dynamic-tls (PR #179864)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port x86-cleanup-local-dynamic-tls (PR #179864)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port x86-cleanup-local-dynamic-tls (PR #179864)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port x86-cleanup-local-dynamic-tls (PR #179864)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port x86-cleanup-local-dynamic-tls (PR #179864)   Aiden Grossman via llvm-commits
• [llvm] [NewPM] Port x86-cleanup-local-dynamic-tls (PR #179864)   Aiden Grossman via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   David Zbarsky via llvm-commits
• [llvm] [NFC][LowerMemIntrinsics] Use TypeSize consistently for type sizes (PR #179945)   via llvm-commits
• [llvm] [DebugInfo] Add macro tracking support to DebugInfoFinder (PR #179931)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [DebugInfo] Add macro tracking support to DebugInfoFinder (PR #179931)   Vladislav Dzhidzhoev via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Baranov Victor via llvm-commits
• [llvm] [NFC][LowerMemIntrinsics] Use TypeSize consistently for type sizes (PR #179945)   Fabian Ritter via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Paschalis Mpeis via llvm-commits
• [llvm] [NFC][LowerMemIntrinsics] Use TypeSize consistently for type sizes (PR #179945)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Fix alias logic in canHoistOrSinkWithNoAliasCheck (PR #179504)   Ramkumar Ramachandra via llvm-commits
• [llvm] [AArch64][SelectionDAG] Only fold into ands directly if AND is one-use (PR #167371)   via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   David Zbarsky via llvm-commits
• [llvm] [NewPM] Port x86-indirect-branch-tracking (PR #179874)   Aiden Grossman via llvm-commits
• [clang] [llvm] [SystemZ] Global Stackprotector and associated location section (PR #169317)   Matt Arsenault via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Alexey Moksyakov via llvm-commits
• [llvm] [bolt] Simplify rodata/literal load for X86_64 & AArch64 (PR #179474)   Paschalis Mpeis via llvm-commits
• [llvm] [VPlan] Avoid VectorPointer bail in narrowInterleaveGroups (PR #172286)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   via llvm-commits
• [llvm] [GISel][CallLowering] Keep IR types longer (PR #179946)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   via llvm-commits
• [llvm] [VPlan] Reuse allowed-users logic in narrowToSingleScalars (PR #174444)   Ramkumar Ramachandra via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_FSQRT (PR #179817)   Matt Arsenault via llvm-commits
• [llvm] [GISel][CallLowering] Keep IR types longer (PR #179946)   via llvm-commits
• [llvm] [LLVM] Update contact info for VLIW instruction scheduling maintainer (PR #120444)   Nikita Popov via llvm-commits
• [llvm] [GISel][CallLowering] Keep IR types longer (PR #179946)   Matt Arsenault via llvm-commits
• [llvm] [AArch64][ISel] Lower fixed-width i64 vector CLMUL intrinsics (PR #178876)   Matthew Devereau via llvm-commits
• [llvm] [SelectionDAG] Mark LowerTypeTests as required and remove intrinsic handling from #142939 (PR #179249)   Mikael Holmen via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Florian Hahn via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Florian Hahn via llvm-commits
• [llvm] [Hexagon] Update maintainers (PR #177935)   Nikita Popov via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   LLVM Continuous Integration via llvm-commits
• [llvm] [LoopVectorize][LAA] Hoist load in memory IV to allow vectorization (PR #168312)   Raphael Moreira Zinsly via llvm-commits
• [llvm] [X86] Fold XOR of two vgf2p8affineqb instructions with same input (PR #179900)   via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] Fold XOR of two vgf2p8affineqb instructions with same input (PR #179900)   via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [llvm] [X86] Fold XOR of two vgf2p8affineqb instructions with same input (PR #179900)   via llvm-commits
• [llvm] [LV] Regen a VPlan-printing test with UTC (PR #179948)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Regen a VPlan-printing test with UTC (PR #179948)   via llvm-commits
• [llvm] [DebugInfo] Add macro tracking support to DebugInfoFinder (PR #179931)   Manuel Carrasco via llvm-commits
• [llvm] [DebugInfo] Add macro tracking support to DebugInfoFinder (PR #179931)   Manuel Carrasco via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [llvm] [BOLT][BTI] Refactor: move applyBTIFixup under MCPlusBuilder (PR #177164)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][BTI] Refactor: move applyBTIFixup under MCPlusBuilder (PR #177164)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][BTI] Refactor: move applyBTIFixup under MCPlusBuilder (PR #177164)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][BTI] Refactor: move applyBTIFixup under MCPlusBuilder (PR #177164)   Paschalis Mpeis via llvm-commits
• [llvm] [BOLT][BTI] Refactor: move applyBTIFixup under MCPlusBuilder (PR #177164)   Paschalis Mpeis via llvm-commits
• [llvm] [VPlan] Avoid VectorPointer bail in narrowInterleaveGroups (PR #172286)   Ramkumar Ramachandra via llvm-commits
• [llvm] [BOLT][BTI] Refactor: move applyBTIFixup under MCPlusBuilder (PR #177164)   Paschalis Mpeis via llvm-commits
• [llvm] [DebugInfo] Add macro tracking support to DebugInfoFinder (PR #179931)   via llvm-commits
• [llvm] [VPlan] Reuse allowed-users logic in narrowToSingleScalars (PR #174444)   Ramkumar Ramachandra via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Nikita Popov via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Florian Hahn via llvm-commits
• [llvm] ValueTracking: Handle tracking nan through powi (PR #179311)   Matt Arsenault via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   via llvm-commits
• [llvm] [DebugInfo] Add macro tracking support to DebugInfoFinder (PR #179931)   Manuel Carrasco via llvm-commits
• [clang] [llvm] Inliner: Handle nofpclass return attributes (PR #179776)   Aiden Grossman via llvm-commits
• [llvm] [NFC][CAS][Unittest] Pass env for MultiProcess tests (PR #179949)   Jinsong Ji via llvm-commits
• [llvm] ValueTracking: Handle tracking nan through powi (PR #179311)   Matt Arsenault via llvm-commits
• [clang] [llvm] Inliner: Handle nofpclass return attributes (PR #179776)   Aiden Grossman via llvm-commits
• [clang] [llvm] Inliner: Handle nofpclass return attributes (PR #179776)   Matt Arsenault via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Erich Keane via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Erich Keane via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Erich Keane via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Erich Keane via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Erich Keane via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Erich Keane via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Erich Keane via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Erich Keane via llvm-commits
• [llvm] [NFC][CAS][Unittests] Pass env for MultiProcess tests (PR #179949)   via llvm-commits
• [llvm] [NFC][CAS][Unittests] Pass env for MultiProcess tests (PR #179949)   Jinsong Ji via llvm-commits
• [llvm] [NFC][CAS][Unittests] Pass env for MultiProcess tests (PR #179949)   Jinsong Ji via llvm-commits
• [lldb] [llvm] [lldb] Remove mips64 support for FreeBSD (PR #179582)   Minsoo Choo via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_FREEZE (PR #179796)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_FREEZE (PR #179796)   Matt Arsenault via llvm-commits
• [clang] [llvm] Inliner: Handle nofpclass return attributes (PR #179776)   Aiden Grossman via llvm-commits
• [llvm] [AMDGPU] Fix V_INDIRECT_REG_READ_GPR_IDX expansion with immediate index (PR #179699)   Matt Arsenault via llvm-commits
• [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   David Zbarsky via llvm-commits
• [llvm] 7165353 - Revert "[LoopVectorize] Support vectorization of overflow intrinsics" (#179819)   via llvm-commits
• [llvm] [SelectionDAG] This is a follow-up to #179249 after review. (PR #179953)   via llvm-commits
• [llvm] [AMDGPU] [GlobalISel] Add register bank legalize rules for G_FEXP2 (PR #179954)   via llvm-commits
• [llvm] [AMDGPU] [GlobalISel] Add register bank legalize rules for G_FEXP2 (PR #179954)   via llvm-commits
• [llvm] [AMDGPU] [GlobalISel] Add register bank legalize rules for G_FEXP2 (PR #179954)   via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Florian Hahn via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Nathan Gauër via llvm-commits
• [llvm] [AMDGPU] [GlobalISel] Add register bank legalize rules for G_FEXP2 (PR #179954)   via llvm-commits
• [lld] [lld][Hexagon] Fix R_HEX_TPREL_11_X relocation on duplex instructions (PR #179860)   Brian Cain via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm] Update policy for Doxygen comments in the Coding Standards (PR #179898)   David Spickett via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16fmaf128 to Header Only (PR #177850)   via llvm-commits
• [lldb] [llvm] [lldb] Remove mips64 support for FreeBSD (PR #179582)   Ed Maste via llvm-commits
• [llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)   Matt Arsenault via llvm-commits
• [lld] [lld][Hexagon] Fix R_HEX_TPREL_11_X relocation on duplex instructions (PR #179860)   Brian Cain via llvm-commits
• [llvm] [X86] Fold XOR of two vgf2p8affineqb instructions with same input (PR #179900)   via llvm-commits
• [lld] [lld][Hexagon] Fix R_HEX_TPREL_11_X relocation on duplex instructions (PR #179860)   Brian Cain via llvm-commits
• [lld] [lld][Hexagon] Fix R_HEX_TPREL_11_X relocation on duplex instructions (PR #179860)   Brian Cain via llvm-commits
• [llvm] 03190b0 - [gn build] Port 4f3ba73896e4   LLVM GN Syncbot via llvm-commits
• [llvm] [SPIRV] Implement lowering for HLSL Texture2D sampling intrinsics (PR #179312)   Steven Perron via llvm-commits
• [lldb] [llvm] [lldb] Remove mips64 support for FreeBSD (PR #179582)   Minsoo Choo via llvm-commits
• [lldb] [llvm] [lldb] Remove mips64 support for FreeBSD (PR #179582)   Minsoo Choo via llvm-commits
• [llvm] [RISCV] Remove redundant vand.vi with fpto*i to i1 (PR #179876)   Craig Topper via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Petar Avramovic via llvm-commits
• [llvm] bfbbed1 - [RISCV] Call updateCZceFeatureImplications from RISCVAsmParser::setFeatureBits. (#179870)   via llvm-commits
• [llvm] [RISCV] Call updateCZceFeatureImplications from RISCVAsmParser::setFeatureBits. (PR #179870)   Craig Topper via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] workflows/release-asset-audit: Split workflow into two jobs (PR #179833)   Tom Stellard via llvm-commits
• [llvm] [NFC][CAS][Unittests] Pass env for MultiProcess tests (PR #179949)   Jinsong Ji via llvm-commits
• [lldb] [llvm] [lldb] Remove mips64 support for FreeBSD (PR #179582)   David Spickett via llvm-commits
• [llvm] 427bb1c - [lldb] Remove mips64 support for FreeBSD (#179582)   via llvm-commits
• [lldb] [llvm] [lldb] Remove mips64 support for FreeBSD (PR #179582)   David Spickett via llvm-commits
• [llvm] [AMDGPU] [GlobalISel] Add register bank legalize rules for G_FEXP2 (PR #179954)   via llvm-commits
• [llvm] [GOFF] Set reference to ADA (PR #179734)   Kai Nacke via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Florian Hahn via llvm-commits
• [llvm] [CodeGen] Add OffloadBlockUniformityAnalysis for offload PGO (PR #178417)   Yaxun Liu via llvm-commits
• [llvm] Port gisel cse analysis to npm (PR #179815)   Matt Arsenault via llvm-commits
• [lldb] [llvm] [lldb] [Process/FreeBSD] Assume minimum is FreeBSD 14 (PR #179587)   Minsoo Choo via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] 8283972 - [gn build] Port 427bb1cc1b09   LLVM GN Syncbot via llvm-commits
• [llvm] e0c2cc7 - [AMDGPU][GlobalISel] Add buffer store byte/short RegBankLegalize rules (#179367)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add buffer store byte/short RegBankLegalize rules (PR #179367)   via llvm-commits
• [llvm] [Inline] Remove redundant run lines in tests (PR #179959)   Aiden Grossman via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [Inline] Remove redundant run lines in tests (PR #179959)   via llvm-commits
• [llvm] [Inline] Remove redundant run lines in tests (PR #179959)   via llvm-commits
• [llvm] [Inline] Remove redundant run lines in tests (PR #179959)   via llvm-commits
• [llvm] [Analysis] Track offsets in PtrUseVisitor to revisit when required (PR #179726)   Jameson Nash via llvm-commits
• [llvm] d737229 - [ExpandIRInsts] Allow int bw == float bw in itofp (#179943)   via llvm-commits
• [llvm] [ExpandIRInsts] Allow int bw == float bw in itofp (PR #179943)   Nikita Popov via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   via llvm-commits
• [llvm] [Analysis] Track offsets in PtrUseVisitor to revisit when required (PR #179726)   Jameson Nash via llvm-commits
• [llvm] [Inline] Remove redundant run lines in tests (PR #179959)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_FREEZE (PR #179796)   Petar Avramovic via llvm-commits
• [llvm] [RISCV] Generate landing pad based on cf-protection-branch flag only (PR #179960)   Kito Cheng via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   David Zbarsky via llvm-commits
• [llvm] [RISCV] Generate landing pad based on cf-protection-branch flag only (PR #179960)   via llvm-commits
• [llvm] [llvm] Update policy for Doxygen comments in the Coding Standards (PR #179898)   Felipe de Azevedo Piovezan via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   via llvm-commits
• [llvm] [Analysis] Track offsets in PtrUseVisitor to revisit when required (PR #179726)   Jameson Nash via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [RISCV] Fix P-extension instruction names per spec 0.19 (PR #179961)   Kito Cheng via llvm-commits
• [llvm] [AMDGPU] Add DPP16 Row Share optimization for llvm.amdgcn.wave.shuffle (PR #177470)   Domenic Nutile via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] [SystemZ] Enable rematerialization for scalar loads (PR #179838)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Enable rematerialization for scalar loads (PR #179838)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Enable rematerialization for scalar loads (PR #179838)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Enable rematerialization for scalar loads (PR #179838)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Enable rematerialization for scalar loads (PR #179838)   Ulrich Weigand via llvm-commits
• [llvm] [RISCV] Fix P-extension instruction names per spec 0.19 (PR #179961)   via llvm-commits
• [llvm] [RISCV] Fix P-extension instruction names per spec 0.19 (PR #179961)   Kito Cheng via llvm-commits
• [llvm] [VPlan] Simplify the computation of the block entry mask. (PR #173265)   Mel Chen via llvm-commits
• [llvm] [RISCV] Fix P-extension instruction names per spec 0.19 (PR #179961)   Kito Cheng via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Florian Hahn via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [llvm] [X86] Honor rewrite semantics of `contract` in X86ISel combines (PR #174440)   Mikołaj Piróg via llvm-commits
• [llvm] GlobalISel: Remove unused argument from CSEInfo (PR #179962)   Matt Arsenault via llvm-commits
• [llvm] GlobalISel: Remove unused argument from CSEInfo (PR #179962)   Matt Arsenault via llvm-commits
• [llvm] GlobalISel: Remove unused argument from CSEInfo (PR #179962)   Matt Arsenault via llvm-commits
• [llvm] GlobalISel: Remove unused argument from CSEInfo (PR #179962)   Matt Arsenault via llvm-commits
• [llvm] [GOFF] Set reference to ADA (PR #179734)   Ulrich Weigand via llvm-commits
• [llvm] [ExpandIRInsts] Support int bw < float bw in itofp expansion (PR #179963)   Nikita Popov via llvm-commits
• [llvm] GlobalISel: Remove unused argument from CSEInfo (PR #179962)   via llvm-commits
• [llvm] [AMDGPU] Fix V_INDIRECT_REG_READ_GPR_IDX expansion with immediate index (PR #179699)   Petr Kurapov via llvm-commits
• [llvm] d3fb3c5 - [GISel][CallLowering] Keep IR types longer (#179946)   via llvm-commits
• [llvm] [GISel][CallLowering] Keep IR types longer (PR #179946)   Nikita Popov via llvm-commits
• [llvm] [ExpandIRInsts] Support int bw < float bw in itofp expansion (PR #179963)   via llvm-commits
• [llvm] [X86] Honor rewrite semantics of `contract` in X86ISel combines (PR #174440)   via llvm-commits
• [llvm] [AMDGPU] [GlobalISel] Add register bank legalize rules for G_FEXP2 (PR #179954)   Matt Arsenault via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Vlad Serebrennikov via llvm-commits
• [llvm] [ExpandIRInsts] Allow int bw == float bw in itofp (PR #179943)   LLVM Continuous Integration via llvm-commits
• [llvm] [ExpandIRInsts] Support int bw < float bw in itofp expansion (PR #179963)   Matt Arsenault via llvm-commits
• [llvm] [SLP]Remove LoadCombine workaround after handling of the copyables (PR #174205)   Alexey Bataev via llvm-commits
• [llvm] [AMDGPU] Fix V_INDIRECT_REG_READ_GPR_IDX expansion with immediate index (PR #179699)   Petr Kurapov via llvm-commits
• [llvm] [BOLT][BTI] Refactor: move applyBTIFixup under MCPlusBuilder (PR #177164)   Alexandros Lamprineas via llvm-commits
• [llvm] [BOLT][BTI] Refactor: move applyBTIFixup under MCPlusBuilder (PR #177164)   Alexandros Lamprineas via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize rules for TFE buffer loads (PR #179529)   via llvm-commits
• [llvm] f517520 - [ProfCheck] Add ExpandIRInsts test to xfail list   Aiden Grossman via llvm-commits
• [llvm] [MC] Return const FeatureBitset& from MCSubtargetInfo::ToggleFeature/SetFeatureBitsTransitively/ClearFeatureBitsTransitively (PR #179964)   Matt Arsenault via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Nathan Gauër via llvm-commits
• [llvm] [MC] Return const FeatureBitset& from MCSubtargetInfo::ToggleFeature/SetFeatureBitsTransitively/ClearFeatureBitsTransitively (PR #179964)   via llvm-commits
• [llvm] 4d27530 - [Offloading] Offload Binary Format V2: Support Multiple Entries (#169425)   via llvm-commits
• [clang] [llvm] [Offloading] Offload Binary Format V2: Support Multiple Entries (PR #169425)   Yury Plyakhin via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16fmaf128 to Header Only (PR #177850)   LLVM Continuous Integration via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   David Zbarsky via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16fmaf128 to Header Only (PR #177850)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16fmaf128 to Header Only (PR #177850)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16fmaf128 to Header Only (PR #177850)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16fmaf128 to Header Only (PR #177850)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   Muhammad Bassiouni via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Vlad Serebrennikov via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16fmaf128 to Header Only (PR #177850)   LLVM Continuous Integration via llvm-commits
• [llvm] Reland "[NVPTX] Weak cmpxchg unittests for NVPTX" (PR #179829)   Pradeep Kumar via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Erich Keane via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16fmaf128 to Header Only (PR #177850)   Muhammad Bassiouni via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Erich Keane via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Erich Keane via llvm-commits
• [llvm] Port gisel cse analysis to npm (PR #179815)   Gergo Stomfai via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] f513f44 - [Inline] Remove redundant run lines in tests (#179959)   via llvm-commits
• [llvm] [Inline] Remove redundant run lines in tests (PR #179959)   Aiden Grossman via llvm-commits
• [clang] [llvm] [Offloading] Offload Binary Format V2: Support Multiple Entries (PR #169425)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [Offloading] Offload Binary Format V2: Support Multiple Entries (PR #169425)   LLVM Continuous Integration via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Jay Foad via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Jay Foad via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [NFC][CAS][Unittests] Pass env for MultiProcess tests (PR #179949)   Steven Wu via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16fmaf128 to Header Only (PR #177850)   Muhammad Bassiouni via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] a9adf7d - GlobalISel: Remove unused argument from CSEInfo (#179962)   via llvm-commits
• [llvm] GlobalISel: Remove unused argument from CSEInfo (PR #179962)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold min/max(fpext x, C) to fpext(min/max(x, fptrunc C)) (PR #179968)   Nikita Popov via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16fmaf128 to Header Only (PR #177850)   via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] 9ed7ba8 - [RISCV] Remove redundant vand.vi with fpto*i to i1 (#179876)   via llvm-commits
• [llvm] [Analysis] Track offsets in PtrUseVisitor to revisit when required (PR #179726)   Jameson Nash via llvm-commits
• [llvm] [RISCV] Remove redundant vand.vi with fpto*i to i1 (PR #179876)   Luke Lau via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Matheus Izvekov via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16fmaf to Header Only. (PR #178851)   via llvm-commits
• [llvm] [X86] Honor rewrite semantics of `contract` in X86ISel combines (PR #174440)   via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [NFCI][RTTI][Passes] Make the ID fields const char (PR #179970)   Steffen Larsen via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   Matt Arsenault via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [NFCI][RTTI][Passes] Make the ID fields const char (PR #179970)   via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [NFCI][RTTI][Passes] Make the ID fields const char (PR #179970)   via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [NFCI][RTTI][Passes] Make the ID fields const char (PR #179970)   Steffen Larsen via llvm-commits
• [llvm] Fold fneg through FP16_TO_FP and FP_TO_FP16 in getNegatedExpression. (PR #178865)   via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [NFCI][RTTI][Passes] Make the ID fields const char (PR #179970)   via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Sander de Smalen via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Sander de Smalen via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Sander de Smalen via llvm-commits
• [llvm] [SelectionDAG] Add expansion for llvm.modf intrinsic (PR #179434)   Matt Arsenault via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   John Brawn via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   John Brawn via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   John Brawn via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   John Brawn via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   John Brawn via llvm-commits
• [llvm] [LAA][LV]Allow recognition of strided pointers with constant stride (PR #171151)   John Brawn via llvm-commits
• [llvm] [MIR][MachineInstr] Update MachineInstr::eraseFromParent() to return an iterator (PR #179787)   Matt Arsenault via llvm-commits
• [llvm] 63918f5 - [RISCV] Fold vmerge into op with undef passthru by using vmerge's vl (#179862)   via llvm-commits
• [llvm] [RISCV] Fold vmerge into op with undef passthru by using vmerge's vl (PR #179862)   Luke Lau via llvm-commits
• [llvm] AMDGPU: Add more tests for v_dot2_f32_f16/bf16 (PR #179223)   Matt Arsenault via llvm-commits
• [llvm] 2dcd75e - [AMDGPU] Fix missing waitcnt after buffer_wbl2 (#178316)   via llvm-commits
• [llvm] [AMDGPU] Fix missing waitcnt after buffer_wbl2 (PR #178316)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [AMDGPU] Fix lowering of canonicalize when amdgpu-ieee is disabled (PR #175867)   Matt Arsenault via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Alexandros Lamprineas via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   David Zbarsky via llvm-commits
• [llvm] [AMDGPU] Fix lowering of canonicalize when amdgpu-ieee is disabled (PR #175867)   Matt Arsenault via llvm-commits
• [llvm] [Analysis] Track offsets in PtrUseVisitor to revisit when required (PR #179726)   Nikita Popov via llvm-commits
• [llvm] [LV] Vectorize early exit loops with stores using masking (PR #178454)   Graham Hunter via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   via llvm-commits
• [llvm] [AMDGPU] Fix VGPR to SGPR copy for inline asm with SGPR constraint (PR #176330)   Vigneshwar Jayakumar via llvm-commits
• [llvm] [MC] Return const FeatureBitset& from MCSubtargetInfo::ToggleFeature/SetFeatureBitsTransitively/ClearFeatureBitsTransitively (PR #179964)   Simon Pilgrim via llvm-commits
• [lldb] [llvm] [lldb] [Process/FreeBSD] Assume minimum is FreeBSD 14 (PR #179587)   David Spickett via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Marcos Maronas via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   via llvm-commits
• [clang] [llvm] Enable fexec-charset option (PR #138895)   Abhina Sree via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   Jay Foad via llvm-commits
• [llvm] [AArch64] Use brk{a, b} for a lane mask from cttz.elts (PR #178674)   Paul Walker via llvm-commits
• [llvm] [BOLT][AArch64] Support FEAT_CMPBR branch instructions. (PR #174972)   Alexandros Lamprineas via llvm-commits
• [llvm] Reland "[NVPTX] Weak cmpxchg unittests for NVPTX" (PR #179829)   via llvm-commits
• [llvm] Reland "[NVPTX] Weak cmpxchg unittests for NVPTX" (PR #179829)   via llvm-commits
• [llvm] Reland "[NVPTX] Weak cmpxchg unittests for NVPTX" (PR #179829)   via llvm-commits
• [llvm] [MC] Return const FeatureBitset& from MCSubtargetInfo::ToggleFeature/SetFeatureBitsTransitively/ClearFeatureBitsTransitively (PR #179964)   Craig Topper via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Dmitry Vyukov via llvm-commits
• [llvm] 722c2f0 - [ExpandIRInsts] Support int bw < float bw in itofp expansion (#179963)   via llvm-commits
• [llvm] [ExpandIRInsts] Support int bw < float bw in itofp expansion (PR #179963)   Nikita Popov via llvm-commits
• [llvm] [RISCV] Relax codegen predicates for HINT-based instructions (PR #179872)   Craig Topper via llvm-commits
• [llvm] [AMDGPU] Fix V_INDIRECT_REG_READ_GPR_IDX expansion with immediate index (PR #179699)   Petr Kurapov via llvm-commits
• [llvm] 37aba1b - [ARM] Set operation action for UMULO and SMULO as Custom if not Thumb1 (#154253)   via llvm-commits
• [llvm] [ARM] Set operation action for UMULO and SMULO as Custom if not Thumb1 (PR #154253)   Eli Friedman via llvm-commits
• [llvm] 94b39b5 - [NFC][CAS][Unittests] Pass env for MultiProcess tests (#179949)   via llvm-commits
• [llvm] [NFC][CAS][Unittests] Pass env for MultiProcess tests (PR #179949)   Jinsong Ji via llvm-commits
• [llvm] Reapply: [lit] Avoid multiprocessing for -j1 runs (PR #179824)   via llvm-commits
• [llvm] [CMake][TableGen] Fix Ninja depslog error with implicit outputs on Ninja <1.10 (PR #179842)   Yanzuo Liu via llvm-commits
• [lldb] [llvm] [lldb] Remove mips64 support for FreeBSD (PR #179582)   Ed Maste via llvm-commits
• [llvm] Reapply: [lit] Avoid multiprocessing for -j1 runs (PR #179824)   via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Alon Zakai via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   David Sherwood via llvm-commits
• [llvm] Reapply: [lit] Avoid multiprocessing for -j1 runs (PR #179824)   via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   David Sherwood via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   via llvm-commits
• [llvm] Fix Bazel build for 823e3e0 (PR #179980)   Aiden Grossman via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   David Zbarsky via llvm-commits
• [clang] [llvm] [Offloading] Offload Binary Format V2: Support Multiple Entries (PR #169425)   LLVM Continuous Integration via llvm-commits
• [llvm] Fix Bazel build for 823e3e0 (PR #179980)   Aiden Grossman via llvm-commits
• [llvm] Fix Bazel build for 823e3e0 (PR #179980)   via llvm-commits
• [clang] [llvm] [Offloading] Offload Binary Format V2: Support Multiple Entries (PR #169425)   LLVM Continuous Integration via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Craig Topper via llvm-commits
• [llvm] [CodeGen] Make use of TargetRegisterInfo::findCommonRegClass. NFC. (PR #179981)   Jay Foad via llvm-commits
• [llvm] [CodeGen] Make use of TargetRegisterInfo::findCommonRegClass. NFC. (PR #179981)   Jay Foad via llvm-commits
• [clang] [llvm] [Offloading] Offload Binary Format V2: Support Multiple Entries (PR #169425)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Vlad Serebrennikov via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand definitions (PR #179732)   Lei Huang via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand definitions (PR #179732)   Lei Huang via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Craig Topper via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Craig Topper via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Craig Topper via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix D16 buffer load RegBankLegalize rules (PR #179982)   via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix D16 buffer load RegBankLegalize rules (PR #179982)   via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand definitions (PR #179983)   Lei Huang via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix D16 buffer load RegBankLegalize rules (PR #179982)   via llvm-commits
• [llvm] [NewPM] Port x86-indirect-thunks (PR #179984)   Kyungtak Woo via llvm-commits
• [llvm] [NewPM] Port x86-indirect-thunks (PR #179984)   Kyungtak Woo via llvm-commits
• [llvm] [PowerPC] Refactor immediate operand definitions (PR #179983)   Lei Huang via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add buffer load format D16 RegBankLegalize rules (PR #179566)   via llvm-commits
• [llvm] [NewPM] Port x86-indirect-thunks (PR #179984)   via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Craig Topper via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] [SPIRV] Optimize getAllocatedType calls in LegalizeZeroSizeArrays (PR #179068)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Optimize getAllocatedType calls in LegalizeZeroSizeArrays (PR #179068)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Optimize getAllocatedType calls in LegalizeZeroSizeArrays (PR #179068)   Nick Sarnie via llvm-commits
• [llvm] [Analysis] Track offsets in PtrUseVisitor to revisit when required (PR #179726)   Jameson Nash via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] [SimplifyCFG][PGO] Add missing overflow check to ConstantFoldTerminator (PR #178964)   Paul Kirth via llvm-commits
• [llvm] [X86] mayFoldIntoVector - ensure we check for custom lowering to logic/add/sub ops (PR #179988)   Simon Pilgrim via llvm-commits
• [llvm] [X86] mayFoldIntoVector - ensure we check for custom lowering to logic/add/sub ops (PR #179988)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #179304)   Justin Fargnoli via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #179304)   Justin Fargnoli via llvm-commits
• [llvm] [NFC] Fix darwin failures due to missing headers (PR #179989)   Jinsong Ji via llvm-commits
• [llvm] [ASan] Don't mark alloca as safe if address escapes to callee (PR #178591)   via llvm-commits
• [llvm] Reapply: [lit] Avoid multiprocessing for -j1 runs (PR #179824)   via llvm-commits
• [flang] [libc] [lldb] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [NFC] Fix darwin failures due to missing headers (PR #179989)   Steven Wu via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [NFCI][RTTI][Passes] Make the ID fields const char (PR #179970)   via llvm-commits
• [llvm] [NewPM] Port x86-indirect-thunks (PR #179984)   via llvm-commits
• [llvm] [NewPM] Port x86-indirect-thunks (PR #179984)   via llvm-commits
• [llvm] [SimplifyCFG][PGO] Add missing overflow check to ConstantFoldTerminator (PR #178964)   Paul Kirth via llvm-commits
• [llvm] [NFC] Fix darwin failures due to missing headers (PR #179989)   Jinsong Ji via llvm-commits
• [llvm] [NFC] Fix darwin failures due to missing headers (PR #179989)   Jinsong Ji via llvm-commits
• [llvm] [NewPM] Port x86-indirect-thunks (PR #179984)   Kyungtak Woo via llvm-commits
• [llvm] workflows: Use main-branch-only environment when using ISSUE_SUBSCRIBER_TOKEN (PR #179990)   Tom Stellard via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] workflows: Use main-branch-only environment when using ISSUE_SUBSCRIBER_TOKEN (PR #179990)   via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] [SPIRV] Implement lowering for HLSL Texture2D sampling intrinsics (PR #179312)   Steven Perron via llvm-commits
• [llvm] [GISel] computeKnownBits - add CTLS handling (PR #178063)   Gergo Stomfai via llvm-commits
• [clang] [llvm] [Offloading] Offload Binary Format V2: Support Multiple Entries (PR #169425)   Nick Sarnie via llvm-commits
• [llvm] [llvm][.gitignore] macOS case-sensitive update (PR #177971)   Eric Christopher via llvm-commits
• [llvm] [SPIRV] Implement lowering for HLSL Texture2D sampling intrinsics (PR #179312)   via llvm-commits
• [llvm] [Hexagon] Add post-RA live variables analysis (PR #179531)   Fateme Hosseini via llvm-commits
• [llvm] 77034cd - [CodeGen] Make use of TargetRegisterInfo::findCommonRegClass. NFC. (#179981)   via llvm-commits
• [llvm] [CodeGen] Make use of TargetRegisterInfo::findCommonRegClass. NFC. (PR #179981)   Jay Foad via llvm-commits
• [llvm] [GlobalISel] Add SVE support for alloca (PR #178976)   David Green via llvm-commits
• [llvm] [WIP] SPV_KHR_non_semantic_info (PR #179975)   Manuel Carrasco via llvm-commits
• [lld] [lld][BP] Fix nondeterministic function order by using std::map (PR #179841)   Ellis Hoag via llvm-commits
• [flang] [llvm] [mlir] [openmp] [MLIR][OpenMP] Add omp.fuse operation (PR #168898)   Ferran Toda via llvm-commits
• [flang] [llvm] [mlir] [openmp] [MLIR][OpenMP] Add omp.fuse operation (PR #168898)   Ferran Toda via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   Julian Pokrovsky via llvm-commits
• [lld] [lld][BP] Fix nondeterministic function order by using std::map (PR #179841)   Ellis Hoag via llvm-commits
• [llvm] [AArch64][GISel] length aware BITCAST between different-element-width fixed vectors (PR #179123)   Shakil Ahmed via llvm-commits
• [lld] [lld][BP] Fix nondeterministic function order by using std::map (PR #179841)   Ellis Hoag via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] 3b16468 - [AMDGPU] Global and Buffer loads to LDS should not increase `lgkmcnt` (#179305)   via llvm-commits
• [llvm] [AMDGPU] Global and Buffer loads to LDS should not increase `lgkmcnt` (PR #179305)   Lei Zhang via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Extend condition optimizer to support unsigned comparisons (PR #144380)   via llvm-commits
• [llvm] [AMDGPU] Support v_lshl_add_u64 with non-constant shift amount (PR #179904)   Frederik Harwath via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [llvm] [NFC][CAS][Unittests] Pass env for MultiProcess tests (PR #179949)   via llvm-commits
• [llvm] 00ba2ef - [NFC] Fix darwin failures due to missing headers (#179989)   via llvm-commits
• [llvm] [NFC] Fix darwin failures due to missing headers (PR #179989)   Jinsong Ji via llvm-commits
• [llvm] [InstCombine] Fold min/max(fpext x, C) to fpext(min/max(x, fptrunc C)) (PR #179968)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold min/max(fpext x, C) to fpext(min/max(x, fptrunc C)) (PR #179968)   Nikita Popov via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [llvm] [InstCombine] Fold min/max(fpext x, C) to fpext(min/max(x, fptrunc C)) (PR #179968)   via llvm-commits
• [llvm] c662f11 - [X86] mayFoldIntoVector - ensure we check for custom lowering to logic/add/sub ops (#179988)   via llvm-commits
• [llvm] [X86] mayFoldIntoVector - ensure we check for custom lowering to logic/add/sub ops (PR #179988)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] ca93dd3 - Reland "[NVPTX] Validate user-specified PTX version against SM version" (#179304)   via llvm-commits
• [llvm] [AMDGPU] Support v_lshl_add_u64 with non-constant shift amount (PR #179904)   Frederik Harwath via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #179304)   Justin Fargnoli via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] [AArch64][ISel] Lower fixed-width i64 vector CLMUL intrinsics (PR #178876)   David Green via llvm-commits
• [llvm] [AArch64][ISel] Lower fixed-width i64 vector CLMUL intrinsics (PR #178876)   David Green via llvm-commits
• [llvm] [AArch64][ISel] Lower fixed-width i64 vector CLMUL intrinsics (PR #178876)   David Green via llvm-commits
• [llvm] [AArch64][ISel] Lower fixed-width i64 vector CLMUL intrinsics (PR #178876)   David Green via llvm-commits
• [llvm] [AArch64][ISel] Lower fixed-width i64 vector CLMUL intrinsics (PR #178876)   David Green via llvm-commits
• [llvm] [AArch64][ISel] Lower fixed-width i64 vector CLMUL intrinsics (PR #178876)   David Green via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix buffer store RegBankLegalize rules (PR #179994)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Fix buffer store RegBankLegalize rules (PR #179994)   via llvm-commits
• [llvm] [DebugInfo] Add macro tracking support to DebugInfoFinder (PR #179931)   Manuel Carrasco via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize rules for buffer store variants (PR #178488)   via llvm-commits
• [llvm] [DebugInfo] Add macro tracking support to DebugInfoFinder (PR #179931)   Manuel Carrasco via llvm-commits
• [llvm] [DebugInfo] Add macro tracking support to DebugInfoFinder (PR #179931)   Manuel Carrasco via llvm-commits
• [llvm] [DebugInfo] Add macro tracking support to DebugInfoFinder (PR #179931)   Manuel Carrasco via llvm-commits
• [llvm] [DebugInfo] Add macro tracking support to DebugInfoFinder (PR #179931)   Manuel Carrasco via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Matheus Izvekov via llvm-commits
• [compiler-rt] [llvm] [Profile] Enable binary profile correlation for Mach-O binaries (PR #179937)   Ellis Hoag via llvm-commits
• [compiler-rt] [llvm] [Profile] Enable binary profile correlation for Mach-O binaries (PR #179937)   Ellis Hoag via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Ramkumar Ramachandra via llvm-commits
• [llvm] [DebugInfo] Add macro tracking support to DebugInfoFinder (PR #179931)   Manuel Carrasco via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16fmaf128 to Header Only (PR #177850)   LLVM Continuous Integration via llvm-commits
• [llvm] update cvt_pk_fp8_fp32 pattern (PR #179995)   Brox Chen via llvm-commits
• [llvm] [AArch64] Add FeatureUseFixedOverScalableIfEqualCost to Neoverse-V3 and Neoverse-V3ae (PR #179903)   David Green via llvm-commits
• [llvm] 8f484ff - [AArch64] Add FeatureUseFixedOverScalableIfEqualCost to Neoverse-V3 and Neoverse-V3ae (#179903)   via llvm-commits
• [llvm] [AArch64] Add FeatureUseFixedOverScalableIfEqualCost to Neoverse-V3 and Neoverse-V3ae (PR #179903)   David Green via llvm-commits
• [llvm] 6377c86 - Revert "[SLP]Remove LoadCombine workaround after handling of the copyables"   Alexey Bataev via llvm-commits
• [llvm] [AArch64][GISel] length aware BITCAST between different-element-width fixed vectors (PR #179123)   Shakil Ahmed via llvm-commits
• [llvm] [mlir] [clang-tidy] pro-type-vararg: Allow type-generic builtins in variadic functions #179845 (PR #179896)   Saksham Singhal via llvm-commits
• [llvm] [AArch64][GISel] length aware BITCAST between different-element-width fixed vectors (PR #179123)   Shakil Ahmed via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix D16 buffer load RegBankLegalize rules (PR #179982)   Petar Avramovic via llvm-commits
• [llvm] [AArch64][ISel] Lower fixed-width i64 vector CLMUL intrinsics (PR #178876)   David Green via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Enable strict mode in divsf3/mulsf3 tests (PR #179918)   Saleem Abdulrasool via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Enable strict mode in divsf3/mulsf3 tests (PR #179918)   Saleem Abdulrasool via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Enable strict mode in divsf3/mulsf3 tests (PR #179918)   Saleem Abdulrasool via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Enable strict mode in divsf3/mulsf3 tests (PR #179918)   Saleem Abdulrasool via llvm-commits
• [lldb] [llvm] [lldb] [Process/FreeBSD] Assume minimum is FreeBSD 14 (PR #179587)   David Spickett via llvm-commits
• [llvm] Add XCOFF object file support in sanitizer coverage tool (PR #179884)   via llvm-commits
• [llvm] [AArch64][GISel] length aware BITCAST between different-element-width fixed vectors (PR #179123)   Shakil Ahmed via llvm-commits
• [clang] [llvm] [Offloading] Offload Binary Format V2: Support Multiple Entries (PR #169425)   Yury Plyakhin via llvm-commits
• [llvm] [MIR][MachineInstr] Update MachineInstr::eraseFromParent() to return an iterator (PR #179787)   via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [llvm][ADT] Mark scope_exit contructors [[nodiscard]] (PR #179720)   Jakub Kuderski via llvm-commits
• [llvm] [SimplifyCFG][PGO] Add missing overflow check to ConstantFoldTerminator (PR #178964)   Mitchel Dickerson via llvm-commits
• [llvm] [cross-project-tests][formatters] Add a LIT feature that tests for a compatible LLDB version (PR #174812)   David Stenberg via llvm-commits
• [llvm] [llvm] Update policy for Doxygen comments in the Coding Standards (PR #179898)   Jakub Kuderski via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Andrei Elovikov via llvm-commits
• [llvm] [llvm] Update policy for Doxygen comments in the Coding Standards (PR #179898)   Jakub Kuderski via llvm-commits
• [llvm] [ARM] Use REG_SEQUENCE instead of SUBREG_TO_REG for crypto patterns. NFCI. (PR #179910)   Eli Friedman via llvm-commits
• [llvm] [SimplifyCFG][PGO] Add missing overflow check to ConstantFoldTerminator (PR #178964)   Mitchel Dickerson via llvm-commits
• [llvm] [RISCV] Lower disjoint shuffle of shuffles to MERGE-GATHER sequence (PR #178095)   Ryan Buchner via llvm-commits
• [llvm] [RISCV] Lower disjoint shuffle of shuffles to MERGE-GATHER sequence (PR #178095)   Ryan Buchner via llvm-commits
• [llvm] [InstCombine] Fix profile metadata propagation in takeLog2 (PR #179331)   Alan Zhao via llvm-commits
• [llvm] [SampleFDO] Check pseudo probe descriptors for unused profile in stale profile matching (PR #179997)   Wei Wang via llvm-commits
• [llvm] [SampleFDO] Check pseudo probe descriptors for unused profile in stale profile matching (PR #179997)   Wei Wang via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [NFCI][RTTI][Passes] Make the ID fields const char (PR #179970)   Jakub Kuderski via llvm-commits
• [llvm] [SampleFDO] Check pseudo probe descriptors for unused profile in stale profile matching (PR #179997)   via llvm-commits
• [llvm] [SampleFDO] Check pseudo probe descriptors for unused profile in stale profile matching (PR #179997)   via llvm-commits
• [llvm] [LoopPeel] Peel last iteration to enable load widening (PR #173420)   Guy David via llvm-commits
• [llvm] [AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (PR #179909)   Paul Walker via llvm-commits
• [llvm] [offload] Fix DeviceImage to handle OffloadBinary::create returning vector (PR #180003)   Joseph Huber via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize rules for TFE buffer loads (PR #179529)   via llvm-commits
• [llvm] f4441cb - [gn build] Port e59e9fcd38a9   LLVM GN Syncbot via llvm-commits
• [llvm] 13c9276 - [AIX] fix aix-ifunc-toc-restore-query-neg.ll (#153049)   Wael Yehia via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   via llvm-commits
• [clang] [compiler-rt] [llvm] [AIX] Implement the ifunc attribute. (PR #153049)   Wael Yehia via llvm-commits
• [llvm] [llvm][ADT] Mark the whole scope_exit class [[nodiscard]] instead (PR #180008)   Balázs Benics via llvm-commits
• [llvm] [llvm][ADT] Mark the whole scope_exit class [[nodiscard]] instead (PR #180008)   via llvm-commits
• [llvm] [ARM] Custom Lowering for SADDO_CARRY and SSUBO_CARRY (PR #154419)   via llvm-commits
• [llvm] [AMDGPU][SIINsertWaitcnts][NFC] Make TTI and ST references (PR #180017)   via llvm-commits
• [lld] [RFC][lld][SPIRV] Add support for SPIR-V LTO (PR #178749)   Nick Sarnie via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Make a few WaitcntBracket member functions private (PR #180018)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Make a few WaitcntBracket member functions private (PR #180018)   via llvm-commits
• [llvm] [offload] Fix DeviceImage to handle OffloadBinary::create returning vector (PR #180003)   Yury Plyakhin via llvm-commits
• [lld] [lld][MachO] Handle compact unwind entries with no matching symbol (PR #180009)   Ellis Hoag via llvm-commits
• [lld] [lld][MachO] Handle compact unwind entries with no matching symbol (PR #180009)   Ellis Hoag via llvm-commits
• [lld] [lld][MachO] Handle compact unwind entries with no matching symbol (PR #180009)   Ellis Hoag via llvm-commits
• [lld] [lld][MachO] Handle compact unwind entries with no matching symbol (PR #180009)   Ellis Hoag via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add RegBankLegalize rules for TFE buffer loads (PR #179529)   via llvm-commits
• [llvm] [Object][Offload] Fix OffloadBinary::create to explicitly move return value (PR #180011)   Yury Plyakhin via llvm-commits
• [llvm] [NVPTX][Inliner] Increase inlining threshold multipler from 11 to 29 (PR #180015)   Justin Fargnoli via llvm-commits
• [llvm] [Object][Offload] Fix OffloadBinary::create to explicitly move return value (PR #180011)   Joseph Huber via llvm-commits
• [llvm] [X86] Fold shift into GF2P8AFFINEQB instruction (PR #180019)   Abhiram Jampani via llvm-commits
• [llvm] [AMDGPU] Teach SIPreEmitPeephole pass to preserve MachineLoopInfo (PR #178868)   Matt Arsenault via llvm-commits
• [llvm] [X86] Fold shift into GF2P8AFFINEQB instruction (PR #180019)   via llvm-commits
• [llvm] [Object][Offload] Fix OffloadBinary::create to explicitly move return value (PR #180011)   Yury Plyakhin via llvm-commits
• [llvm] [AMDGPU] [GlobalISel] Add register bank legalize rules for G_FEXP2 (PR #179954)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] Fold shift into GF2P8AFFINEQB instruction (PR #180019)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16fmaf to Header Only. (PR #178851)   Muhammad Bassiouni via llvm-commits
• [llvm] [AMDGPU] Teach SIPreEmitPeephole pass to preserve MachineLoopInfo (PR #178868)   Matt Arsenault via llvm-commits
• [clang] [llvm] [HLSL] Implement Sample* methods for Texture2D (PR #179322)   Steven Perron via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16fmaf to Header Only. (PR #178851)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor f16fmaf to Header Only. (PR #178851)   via llvm-commits
• [llvm] [NVPTX][Inliner] Increase inlining threshold multipler from 11 to 29 (PR #180015)   Justin Fargnoli via llvm-commits
• [clang] [llvm] [HLSL] Implement Sample* methods for Texture2D (PR #179322)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL] Implement Sample* methods for Texture2D (PR #179322)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL] Implement Sample* methods for Texture2D (PR #179322)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL] Implement Sample* methods for Texture2D (PR #179322)   Steven Perron via llvm-commits
• [llvm] [AMDGPU][SIINsertWaitcnts][NFC] Make TTI and ST references (PR #180017)   Matt Arsenault via llvm-commits
• [llvm] [ARM] Custom Lowering for SADDO_CARRY and SSUBO_CARRY (PR #154419)   via llvm-commits
• [clang] [llvm] [HLSL] Implement Sample* methods for Texture2D (PR #179322)   Steven Perron via llvm-commits
• [clang] [llvm] [HLSL] Implement Sample* methods for Texture2D (PR #179322)   Steven Perron via llvm-commits
• [llvm] Reland "[NVPTX] Weak cmpxchg unittests for NVPTX" (PR #179829)   via llvm-commits
• [clang] [llvm] [HLSL] Implement Sample* methods for Texture2D (PR #179322)   Steven Perron via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Nick Sarnie via llvm-commits
• [llvm] [X86] Fold shift into GF2P8AFFINEQB instruction (PR #180019)   Abhiram Jampani via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #179304)   Artem Belevich via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Yingwei Zheng via llvm-commits
• [llvm] 9ea2861 - [MC] Return const FeatureBitset& from MCSubtargetInfo::ToggleFeature/SetFeatureBitsTransitively/ClearFeatureBitsTransitively (#179964)   via llvm-commits
• [llvm] [MC] Return const FeatureBitset& from MCSubtargetInfo::ToggleFeature/SetFeatureBitsTransitively/ClearFeatureBitsTransitively (PR #179964)   Craig Topper via llvm-commits
• [llvm] [Offload][lit] Link against SPIR-V DeviceRTL if present (PR #180030)   Nick Sarnie via llvm-commits
• [llvm] [Offload][lit] Link against SPIR-V DeviceRTL if present (PR #180030)   Nick Sarnie via llvm-commits
• [llvm] [AMDGPU] Allow hoisting of V_READFIRSTLANE_B32 for uniform operand (PR #178312)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [openmp] [Offload][lit] Link against SPIR-V DeviceRTL if present (PR #180030)   Nick Sarnie via llvm-commits
• [llvm] [Offload][lit] Link against SPIR-V DeviceRTL if present (PR #180030)   Nick Sarnie via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #179304)   Joseph Huber via llvm-commits
• [llvm] [Offload][lit] Link against SPIR-V DeviceRTL if present (PR #180030)   Nick Sarnie via llvm-commits
• [llvm] [BasicAA][TLI] Treat local-linkage globals or known environments as not aliasing errno (PR #170290)   Matt Arsenault via llvm-commits
• [llvm] [BasicAA][TLI] Treat local-linkage globals or known environments as not aliasing errno (PR #170290)   Matt Arsenault via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Yingwei Zheng via llvm-commits
• [llvm] Fix LLDB data formatter for llvm::Expected<T> with non-reference types (PR #179294)   Michael Buch via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Florian Hahn via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Florian Hahn via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Florian Hahn via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Improving multi memory operands after 3e1e86ef (PR #180027)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] Improving multi memory operands after 3e1e86ef (PR #180027)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] Improving multi memory operands after 3e1e86ef (PR #180027)   Nicolai Hähnle via llvm-commits
• [llvm] [AMDGPU] Improving multi memory operands after 3e1e86ef (PR #180027)   Nicolai Hähnle via llvm-commits
• [llvm] [LV] Use speculative load intrinsics for early-exit vectorization (PR #180039)   Florian Hahn via llvm-commits
• [llvm] [LV] Use speculative load intrinsics for early-exit vectorization (PR #180039)   via llvm-commits
• [llvm] e524ee5 - [VPlan] Auto-generate some VPlan check lines.   Florian Hahn via llvm-commits
• [llvm] [VectorCombine] Fold (icmp eq/ne (reduce.add X), 0) to reduce.umax (PR #180001)   Valeriy Savchenko via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Paul Kirth via llvm-commits
• [lld] [lld][MachO] Handle compact unwind entries with no matching symbol (PR #180009)   via llvm-commits
• [llvm] 30986dc - [LV] Regen a VPlan-printing test with UTC (#179948)   via llvm-commits
• [llvm] [LV] Regen a VPlan-printing test with UTC (PR #179948)   Ramkumar Ramachandra via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   via llvm-commits
• [lld] [lld][MachO] Handle compact unwind entries with no matching symbol (PR #180009)   via llvm-commits
• [llvm] [Hexagon] Support partial reduction intrinsics (PR #179797)   Alexey Karyakin via llvm-commits
• [llvm] [TwoAddressInstruction] Iterate through tied regs when analyzing revcopy (PR #179940)   Craig Topper via llvm-commits
• [llvm] [TwoAddressInstruction] Iterate through tied regs when analyzing revcopy (PR #179940)   Craig Topper via llvm-commits
• [llvm] [TwoAddressInstruction] Iterate through tied regs when analyzing revcopy (PR #179940)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove P from RISCVISD::PASUB(U)/PMULHSU/PMULHR(U)/PMULHRSU. NFC (PR #180064)   Craig Topper via llvm-commits
• [clang] [llvm] [HLSL] Reintroduce dx.disable_optimizations to set DisableOptimization Shader Flag (PR #180069)   via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   via llvm-commits
• [clang] [llvm] [HLSL] Reintroduce dx.disable_optimizations to set DisableOptimization Shader Flag (PR #180069)   via llvm-commits
• [llvm] [Tablegen] Don't emit decoder tables with islands larger than 64 bits (PR #179651)   Sam Elliott via llvm-commits
• [llvm] [RISCV] Remove P from RISCVISD::PASUB(U)/PMULHSU/PMULHR(U)/PMULHRSU. NFC (PR #180064)   Sam Elliott via llvm-commits
• [llvm] sketch idea of getConstantBuildVector (PR #180074)   via llvm-commits
• [llvm] [NVPTX] Remove `NoSignedZerosFPMath` uses (PR #180086)   via llvm-commits
• [llvm] [NVPTX] Remove `NoSignedZerosFPMath` uses (PR #180086)   via llvm-commits
• [llvm] [msan] Switch 2: Electric Boogaloo (PR #179851)   Vitaly Buka via llvm-commits
• [llvm] [NVPTX] Remove `NoSignedZerosFPMath` uses (PR #180086)   via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 1 - Setup skeleton (PR #178796)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 1 - Setup skeleton (PR #178796)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 1 - Setup skeleton (PR #178796)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 1 - Setup skeleton (PR #178796)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 1 - Setup skeleton (PR #178796)   Derek Schuff via llvm-commits
• [llvm] [msan] Switch 2: Electric Boogaloo (PR #179851)   Thurston Dang via llvm-commits
• [compiler-rt] [asan][AIX] Add vec_malloc and vec_calloc interceptors (PR #175584)   Vitaly Buka via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix D16 buffer load RegBankLegalize rules (PR #179982)   via llvm-commits
• [llvm] 6d53558 - [gn build] Port eb9e98f62e0c   LLVM GN Syncbot via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 1 - Setup skeleton (PR #178796)   Demetrius Kanios via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 1 - Setup skeleton (PR #178796)   Demetrius Kanios via llvm-commits
• [llvm] [SandboxIR] Delete SandboxIR/SandboxVectorizer (PR #166417)   Aiden Grossman via llvm-commits
• [llvm] b8060ef - [gn build] Port d005cb2953bd   LLVM GN Syncbot via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Lleu Yang via llvm-commits
• [llvm] [DebugInfo] Fix an assertion in DWARFTypePrinter (PR #178986)   Ellis Hoag via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Ramkumar Ramachandra via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Lleu Yang via llvm-commits
• [llvm] [RISCV] Add ppair.e and ppaire.w as aliases for pack on RV32 and RV64 respectively (PR #180100)   Sam Elliott via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Lleu Yang via llvm-commits
• [llvm] [msan] Switch switch() from strict handling to (icmp eq)-style handling (PR #179851)   Thurston Dang via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 1 - Setup skeleton (PR #178796)   Demetrius Kanios via llvm-commits
• [llvm] [msan] Switch switch() from strict handling to (icmp eq)-style handling (PR #179851)   Thurston Dang via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Lleu Yang via llvm-commits
• [llvm] [msan] Switch switch() from strict handling to (icmp eq)-style handling (PR #179851)   Florian Mayer via llvm-commits
• [clang] [flang] [llvm] [mlir] [llvm] Remove "no-infs-fp-math" attribute support (PR #180083)   via llvm-commits
• [llvm] 93d92d5 - [LoongArch][NFC] Add tests for vxi1 vector masks used with AND/OR/XOR operations on lasx (#163490)   via llvm-commits
• [llvm] [LoongArch][NFC] Add tests for vxi1 vector masks used with AND/OR/XOR operations on lasx (PR #163490)   Zhaoxin Yang via llvm-commits
• [llvm] [LoongArch] Try to avoid casts around logical vector ops on lasx (PR #163523)   Zhaoxin Yang via llvm-commits
• [llvm] [NVPTX] Remove `NoSignedZerosFPMath` uses (PR #180086)   via llvm-commits
• [llvm] 46423d8 - [RISCV] Fix P-extension instruction names per spec 0.19 (#179961)   via llvm-commits
• [llvm] [RISCV] Fix P-extension instruction names per spec 0.19 (PR #179961)   Kito Cheng via llvm-commits
• [llvm] 2a0b935 - [CMake][TableGen] Fix Ninja depslog error with implicit outputs on Ninja <1.10 (#179842)   via llvm-commits
• [llvm] [VPlan] Introduce m_c_LogicalAnd, simplify x && true -> x (PR #180048)   Luke Lau via llvm-commits
• [llvm] [PowerPC] Remove `NoSignedZerosFPMath` uses (PR #180087)   via llvm-commits
• [llvm] [NewPM] Port x86-cleanup-local-dynamic-tls (PR #179864)   LLVM Continuous Integration via llvm-commits
• [llvm] [PowerPC] Remove `NoSignedZerosFPMath` uses (PR #180087)   via llvm-commits
• [llvm] [SandboxIR] Delete SandboxIR/SandboxVectorizer (PR #166417)   via llvm-commits
• [llvm] [PowerPC] Remove `NoSignedZerosFPMath` uses (PR #180087)   via llvm-commits
• [llvm] simplifyBinaryIntrinsic: Return nan if snan is passed to maxnum/minnum (PR #180105)   via llvm-commits
• [llvm] simplifyBinaryIntrinsic: Return nan if snan is passed to maxnum/minnum (PR #180105)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [llvm] Remove "no-infs-fp-math" attribute support (PR #180083)   via llvm-commits
• [llvm] [NVPTX] Remove `NoSignedZerosFPMath` uses (PR #180086)   via llvm-commits
• [llvm] [NVPTX] Remove `NoSignedZerosFPMath` uses (PR #180086)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [llvm] Remove "no-infs-fp-math" attribute support (PR #180083)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [llvm] Remove "no-infs-fp-math" attribute support (PR #180083)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [llvm] Remove "no-infs-fp-math" attribute support (PR #180083)   via llvm-commits
• [llvm] [X86] combineSetCC - attempt to match more complex icmp_eq/ne patterns before falling back to PTEST/PMOVMSKB patterns (PR #180034)   Phoebe Wang via llvm-commits
• [llvm] [RISCV] Reorder the operands for RISCVISD::PPAIRE_DB. NFC (PR #180111)   Craig Topper via llvm-commits
• [compiler-rt] Change linkage for friendship with modules (PR #166399)   Vitaly Buka via llvm-commits
• [llvm] [RISCV] Reorder the operands for RISCVISD::PPAIRE_DB. NFC (PR #180111)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [llvm] Remove "no-infs-fp-math" attribute support (PR #180083)   Valentin Clement バレンタイン クレメン via llvm-commits
• [compiler-rt] Change linkage for friendship with modules (PR #166399)   Vitaly Buka via llvm-commits
• [llvm] [RISCV] Reorder the operands for RISCVISD::PPAIRE_DB. NFC (PR #180111)   Craig Topper via llvm-commits
• [compiler-rt] Change linkage for friendship with modules (PR #166399)   Vitaly Buka via llvm-commits
• [clang] [flang] [llvm] [mlir] [llvm] Remove "no-infs-fp-math" attribute support (PR #180083)   via llvm-commits
• [compiler-rt] Change linkage for friendship with modules (PR #166399)   Vitaly Buka via llvm-commits
• [llvm] [RISCV] Reorder the operands for RISCVISD::PPAIRE_DB. NFC (PR #180111)   Sam Elliott via llvm-commits
• [compiler-rt] [ubsan][test] Skip Misc/Posix/static-link.cpp on Solaris (PR #175464)   Vitaly Buka via llvm-commits
• [compiler-rt] 5c2b510 - [ubsan][test] Skip Misc/Posix/static-link.cpp on Solaris (#175464)   via llvm-commits
• [compiler-rt] [ubsan][test] Skip Misc/Posix/static-link.cpp on Solaris (PR #175464)   Vitaly Buka via llvm-commits
• [lld] [llvm] [LIT][LLD] Fix Windows test failures due to path separator mismatches (PR #179865)   Junji Watanabe via llvm-commits
• [llvm] [msan] Handle NEON bfmmla (PR #176264)   Vitaly Buka via llvm-commits
• [llvm] [msan][NFCI] Add NEON vector compare tests (PR #177261)   Vitaly Buka via llvm-commits
• [lld] [llvm] [LIT][LLD] Fix Windows test failures due to path separator mismatches (PR #179865)   Junji Watanabe via llvm-commits
• [llvm] f997919 - [msan][NFCI] Add NEON vector compare tests (#177261)   via llvm-commits
• [llvm] [msan][NFCI] Add NEON vector compare tests (PR #177261)   Thurston Dang via llvm-commits
• [llvm] [msan] Handle NEON bfmmla (PR #176264)   Thurston Dang via llvm-commits
• [llvm] [msan][NFCI] Generalize handleAVX512VectorGenericMaskedFP (PR #179850)   Vitaly Buka via llvm-commits
• [llvm] [NVPTX] Scalarize v2f32 instructions if input operand guarantees need for register coalescing (PR #180113)   via llvm-commits
• [llvm] [NVPTX] Scalarize v2f32 instructions if input operand guarantees need for register coalescing (PR #180113)   via llvm-commits
• [llvm] [msan][NFCI] Refactor icmp eq/ne into propagateEqualityComparison() (PR #180115)   Thurston Dang via llvm-commits
• [llvm] [msan] Switch switch() from strict handling to (icmp eq)-style handling (PR #179851)   Thurston Dang via llvm-commits
• [llvm] [msan][NFCI] Refactor icmp eq/ne into propagateEqualityComparison() (PR #180115)   via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #180116)   Justin Fargnoli via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #180116)   via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #180116)   via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #180116)   via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #180116)   via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #180116)   Justin Fargnoli via llvm-commits
• [llvm] [X86] Optimized ADC + ADD to ADC (PR #176713)   Craig Topper via llvm-commits
• [llvm] Precommit test for combine ADC(ADD(X,Y),0,Carry) -> ADC(X,Y,Carry) (PR #177539)   Craig Topper via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #180116)   Justin Fargnoli via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for G_ATOMICRMW_FADD (PR #175257)   Anshil Gandhi via llvm-commits
• [llvm] [NewPM] Port x86-indirect-thunks (PR #179984)   Kyungtak Woo via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #180116)   Joseph Huber via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for G_ATOMICRMW_FADD (PR #175257)   Anshil Gandhi via llvm-commits
• [llvm] [InstCombine][profcheck] Fix profile metadata propagation for umax in InstCombine (PR #179332)   Snehasish Kumar via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for G_ATOMICRMW_FADD (PR #175257)   Anshil Gandhi via llvm-commits
• [llvm] [InstCombine][profcheck] Fix profile metadata propagation for umax in InstCombine (PR #179332)   Snehasish Kumar via llvm-commits
• [llvm] [InstCombine][profcheck] Fix profile metadata propagation for umax in InstCombine (PR #179332)   Snehasish Kumar via llvm-commits
• [llvm] [NewPM] Port x86-global-base-reg (PR #180119)   Kyungtak Woo via llvm-commits
• [llvm] [WIP][Support] Experimental: Always scale InstructionCost::Value (PR #178962)   Ryan Buchner via llvm-commits
• [llvm] 7449d32 - [InstCombine][profcheck] Fix profile metadata propagation for umax in InstCombine (#179332)   via llvm-commits
• [llvm] [InstCombine][profcheck] Fix profile metadata propagation for umax in InstCombine (PR #179332)   Snehasish Kumar via llvm-commits
• [llvm] Fix profcheck failure in Transforms/InstCombine/and2.ll (PR #179741)   Snehasish Kumar via llvm-commits
• [llvm] [msan] Handle NEON floating-point absolute compare greater than/equal (PR #180120)   Thurston Dang via llvm-commits
• [llvm] [NewPM] Port x86-global-base-reg (PR #180119)   via llvm-commits
• [llvm] [msan] Handle NEON floating-point absolute compare greater than/equal (PR #180120)   via llvm-commits
• [llvm] [WIP][Support] Always scale InstructionCost::Value (PR #178962)   Ryan Buchner via llvm-commits
• [llvm] [flang-rt][build] Disable two build-time warning of '-Wuninitialized' from g++ compiler (PR #174918)   liao jun via llvm-commits
• [llvm] [SelectionDAG] This is a follow-up to #179249 after review. (PR #179953)   Mikael Holmen via llvm-commits
• [llvm] [WIP][Support] Always scale InstructionCost::Value (PR #178962)   Ryan Buchner via llvm-commits
• [llvm] [VPlan] Fix comments in simplifyRecipe around BinaryOr (NFC) (PR #180050)   Luke Lau via llvm-commits
• [llvm] Precommit test for combine ADC(ADD(X,Y),0,Carry) -> ADC(X,Y,Carry) (PR #177539)   via llvm-commits
• [llvm] Precommit test for combine ADC(ADD(X,Y),0,Carry) -> ADC(X,Y,Carry) (PR #177539)   via llvm-commits
• [llvm] [LangRef] Correct `uitofp` example (PR #180123)   Aiden Grossman via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Petr Penzin via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [NFCI][RTTI][Passes] Make the ID fields const char (PR #179970)   Steffen Larsen via llvm-commits
• [llvm] [DebugInfo] Fix an assertion in DWARFTypePrinter (PR #178986)   David Blaikie via llvm-commits
• [llvm] [LangRef] Correct `uitofp` example (PR #180123)   via llvm-commits
• [llvm] [InstCombine] Fix miscompilation for `select` + `FCmp` (PR #177872)   Tirthankar Mazumder via llvm-commits
• [llvm] d289020 - [LangRef] Correct `uitofp` example (#180123)   via llvm-commits
• [llvm] [LangRef] Correct `uitofp` example (PR #180123)   via llvm-commits
• [llvm] Precommit test for combine ADC(ADD(X,Y),0,Carry) -> ADC(X,Y,Carry) (PR #177539)   Craig Topper via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 1 - Setup skeleton (PR #178796)   Amara Emerson via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #180116)   via llvm-commits
• [clang] [flang] [llvm] [mlir] Reland "[NVPTX] Validate user-specified PTX version against SM version" (PR #180116)   via llvm-commits
• [llvm] fix(llvm/**.py): fix invalid escape sequences (PR #94035)   Eisuke Kawashima via llvm-commits
• [llvm] [WIP][Support] Always scale InstructionCost::Value (PR #178962)   Ryan Buchner via llvm-commits
• [llvm] [NewPM] Port x86-indirect-branch-tracking (PR #179874)   via llvm-commits
• [llvm] d99f1cd - [RISCV][llvm] Support INSERT_VECTOR_ELT codegen for P extension (#179471)   via llvm-commits
• [llvm] [RISCV][llvm] Support INSERT_VECTOR_ELT codegen for P extension (PR #179471)   Brandon Wu via llvm-commits
• [llvm] [AMDGPU] Add a test to show later optimization (PR #178607)   via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [NFCI][RTTI][Passes] Make the ID fields const char (PR #179970)   Steffen Larsen via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [NFCI][RTTI][Passes] Make the ID fields const char (PR #179970)   Steffen Larsen via llvm-commits
• [llvm] [AMDGPU] Pre-Commit tests for support one immediate folding for global load (PR #178607)   via llvm-commits
• [llvm] [AMDGPU] Pre-Commit tests for support one immediate folding for global load (PR #178607)   via llvm-commits
• [llvm] [AMDGPU] Pre-Commit tests for support one immediate folding for global load (PR #178607)   via llvm-commits
• [llvm] [AMDGPU] Pre-Commit tests for support one immediate folding for global load (PR #178607)   via llvm-commits
• [llvm] [CGData][GMF] Preserve Profile Data (PR #180126)   Kyungwoo Lee via llvm-commits
• [llvm] [RISCV] Add ppair.e and ppaire.w as aliases for pack on RV32 and RV64 respectively (PR #180100)   Brandon Wu via llvm-commits
• [llvm] [CGData][GMF] Preserve Profile Data (PR #180126)   Kyungwoo Lee via llvm-commits
• [llvm] [NVPTX][Inliner] Increase inlining threshold multiplier from 11 to 29 (PR #180015)   Justin Fargnoli via llvm-commits
• [llvm] [AsmParser] Track value references and function arguments (PR #174566)   Mikael Holmen via llvm-commits
• [llvm] [StaticDataLayout] Reconcile string literal hotness from data access profiles and PGO profiles. (PR #178336)   Snehasish Kumar via llvm-commits
• [llvm] [RISCV] Use addd/subd for i64 add/sub for RV32+P. (PR #180129)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use addd/subd for i64 add/sub for RV32+P. (PR #180129)   via llvm-commits
• [llvm] [X86] combineSetCC - attempt to match more complex icmp_eq/ne patterns before falling back to PTEST/PMOVMSKB patterns (PR #180034)   Simon Pilgrim via llvm-commits
• [llvm] [X86] combineSetCC - attempt to match more complex icmp_eq/ne patterns before falling back to PTEST/PMOVMSKB patterns (PR #180034)   Simon Pilgrim via llvm-commits
• [llvm] [SelectionDAG] This is a follow-up to #179249 after review. (PR #179953)   Mikael Holmen via llvm-commits
• [llvm] [SelectionDAG] Use -filetype=null for llc RUN lines in pr142937 (PR #180004)   Mikael Holmen via llvm-commits
• [llvm] [NewPM] Port x86-insert-x87-wait (PR #180128)   Kyungtak Woo via llvm-commits
• [lld] [llvm] [LIT][LLD] Fix Windows test failures due to path separator mismatches (PR #179865)   Martin Storsjö via llvm-commits
• [llvm] [CMake][TableGen] Fix Ninja depslog error with implicit outputs on Ninja <1.10 (PR #179842)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Use addd/subd for i64 add/sub for RV32+P. (PR #180129)   Craig Topper via llvm-commits
• [llvm] [CGData][GMF] Preserve Profile Data (PR #180126)   Kyungwoo Lee via llvm-commits
• [llvm] [RISCV] Use addd/subd for i64 add/sub for RV32+P. (PR #180129)   Craig Topper via llvm-commits
• [llvm] [RISCV] Use addd/subd for i64 add/sub for RV32+P. (PR #180129)   Craig Topper via llvm-commits
• [llvm] [CGData][GMF] Preserve Profile Data (PR #180126)   via llvm-commits
• [llvm] [NewPM] Port x86-insert-x87-wait (PR #180128)   Kyungtak Woo via llvm-commits
• [lld] [llvm] [LIT][LLD] Fix Windows test failures due to path separator mismatches (PR #179865)   Martin Storsjö via llvm-commits
• [llvm] [SelectionDAG] Remove `NoSignedZerosFPMath` in dag combiner (PR #180130)   via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Yevgeny Rouban via llvm-commits
• [llvm] [BasicBlockUtils] Fixed LoopInfo update in UpdateAnalysisInformation() (PR #177147)   Yevgeny Rouban via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [NFCI][RTTI][Passes] Make the ID fields const char (PR #179970)   Steffen Larsen via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 1 - Setup skeleton (PR #178796)   Demetrius Kanios via llvm-commits
• [llvm] [NewPM] Port x86-insert-x87-wait (PR #180128)   Kyungtak Woo via llvm-commits
• [lld] [llvm] [LIT][LLD] Fix Windows test failures due to path separator mismatches (PR #179865)   Martin Storsjö via llvm-commits
• [llvm] [NewPM] Port x86-indirect-branch-tracking (PR #179874)   Kyungtak Woo via llvm-commits
• [llvm] [NewPM] Port x86-indirect-branch-tracking (PR #179874)   Kyungtak Woo via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Demetrius Kanios via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   Julian Pokrovsky via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   Julian Pokrovsky via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   Julian Pokrovsky via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   Julian Pokrovsky via llvm-commits
• [llvm] [llvm-ir2vec] Adding FuncEmb API to ir2vec python bindings (PR #179908)   Nishant Sachdeva via llvm-commits
• [llvm] [msan][NFCI] Refactor icmp eq/ne into propagateEqualityComparison() (PR #180115)   Vitaly Buka via llvm-commits
• [llvm] cc4b98e - [X86] combineSetCC - attempt to match more complex icmp_eq/ne patterns before falling back to PTEST/PMOVMSKB patterns (#180034)   via llvm-commits
• [llvm] [X86] combineSetCC - attempt to match more complex icmp_eq/ne patterns before falling back to PTEST/PMOVMSKB patterns (PR #180034)   Simon Pilgrim via llvm-commits
• [llvm] 7211938 - [msan][NFCI] Refactor icmp eq/ne into propagateEqualityComparison() (#180115)   via llvm-commits
• [llvm] [msan][NFCI] Refactor icmp eq/ne into propagateEqualityComparison() (PR #180115)   Thurston Dang via llvm-commits
• [llvm] [NewPM] Port x86-indirect-branch-tracking (PR #179874)   via llvm-commits
• [llvm] [msan] Switch switch() from strict handling to (icmp eq)-style handling (PR #179851)   Thurston Dang via llvm-commits
• [llvm] [NewPM] Port x86-indirect-branch-tracking (PR #179874)   via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Congcong Cai via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in MacroFusion emitter (PR #180132)   Rahul Joshi via llvm-commits
• [llvm] [SelectionDAG] Remove `NoSignedZerosFPMath` in dag combiner (PR #180130)   via llvm-commits
• [llvm] [RISCV] Add used callee-saved registers as implicit/implicit-def registers to save/restore call (PR #180133)   Jim Lin via llvm-commits
• [llvm] [RISCV] Add used callee-saved registers as implicit/implicit-def registers to save/restore call (PR #180133)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   via llvm-commits
• [llvm] 4092a63 - [NewPM] Port x86-indirect-branch-tracking (#179874)   via llvm-commits
• [llvm] [NewPM] Port x86-indirect-branch-tracking (PR #179874)   via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] Fix Bazel build for d005cb2 (PR #180134)   Anshul Nigham via llvm-commits
• [llvm] [BOLT][BTI] Refactor: move applyBTIFixup under MCPlusBuilder (PR #177164)   Gergely Bálint via llvm-commits
• [lld] 0d52536 - [ELF][test] Consolidate .eh_frame FDE encoding tests   Fangrui Song via llvm-commits
• [llvm] [msan] Handle NEON floating-point absolute compare greater than/equal (PR #180120)   Thurston Dang via llvm-commits
• [llvm] Fix Bazel build for d005cb2 (PR #180134)   Adrian Kuegel via llvm-commits
• [clang] [llvm] [RISCV] Support for Zvabd fast-track proposal (PR #124239)   Pengcheng Wang via llvm-commits
• [llvm] d50cf09 - Precommit test for combine ADC(ADD(X, Y), 0, Carry) -> ADC(X,Y,Carry) (#177539)   via llvm-commits
• [llvm] [llvm-ir2vec] Adding BB Embeddings Map API to ir2vec python bindings (PR #180135)   Nishant Sachdeva via llvm-commits
• [llvm] Precommit test for combine ADC(ADD(X,Y),0,Carry) -> ADC(X,Y,Carry) (PR #177539)   via llvm-commits
• [llvm] [llvm-ir2vec] Adding BB Embeddings Map API to ir2vec python bindings (PR #180135)   via llvm-commits
• [llvm] [DAGCombiner] Fix exact power-of-two signed division for large integers (PR #177340)   Steffen Larsen via llvm-commits
• [llvm] [llvm-ir2vec] Adding BB Embeddings Map API to ir2vec python bindings (PR #180135)   via llvm-commits
• [llvm] Fix Bazel build for ba58225 (PR #180136)   Tomás Longeri via llvm-commits
• [llvm] Fix Bazel build for ba58225 (PR #180136)   Tomás Longeri via llvm-commits
• [llvm] [MC][COFF] Associate pseudo probe desc section with its function (PR #177540)   via llvm-commits
• [llvm] [AMDGPU] Support v_lshl_add_u64 with non-constant shift amount (PR #179904)   Frederik Harwath via llvm-commits
• [llvm] a6f0264 - [llvm-ir2vec] Adding FuncEmb API to ir2vec python bindings (#179908)   via llvm-commits
• [llvm] [llvm-ir2vec] Adding FuncEmb API to ir2vec python bindings (PR #179908)   S. VenkataKeerthy via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   YunQiang Su via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for G_ATOMICRMW_FADD (PR #175257)   Anshil Gandhi via llvm-commits
• [llvm] SelectionDAG: Support FMINIMUMNUM and FMINIMUM in combineMinNumMaxNumImpl (PR #137449)   YunQiang Su via llvm-commits
• [llvm] simplifyBinaryIntrinsic: Return nan if snan is passed to maxnum/minnum (PR #180105)   YunQiang Su via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for atomicrmw ops (PR #175257)   Anshil Gandhi via llvm-commits
• [llvm] [VPlan] Ignore poison incoming values when creating blend (PR #180005)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for atomicrmw ops (PR #175257)   Anshil Gandhi via llvm-commits
• [llvm] [VPlan] Ignore poison incoming values when creating blend (PR #180005)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for atomicrmw ops (PR #175257)   Anshil Gandhi via llvm-commits
• [llvm] Fix Bazel build for ba58225 (PR #180136)   Tomás Longeri via llvm-commits
• [llvm] [SimplifyCFG] Optimize select over pointers to eliminate no-op load/store (PR #179277)   via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   Julian Pokrovsky via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   Julian Pokrovsky via llvm-commits
• [llvm] 7bef2cd - [llvm] Update policy for Doxygen comments in the Coding Standards (#179898)   via llvm-commits
• [llvm] [llvm] Update policy for Doxygen comments in the Coding Standards (PR #179898)   Jonas Devlieghere via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   via llvm-commits
• [llvm] Fix Bazel build for ba58225 (PR #180136)   Adrian Kuegel via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zvabd instructions (PR #180139)   Pengcheng Wang via llvm-commits
• [llvm] Fix Bazel build for ba58225 (PR #180136)   Adrian Kuegel via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zvabd instructions (PR #180139)   via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zvabd instructions (PR #180139)   via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Pankaj Dwivedi via llvm-commits
• [clang] [llvm] [RISCV] Support for Zvabd fast-track proposal (PR #124239)   Pengcheng Wang via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Pankaj Dwivedi via llvm-commits
• [llvm] [llvm-ir2vec] Adding BB Embeddings Map API to ir2vec python bindings (PR #180135)   Nishant Sachdeva via llvm-commits
• [llvm] [X86] Optimized ADC + ADD to ADC (PR #176713)   via llvm-commits
• [llvm] [X86] Add test for VPBLENDW Tuning (PR #179906)   via llvm-commits
• [llvm] [X86] Optimized ADC + ADD to ADC (PR #176713)   via llvm-commits
• [llvm] [X86] Add test for VPBLENDW Tuning (PR #179906)   via llvm-commits
• [llvm] [X86] Add test for VPBLENDW Tuning (PR #179906)   via llvm-commits
• [llvm] [X86] Add test for VPBLENDW Tuning (PR #179906)   via llvm-commits
• [llvm] [llvm-ir2vec] Adding BB Embeddings Map API to ir2vec python bindings (PR #180135)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   via llvm-commits
• [llvm] [SystemZ] Enable rematerialization for scalar loads (PR #179838)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Enable rematerialization for scalar loads (PR #179838)   Ulrich Weigand via llvm-commits
• [llvm] [SystemZ] Enable rematerialization for scalar loads (PR #179838)   Ulrich Weigand via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] [RISCV] Generate landing pad based on cf-protection-branch flag only (PR #179960)   Jesse Huang via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   via llvm-commits
• [llvm] [llvm-ir2vec] Adding BB Embeddings Map API to ir2vec python bindings (PR #180135)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding BB Embeddings Map API to ir2vec python bindings (PR #180135)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding BB Embeddings Map API to ir2vec python bindings (PR #180135)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding BB Embeddings Map API to ir2vec python bindings (PR #180135)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Pankaj Dwivedi via llvm-commits
• [llvm] [MC][COFF] Associate pseudo probe desc section with its function (PR #177540)   Haohai Wen via llvm-commits
• [llvm] [NFC][LowerMemIntrinsics] Use TypeSize consistently for type sizes (PR #179945)   Fabian Ritter via llvm-commits
• [llvm] [MC][COFF] Associate pseudo probe desc section with its function (PR #177540)   Haohai Wen via llvm-commits
• [llvm] Fix Bazel build for d005cb2 (PR #180134)   Adrian Kuegel via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Removed incorrect "DS Store drain" check. (PR #179818)   Pierre van Houtryve via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Nikita Popov via llvm-commits
• [clang] [flang] [llvm] [mlir] [llvm] Remove "no-infs-fp-math" attribute support (PR #180083)   Matt Arsenault via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Pankaj Dwivedi via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in GobalISel emitters (PR #180143)   Rahul Joshi via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Pierre van Houtryve via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Nikita Popov via llvm-commits
• [clang] [llvm] [AMDGPU] Introduce asyncmark/wait intrinsics (PR #173259)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [DA] Introduce domain for monotonicity (PR #176367)   Ryotaro Kasuga via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [llvm] [bazel] Add missing dependency for 61b8a5783972f03d2a5a72713fa0daa095802ce (PR #180145)   Benjamin Kramer via llvm-commits
• [llvm] [bazel] Add missing dependency for 61b8a5783972f03d2a5a72713fa0daa095802ce (PR #180145)   Benjamin Kramer via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [llvm] [bazel] Add missing dependency for 61b8a5783972f03d2a5a72713fa0daa095802ce (PR #180145)   Benjamin Kramer via llvm-commits
• [llvm] [bazel] Add missing dependency for 61b8a5783972f03d2a5a72713fa0daa095802ce (PR #180145)   Benjamin Kramer via llvm-commits
• [llvm] [ARM] Autogenerate checks for crypto intrinsics (PR #180147)   Jay Foad via llvm-commits
• [llvm] [ARM] Autogenerate checks for crypto intrinsics (PR #180147)   via llvm-commits
• [llvm] [lldb][FreeBSD] Add myself to CODEOWNERS (PR #180052)   David Spickett via llvm-commits
• [llvm] [InstCombine] fold `gepi i8 %ptr, (srem x, y)` to `gepi i8 %ptr, (urem x, y)` if `y` is positive power-of-2 (PR #180148)   via llvm-commits
• [llvm] [InstCombine] fold `gepi i8 %ptr, (srem x, y)` to `gepi i8 %ptr, (urem x, y)` if `y` is positive power-of-2 (PR #180148)   via llvm-commits
• [llvm] [ARM] Use REG_SEQUENCE instead of SUBREG_TO_REG for crypto patterns. NFCI. (PR #179910)   Jay Foad via llvm-commits
• [llvm] [ARM] Use REG_SEQUENCE instead of SUBREG_TO_REG for crypto patterns. NFCI. (PR #179910)   Jay Foad via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   Ryotaro Kasuga via llvm-commits
• [llvm] Handle IMPLICIT_DEF in TripleMBB for WindowScheduler (PR #179190)   Ryotaro Kasuga via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [clang] [llvm] [PowerPC][AIX] Support #pragma comment copyright for AIX (PR #178184)   Tony Varghese via llvm-commits
• [llvm] [AMDGPU] Generate waterfall for calls with SGPR(inreg) argument (PR #146997)   via llvm-commits
• [llvm] [SCEVExp] Use SCEVPtrToAddr in tryToReuseLCSSAPhi if possible. (PR #178727)   Florian Hahn via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] [AMDGPU] Support v_lshl_add_u64 with non-constant shift amount (PR #179904)   Frederik Harwath via llvm-commits
• [llvm] [InstCombine] fold `gepi i8 %ptr, (srem x, y)` to `gepi i8 %ptr, (urem x, y)` if `y` is positive power-of-2 (PR #180148)   Nikita Popov via llvm-commits
• [llvm] [NFC][AMDGPU] Remove pass initialization from pass constructors (PR #180149)   Rahul Joshi via llvm-commits
• [llvm] [VPlan] Introduce generic variable-length step support (PR #177114)   Shih-Po Hung via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   David Sherwood via llvm-commits
• [clang] [llvm] [SPIRV][AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [llvm] [SPIRV][AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [AMDGPU] Support v_lshl_add_u64 with non-constant shift amount (PR #179904)   Frederik Harwath via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   David Sherwood via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] [NFC][VPlan] Introduce generic variable-length step support (PR #177114)   Shih-Po Hung via llvm-commits
• [llvm] [NFC][VPlan] Introduce generic variable-length step support (PR #177114)   Shih-Po Hung via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   David Sherwood via llvm-commits
• [llvm] [VectorCombine] Fold (icmp eq/ne (reduce.add X), 0) to reduce.umax (PR #180001)   Valeriy Savchenko via llvm-commits
• [llvm] [OFFLOAD] Fix TARGET_NAME in plugins common code (PR #180151)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Fix TARGET_NAME in plugins common code (PR #180151)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add custom lowering for G_FMODF (PR #180152)   Alex Wang via llvm-commits
• [llvm] [InstCombine] fold `gepi i8 %ptr, (srem x, y)` to `gepi i8 %ptr, (urem x, y)` if `y` is positive power-of-2 (PR #180148)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add custom lowering for G_FMODF (PR #180152)   via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add custom lowering for G_FMODF (PR #180152)   via llvm-commits
• [llvm] [NVPTX] Composable and Extensible Memory Cache Control Hints (PR #175901)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add custom lowering for G_FMODF (PR #180152)   Alex Wang via llvm-commits
• [llvm] [LoopUnrollPass] Indent `LLVM_DEBUG()` messages based on our depth in the `tryToUnrollLoop()` call graph (PR #178945)   Ryotaro Kasuga via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Teach SIPreEmitPeephole pass to preserve MachineLoopInfo (PR #178868)   Dark Steve via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   David Sherwood via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for atomicrmw ops (PR #175257)   Anshil Gandhi via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Jay Foad via llvm-commits
• [llvm] [NewPM] Uninitialize x86-cleanup-local-dynamic-tls in llvm/lib/Target/X86/X86.h (PR #180122)   Simon Pilgrim via llvm-commits
• [llvm] Adding support for G_STRICT_FMA in new reg bank select (PR #170330)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for G_AMDGPU_BUFFER_ATOMIC_FADD (PR #175258)   Anshil Gandhi via llvm-commits
• [llvm] [NewPM] Uninitialize x86-cleanup-local-dynamic-tls in llvm/lib/Target/X86/X86.h (PR #180122)   Simon Pilgrim via llvm-commits
• [llvm] [MIPS] Do not silently ignore musttail (PR #178310)   Djordje Todorovic via llvm-commits
• [llvm] [InstCombine] fold `gepi i8 %ptr, (srem x, y)` to `gepi i8 %ptr, (urem x, y)` if `y` is positive power-of-2 (PR #180148)   via llvm-commits
• [llvm] [NFC][Core][CodeGen] Remove pass initialization from pass constructors (PR #180153)   Rahul Joshi via llvm-commits
• [llvm] [NFC][VPlan] Introduce generic variable-length step support (PR #177114)   Florian Hahn via llvm-commits
• [llvm] [NFC][VPlan] Introduce generic variable-length step support (PR #177114)   Florian Hahn via llvm-commits
• [llvm] [NFC][VPlan] Introduce generic variable-length step support (PR #177114)   Florian Hahn via llvm-commits
• [llvm] [NFC][VPlan] Introduce generic variable-length step support (PR #177114)   Florian Hahn via llvm-commits
• [llvm] [NFC][VPlan] Introduce generic variable-length step support (PR #177114)   Florian Hahn via llvm-commits
• [llvm] [NFC][AMDGPU] Remove pass initialization from pass constructors (PR #180149)   Rahul Joshi via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Mikael Holmen via llvm-commits
• [llvm] [NFC][VPlan] Introduce generic variable-length step support (PR #177114)   Florian Hahn via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   Alex Duran via llvm-commits
• [llvm] [WIP][Support] Always scale InstructionCost::Value (PR #178962)   Florian Hahn via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Mikael Holmen via llvm-commits
• [llvm] [NFC][LLVM][IPO] Remove pass initialization from pass constructors (PR #180154)   Rahul Joshi via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   Alex Duran via llvm-commits
• [llvm] sketch idea of getConstantBuildVector (PR #180074)   via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   Alex Duran via llvm-commits
• [llvm] [VPlan] Fix comments in simplifyRecipe around BinaryOr (NFC) (PR #180050)   Florian Hahn via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Nikita Popov via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Nikita Popov via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Nikita Popov via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   Jay Foad via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   Jay Foad via llvm-commits
• [llvm] [VPlan] Compute predicated load/store costs in VPlan. (NFC) (PR #179129)   Florian Hahn via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] [VPlan] Compute predicated load/store costs in VPlan. (NFC) (PR #179129)   Florian Hahn via llvm-commits
• [llvm] 9d11a66 - AMDGPU/GlobalISel: Regbanklegalize rules for G_FREEZE (#179796)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_FREEZE (PR #179796)   Petar Avramovic via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Pankaj Dwivedi via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   David Sherwood via llvm-commits
• [llvm] [InstCombine] fold `gepi i8 %ptr, (srem x, y)` to `gepi i8 %ptr, (urem x, y)` if `y` is positive power-of-2 (PR #180148)   via llvm-commits
• [llvm] [OFFLOAD] Change debug prefix (PR #180156)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Change debug prefix (PR #180156)   via llvm-commits
• [llvm] [ExpandIRInsts] Freeze input in itofp expansion (PR #180157)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Simplify cond branch if condition is known (PR #180081)   Jay Foad via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Matt Arsenault via llvm-commits
• [llvm] [ExpandIRInsts] Freeze input in itofp expansion (PR #180157)   via llvm-commits
• [llvm] [AArch64][GlobalISel] WIP Remove fallback for scalar fp16 fcvtnu (PR #179693)   Joshua Rodriguez via llvm-commits
• [llvm] [VPlan] Simplify x & AllOnes -> x (PR #180049)   Florian Hahn via llvm-commits
• [llvm] [NFC][LLVM] Remove pass initialization from pass constructors (PR #180158)   Rahul Joshi via llvm-commits
• [llvm] 8cc0642 - Adding support for G_STRICT_FMA in new reg bank select (#170330)   via llvm-commits
• [llvm] Adding support for G_STRICT_FMA in new reg bank select (PR #170330)   Abhinav Garg via llvm-commits
• [llvm] [OFFLOAD] Change debug prefix (PR #180156)   Alex Duran via llvm-commits
• [llvm] [AArch64][GlobalISel] WIP Remove fallback for FPCVT intrinsics with 16-bit operands (PR #179693)   Joshua Rodriguez via llvm-commits
• [llvm] [AArch64][GlobalISel] WIP Remove fallback for FPCVT intrinsics with 16-bit operands (PR #179693)   via llvm-commits
• [llvm] [AArch64][GlobalISel] WIP Remove fallbacks for FPCVT intrinsics with 16-bit operands (PR #179693)   Joshua Rodriguez via llvm-commits
• [llvm] sketch idea of getConstantBuildVector (PR #180074)   via llvm-commits
• [llvm] d64a609 - [NewPM] Uninitialize x86-cleanup-local-dynamic-tls in llvm/lib/Target/X86/X86.h (#180122)   via llvm-commits
• [llvm] [NewPM] Uninitialize x86-cleanup-local-dynamic-tls in llvm/lib/Target/X86/X86.h (PR #180122)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Simplify cond branch if condition is known (PR #180081)   Jay Foad via llvm-commits
• [llvm] [InstCombine] fold `gepi i8 %ptr, (srem x, y)` to `gepi i8 %ptr, (urem x, y)` if `y` is positive power-of-2 (PR #180148)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `gepi i8 %ptr, (srem x, y)` to `gepi i8 %ptr, (urem x, y)` if `y` is positive power-of-2 (PR #180148)   via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Pierre van Houtryve via llvm-commits
• [llvm] [VPlan] Ignore poison incoming values when creating blend (PR #180005)   Florian Hahn via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Pierre van Houtryve via llvm-commits
• [llvm] [InstCombine] fold `gepi i8 %ptr, (srem x, y)` to `gepi i8 %ptr, (urem x, y)` if `y` is positive power-of-2 (PR #180148)   via llvm-commits
• [llvm] [Hexagon] Update maintainers (PR #177935)   Nikita Popov via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Petar Avramovic via llvm-commits
• [llvm] [AMDGPU] Add DPP16 Row Share optimization for llvm.amdgcn.wave.shuffle (PR #177470)   Jay Foad via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Petar Avramovic via llvm-commits
• [llvm] [Hexagon] Update maintainers (PR #177935)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Add DPP16 Row Share optimization for llvm.amdgcn.wave.shuffle (PR #177470)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add DPP16 Row Share optimization for llvm.amdgcn.wave.shuffle (PR #177470)   Jay Foad via llvm-commits
• [llvm] [Tablegen] Don't emit decoder tables with islands larger than 64 bits (PR #179651)   Petr Vesely via llvm-commits
• [llvm] [NFC][VPlan] Introduce generic variable-length step support (PR #177114)   Shih-Po Hung via llvm-commits
• [llvm] [NFC][LLVM] Code cleanup in VNCoercion (PR #180159)   Rahul Joshi via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   Florian Hahn via llvm-commits
• [llvm] [NFC][VPlan] Introduce generic variable-length step support (PR #177114)   via llvm-commits
• [llvm] [AMDGPU] Add DPP16 Row Share optimization for llvm.amdgcn.wave.shuffle (PR #177470)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add DPP16 Row Share optimization for llvm.amdgcn.wave.shuffle (PR #177470)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add DPP16 Row Share optimization for llvm.amdgcn.wave.shuffle (PR #177470)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Add DPP16 Row Share optimization for llvm.amdgcn.wave.shuffle (PR #177470)   Jay Foad via llvm-commits
• [libc] [llvm] [libc][math] Refactor asinpif16 to Header Only (PR #179021)   Julian Pokrovsky via llvm-commits
• [llvm] [NFC][VPlan] Introduce generic variable-length step support (PR #177114)   Shih-Po Hung via llvm-commits
• [llvm] InstCombine: Only propagate callsite attributes in sqrt->sqrtf (PR #180160)   Matt Arsenault via llvm-commits
• [llvm] [NFC][VPlan] Rename VPEVLBasedIVPHIRecipe to VPCurrentIterationPHIRecipe (PR #177114)   Shih-Po Hung via llvm-commits
• [llvm] InstCombine: Only propagate callsite attributes in sqrt->sqrtf (PR #180160)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Only propagate callsite attributes in sqrt->sqrtf (PR #180160)   Matt Arsenault via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Matt Arsenault via llvm-commits
• [llvm] InstCombine: Only propagate callsite attributes in sqrt->sqrtf (PR #180160)   via llvm-commits
• [llvm] [NFC][VPlan] Rename VPEVLBasedIVPHIRecipe to VPCurrentIterationPHIRecipe (PR #177114)   Shih-Po Hung via llvm-commits
• [llvm] [NFC][VPlan] Rename VPEVLBasedIVPHIRecipe to VPCurrentIterationPHIRecipe (PR #177114)   Shih-Po Hung via llvm-commits
• [llvm] [NFC][VPlan] Rename VPEVLBasedIVPHIRecipe to VPCurrentIterationPHIRecipe (PR #177114)   Shih-Po Hung via llvm-commits
• [llvm] sketch idea of getConstantBuildVector (PR #180074)   via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   via llvm-commits
• [llvm] [NFC][LLVM][IPO] Remove pass initialization from pass constructors (PR #180154)   via llvm-commits
• [llvm] [NFC][LLVM][IPO] Remove pass initialization from pass constructors (PR #180154)   via llvm-commits
• [llvm] [InstCombine] fold `gepi i8 %ptr, (srem x, y)` to `gepi i8 %ptr, (urem x, y)` if `y` is positive power-of-2 (PR #180148)   via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Petar Avramovic via llvm-commits
• [clang-tools-extra] [llvm] [clang-tidy] New check `misc-header-guard` (PR #177315)   Thorsten Klein via llvm-commits
• [llvm] InstCombine: Only propagate callsite attributes in sqrt->sqrtf (PR #180160)   Nikita Popov via llvm-commits
• [llvm] InstCombine: Only propagate callsite attributes in sqrt->sqrtf (PR #180160)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `gepi i8 %ptr, (srem x, y)` to `gepi i8 %ptr, (urem x, y)` if `y` is positive power-of-2 (PR #180148)   via llvm-commits
• [llvm] InstCombine: Only propagate callsite attributes in sqrt->sqrtf (PR #180160)   Nikita Popov via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Petar Avramovic via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   David Sherwood via llvm-commits
• [llvm] b738491 - [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (#179413)   via llvm-commits
• [llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Set MOThreadPrivate on memory accesses for spills (PR #179414)   Pierre van Houtryve via llvm-commits
• [llvm] [InstCombine] fold `gepi i8 %ptr, (srem x, y)` to `gepi i8 %ptr, (urem x, y)` if `y` is positive power-of-2 (PR #180148)   via llvm-commits
• [llvm] [AMDGPU] Fix V_INDIRECT_REG_READ_GPR_IDX expansion with immediate index (PR #179699)   Petr Kurapov via llvm-commits
• [llvm] InstCombine: Only propagate callsite attributes in sqrt->sqrtf (PR #180160)   Matt Arsenault via llvm-commits
• [llvm] [AsmParserContext] Fix regression after #174566 (PR #180068)   via llvm-commits
• [llvm] [InstCombine] fold `gepi i8 %ptr, (srem x, y)` to `gepi i8 %ptr, (urem x, y)` if `y` is positive power-of-2 (PR #180148)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `gepi i8 %ptr, (srem x, y)` to `gepi i8 %ptr, (urem x, y)` if `y` is positive power-of-2 (PR #180148)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `gepi i8 %ptr, (srem x, y)` to `gepi i8 %ptr, (urem x, y)` if `y` is positive power-of-2 (PR #180148)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `gepi i8 %ptr, (srem x, y)` to `gepi i8 %ptr, (urem x, y)` if `y` is positive power-of-2 (PR #180148)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `gepi i8 %ptr, (srem x, y)` to `gepi i8 %ptr, (urem x, y)` if `y` is positive power-of-2 (PR #180148)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `gepi i8 %ptr, (srem x, y)` to `gepi i8 %ptr, (urem x, y)` if `y` is positive power-of-2 (PR #180148)   Nikita Popov via llvm-commits
• [llvm] sketch idea of getConstantBuildVector (PR #180074)   Simon Pilgrim via llvm-commits
• [llvm] sketch idea of getConstantBuildVector (PR #180074)   Simon Pilgrim via llvm-commits
• [llvm] sketch idea of getConstantBuildVector (PR #180074)   Simon Pilgrim via llvm-commits
• [llvm] sketch idea of getConstantBuildVector (PR #180074)   Simon Pilgrim via llvm-commits
• [llvm] [LLVM] Select fma_mix for v_cvt_f32_f16 and v_add_f32/v_mul_f32 (PR #160151)   Jay Foad via llvm-commits
• [llvm] [LLVM] Select fma_mix for v_cvt_f32_f16 and v_add_f32/v_mul_f32 (PR #160151)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Set MOThreadPrivate on memory accesses for spills (PR #179414)   Pierre van Houtryve via llvm-commits
• [llvm] [AMDGPU] Set MOThreadPrivate on memory accesses for spills (PR #179414)   Pierre van Houtryve via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for atomicrmw ops (PR #175257)   Petar Avramovic via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] Relax one-use check for min/max(fpext x, fpext y) to fpext(min/max(x, y)) fold (PR #180164)   Nikita Popov via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [clang] [llvm] [RISCV] Support for Zvabd fast-track proposal (PR #124239)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV] Support for Zvabd fast-track proposal (PR #124239)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)   LLVM Continuous Integration via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Benjamin Maxwell via llvm-commits
• [clang] [llvm] [RISCV] Support for Zvabd fast-track proposal (PR #124239)   via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_sffbh (PR #180099)   Petar Avramovic via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   via llvm-commits
• [llvm] [LV] Use speculative load intrinsics for early-exit vectorization (PR #180039)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Optimize FindLast of FindIV w/o sentinel. (PR #172569)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   David Sherwood via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Tweak fixed-length loop.dependence.mask costs (PR #175538)   Benjamin Maxwell via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   Florian Hahn via llvm-commits
• [llvm] [InstCombine] fold `gepi i8 %ptr, (srem x, y)` to `gepi i8 %ptr, (urem x, y)` if `y` is positive power-of-2 (PR #180148)   via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   Florian Hahn via llvm-commits
• [llvm] 33a2c3e - [VPlan] Ignore poison incoming values when creating blend (#180005)   via llvm-commits
• [llvm] [VPlan] Ignore poison incoming values when creating blend (PR #180005)   Luke Lau via llvm-commits
• [llvm] 3f4d94f - [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (#179429)   via llvm-commits
• [llvm] [VectorCombine] foldShuffleOfBinops - support multiple uses of shuffled binops (PR #179429)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] fold `gepi i8 %ptr, (srem x, y)` to `gepi i8 %ptr, (urem x, y)` if `y` is power-of-2 (PR #180148)   via llvm-commits
• [llvm] [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (PR #180148)   via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Pierre van Houtryve via llvm-commits
• [llvm] [SystemZ] Enable rematerialization for scalar loads (PR #179838)   via llvm-commits
• [llvm] [InstCombine] Relax one-use check for min/max(fpext x, fpext y) to fpext(min/max(x, y)) fold (PR #180164)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Relax one-use check for min/max(fpext x, fpext y) to fpext(min/max(x, y)) fold (PR #180164)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Set MOThreadPrivate on memory accesses for spills (PR #179414)   Pierre van Houtryve via llvm-commits
• [llvm] 6824db4 - [AMDGPU] Set MOThreadPrivate on memory accesses for spills (#179414)   via llvm-commits
• [llvm] [AMDGPU][PromoteAlloca] Set !amdgpu.non.volatile if promotion fails (PR #179415)   Pierre van Houtryve via llvm-commits
• [llvm] [InstCombine] Relax one-use check for min/max(fpext x, fpext y) to fpext(min/max(x, y)) fold (PR #180164)   via llvm-commits
• [llvm] [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (PR #180148)   via llvm-commits
• [clang] [llvm] [AArch64] Add support for intent to read prefetch intrinsic (PR #179709)   Jonathan Thackray via llvm-commits
• [llvm] [SimplifyLibCalls] Directly convert fmin/fmax to intrinsics (PR #177988)   Nikita Popov via llvm-commits
• [clang] [llvm] [AArch64] Add support for intent to read prefetch intrinsic (PR #179709)   Jonathan Thackray via llvm-commits
• [clang] [llvm] [AArch64] Add support for intent to read prefetch intrinsic (PR #179709)   Jonathan Thackray via llvm-commits
• [llvm] [AArch64] Tweak fixed-length loop.dependence.mask costs (PR #175538)   Benjamin Maxwell via llvm-commits
• [llvm] [VPlan] Skip applying InstsToScalarize with forced instr costs. (PR #168269)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Skip applying InstsToScalarize with forced instr costs. (PR #168269)   Florian Hahn via llvm-commits
• [llvm] [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (PR #180148)   via llvm-commits
• [llvm] [AArch64] Tweak fixed-length loop.dependence.mask costs (PR #175538)   Benjamin Maxwell via llvm-commits
• [clang] [llvm] [AArch64] Add support for intent to read prefetch intrinsic (PR #179709)   Jonathan Thackray via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   David Sherwood via llvm-commits
• [clang] [llvm] [AArch64] Add support for intent to read prefetch intrinsic (PR #179709)   Jonathan Thackray via llvm-commits
• [llvm] [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (PR #180148)   via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Antonio Frighetto via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Antonio Frighetto via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Antonio Frighetto via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Antonio Frighetto via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Pankaj Dwivedi via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Pierre van Houtryve via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   Simon Pilgrim via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   Simon Pilgrim via llvm-commits
• [llvm] [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (PR #180148)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (PR #180148)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (PR #180148)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (PR #180148)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (PR #180148)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Revert incorrect fsub fpext into mad-mix pattern (PR #180168)   Alexander Weinrauch via llvm-commits
• [llvm] [AMDGPU] Revert incorrect fsub fpext into mad-mix pattern (PR #180168)   via llvm-commits
• [llvm] [AMDGPU] Revert incorrect fsub fpext into mad-mix pattern (PR #180168)   via llvm-commits
• [llvm] [AArch64][GlobalISel] WIP Remove fallbacks for FPCVT intrinsics with 16-bit operands (PR #179693)   Joshua Rodriguez via llvm-commits
• [llvm] dfcb0be - [AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (#179909)   via llvm-commits
• [llvm] [AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (PR #179909)   Sander de Smalen via llvm-commits
• [llvm] [VectorCombine] Fold (icmp eq/ne (reduce.add X), 0) to reduce.umax (PR #180001)   Simon Pilgrim via llvm-commits
• [llvm] [AArch64][GlobalISel] WIP Remove fallbacks for FPCVT intrinsics with 16-bit operands (PR #179693)   Joshua Rodriguez via llvm-commits
• [llvm] d4638ad - InstCombine: Only propagate callsite attributes in sqrt->sqrtf (#180160)   via llvm-commits
• [llvm] InstCombine: Only propagate callsite attributes in sqrt->sqrtf (PR #180160)   Matt Arsenault via llvm-commits
• [llvm] [WIP][Support] Always scale InstructionCost::Value (PR #178962)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Fix and simplify patterns selecting fsub to v_fma_mix_f32 (PR #180169)   Jay Foad via llvm-commits
• [clang] [llvm] AMDGPU: Add llvm.amdgcn.s.wait.event intrinsic (PR #180170)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix and simplify patterns selecting fsub to v_fma_mix_f32 (PR #180169)   via llvm-commits
• [llvm] [AMDGPU] Fix and simplify patterns selecting fsub to v_fma_mix_f32 (PR #180169)   via llvm-commits
• [llvm] [AMDGPU] Fix and simplify patterns selecting fsub to v_fma_mix_f32 (PR #180169)   Jay Foad via llvm-commits
• [clang] [llvm] AMDGPU: Add llvm.amdgcn.s.wait.event intrinsic (PR #180170)   Matt Arsenault via llvm-commits
• [clang] [llvm] AMDGPU: Add llvm.amdgcn.s.wait.event intrinsic (PR #180170)   via llvm-commits
• [clang] [llvm] AMDGPU: Add llvm.amdgcn.s.wait.event intrinsic (PR #180170)   Matt Arsenault via llvm-commits
• [llvm] [VectorCombine] Skip dead shufflevector in GetIndexRangeInShuffles to fix crash. (PR #179217)   Florian Hahn via llvm-commits
• [clang] [llvm] AMDGPU: Add llvm.amdgcn.s.wait.event intrinsic (PR #180170)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Revert incorrect fsub fpext into mad-mix pattern (PR #180168)   Jay Foad via llvm-commits
• [llvm] [VectorCombine] Skip dead shufflevector in GetIndexRangeInShuffles to fix crash. (PR #179217)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Fix and simplify patterns selecting fsub to v_fma_mix_f32 (PR #180169)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Fix and simplify patterns selecting fsub to v_fma_mix_f32 (PR #180169)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix and simplify patterns selecting fsub to v_fma_mix_f32 (PR #180169)   Matt Arsenault via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Petar Avramovic via llvm-commits
• [llvm] [ARM] Use REG_SEQUENCE instead of SUBREG_TO_REG for crypto patterns. NFCI. (PR #179910)   David Green via llvm-commits
• [llvm] [ARM] Autogenerate checks for crypto intrinsics (PR #180147)   David Green via llvm-commits
• [llvm] [VPlan] Add ExitingIVValue VPInstruction. (PR #175651)   Florian Hahn via llvm-commits
• [llvm] [ExpandIRInsts] Freeze input in itofp expansion (PR #180157)   Matt Arsenault via llvm-commits
• [llvm] [VPlan] Add ExitingIVValue VPInstruction. (PR #175651)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Tweak fixed-length loop.dependence.mask costs (PR #175538)   Sander de Smalen via llvm-commits
• [llvm] [BOLT][BTI] Refactor: move applyBTIFixup under MCPlusBuilder (PR #177164)   Alexandros Lamprineas via llvm-commits
• [llvm] [VPlan] Directly unroll VectorEndPointerRecipe (PR #172372)   Florian Hahn via llvm-commits
• [llvm] [SYCL] Add sycl::device initial implementation (PR #176972)   Kseniya Tikhomirova via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [clang] [llvm] [mlir] IR: Promote "denormal-fp-math" to a first class attribute (PR #174293)   Mikael Holmen via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Luke Lau via llvm-commits
• [llvm] [AArch64] Codegen for AArch64 Return Address Signing Hardening (PR #176187)   Victor Campos via llvm-commits
• [llvm] [AArch64] Codegen for AArch64 Return Address Signing Hardening (PR #176187)   Victor Campos via llvm-commits
• [llvm] 0287d78 - [ExpandIRInsts] Freeze input in itofp expansion (#180157)   via llvm-commits
• [llvm] [ExpandIRInsts] Freeze input in itofp expansion (PR #180157)   Nikita Popov via llvm-commits
• [compiler-rt] Relax CHECK-NEXT to CHECK for RISC-V (PR #157039)   via llvm-commits
• [llvm] [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (PR #180148)   via llvm-commits
• [llvm] [LV] Vectorize early exit loops with multiple exits. (PR #174864)   Florian Hahn via llvm-commits
• [llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)   Pankaj Dwivedi via llvm-commits
• [flang] [llvm] Enabling support for Allocate clause in DO construct (PR #180172)   via llvm-commits
• [flang] [llvm] Enabling support for Allocate clause in DO construct (PR #180172)   via llvm-commits
• [compiler-rt] Mark as UNSUPPORTED some fuzzer tests that fail on RISC-V (PR #156912)   via llvm-commits
• [compiler-rt] Relax CHECK-NEXT to CHECK for RISC-V (PR #157039)   via llvm-commits
• [llvm] [AArch64] Fix active.lane.mask(0, cttz.elts(x)) -> 'brkb' transform (PR #180177)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Fix active.lane.mask(0, cttz.elts(x)) -> 'brkb' transform (PR #180177)   via llvm-commits
• [llvm] [AArch64] Fix active.lane.mask(0, cttz.elts(x)) -> 'brkb' transform (PR #180177)   Sander de Smalen via llvm-commits
• [llvm] 689c995 - [VectorCombine] Skip dead shufflevector in GetIndexRangeInShuffles to fix crash. (#179217)   via llvm-commits
• [llvm] [VectorCombine] Skip dead shufflevector in GetIndexRangeInShuffles to fix crash. (PR #179217)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Fix active.lane.mask(0, cttz.elts(x)) -> 'brkb' transform (PR #180177)   Sander de Smalen via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Fix fptoui.sat expansion using minnum/maxnum (PR #180178)   Nikita Popov via llvm-commits
• [llvm] [AArch64] Fix active.lane.mask(0, cttz.elts(x)) -> 'brkb' transform (PR #180177)   Paul Walker via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Peter Smith via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Peter Smith via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Peter Smith via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Peter Smith via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Peter Smith via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Peter Smith via llvm-commits
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• [llvm] [X86] Add tests showing potential for vectorising i128/256/512 select nodes (PR #180173)   Simon Pilgrim via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   Florian Hahn via llvm-commits
• [llvm] AMDGPU: Correct value and name for ID_RTN_SAVE_WAVE_HAS_TDM (PR #180181)   Matt Arsenault via llvm-commits
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• [llvm] [VPlan] Add ExitingIVValue VPInstruction. (PR #175651)   Florian Hahn via llvm-commits
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• [flang] [llvm] Enabling support for Allocate clause in DO construct (PR #180172)   Jack Styles via llvm-commits
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• [llvm] [SystemZ][GOFF] Implement emitGlobalAlias for GOFF/HLASM (PR #180041)   Ulrich Weigand via llvm-commits
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• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Viktoria Maximova via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Viktoria Maximova via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Viktoria Maximova via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Viktoria Maximova via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Viktoria Maximova via llvm-commits
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• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   David Zbarsky via llvm-commits
• [llvm] [OFFLOAD] Change debug prefix (PR #180156)   Alex Duran via llvm-commits
• [llvm] AMDGPU: Correct value and name for ID_RTN_SAVE_WAVE_HAS_TDM (PR #180181)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Fix fptoui.sat expansion using minnum/maxnum (PR #180178)   Nikita Popov via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Yingwei Zheng via llvm-commits
• [llvm] [SelectionDAG] Fix fptoui.sat expansion using minnum/maxnum (PR #180178)   Nikita Popov via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [SelectionDAG] Fix fptoui.sat expansion using minnum/maxnum (PR #180178)   Nikita Popov via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [OFFLOAD] Change debug prefix (PR #180156)   Joseph Huber via llvm-commits
• [llvm] [LoongArch] Fix fptoui.sat miscompilation with NaN inputs (PR #179366)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG] Fix fptoui.sat expansion using minnum/maxnum (PR #180178)   via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [clang] [libclc] [llvm] [AMDGPU] Define new target gfx1170 (PR #180185)   Mirko Brkušanin via llvm-commits
• [clang] [llvm] [AMDGPU] Add fp8/bf8 conversion instructions for gfx1170 (PR #180191)   Mirko Brkušanin via llvm-commits
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• [llvm] [AMDGPU] Support v_lshl_add_u64 with non-constant shift amount (PR #179904)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Add fp8/bf8 conversion instructions for gfx1170 (PR #180191)   Mirko Brkušanin via llvm-commits
• [llvm] [AMDGPU] Support v_lshl_add_u64 with non-constant shift amount (PR #179904)   Matt Arsenault via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Yingwei Zheng via llvm-commits
• [llvm] [AArch64] Fix active.lane.mask(0, cttz.elts(x)) -> 'brkb' transform (PR #180177)   Sander de Smalen via llvm-commits
• [llvm] [AArch64] Fix active.lane.mask(0, cttz.elts(x)) -> 'brkb' transform (PR #180177)   Sander de Smalen via llvm-commits
• [llvm] [SPIRV] Fix alignment overflow in memory intrinsics (PR #180184)   Juan Manuel Martinez Caamaño via llvm-commits
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• [llvm] [DA] Introduce domain for monotonicity (PR #176367)   Sjoerd Meijer via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Dmitry Sidorov via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Yingwei Zheng via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Dmitry Sidorov via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU] Revert incorrect fsub fpext into mad-mix pattern (PR #180168)   Alexander Weinrauch via llvm-commits
• [llvm] [AMDGPU] Revert incorrect fsub fpext into mad-mix pattern (PR #180168)   Alexander Weinrauch via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Nikita Popov via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Fix APInt overflow in memset constant array creation (PR #180189)   via llvm-commits
• [lldb] [llvm] [lldb] [Process/FreeBSD] Assume minimum is FreeBSD 14 (PR #179587)   Ed Maste via llvm-commits
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• [lldb] [llvm] [lldb] [Process/FreeBSD] Assume minimum is FreeBSD 14 (PR #179587)   Minsoo Choo via llvm-commits
• [llvm] [BasicAA][TLI] Treat local-linkage globals or known environments as not aliasing errno (PR #170290)   Antonio Frighetto via llvm-commits
• [llvm] [AArch64] Fix active.lane.mask(0, cttz.elts(x)) -> 'brkb' transform (PR #180177)   Graham Hunter via llvm-commits
• [llvm] [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (PR #180148)   Nikita Popov via llvm-commits
• [llvm] 3473cf5 - [gn build] Port 2791f42a0410   LLVM GN Syncbot via llvm-commits
• [llvm] [Offload] Try to load Level Zero loader with version suffix (PR #180042)   Hansang Bae via llvm-commits
• [llvm] [SCEVExp] Use SCEVPtrToAddr in tryToReuseLCSSAPhi if possible. (PR #178727)   Nikita Popov via llvm-commits
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• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [AMDGPU] Remove unused CmpLGOp instruction (PR #180195)   via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Dmitry Sidorov via llvm-commits
• [compiler-rt] Relax CHECK-NEXT to CHECK for RISC-V (PR #157039)   via llvm-commits
• [llvm] [AMDGPU] Fix phi injection in si-i1-lowering (PR #179267)   via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Antonio Frighetto via llvm-commits
• [llvm] [LAA] Use SCEVPtrToAddr in tryToCreateDiffChecks. (PR #178861)   Nikita Popov via llvm-commits
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• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Dmitry Sidorov via llvm-commits
• [llvm] [llvm][.gitignore] macOS case-sensitive update (PR #177971)   Nikita Popov via llvm-commits
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• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Run initial recipe simplification on VPlan0. (PR #176828)   Ramkumar Ramachandra via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   David Zbarsky via llvm-commits
• [llvm] [HotColdSplit] Respect "nooutline" attribute in HotColdSplit pass (PR #179002)   Nikita Popov via llvm-commits
• [llvm] [HotColdSplit] Respect "nooutline" attribute in HotColdSplit pass (PR #179002)   Nikita Popov via llvm-commits
• [llvm] [HotColdSplit] Respect "nooutline" attribute in HotColdSplit pass (PR #179002)   Nikita Popov via llvm-commits
• [libc] [llvm] [libc][math] Refactor logb implementation to header-only (PR #175719)   via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Dmitry Sidorov via llvm-commits
• [llvm] AMDGPU: Correct value and name for ID_RTN_SAVE_WAVE_HAS_TDM (PR #180181)   Shilei Tian via llvm-commits
• [llvm] [GOFF] Set reference to ADA (PR #179734)   Kai Nacke via llvm-commits
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• [llvm] AMDGPU: Correct value and name for ID_RTN_SAVE_WAVE_HAS_TDM (PR #180181)   Matt Arsenault via llvm-commits
• [llvm] [Semilattice] Introduce for dataflow analysis with KnownBits (PR #177616)   Nikita Popov via llvm-commits
• [llvm] [InstCombine] Fold ordered fadd reductions to `llvm.vector.reduce.fadd` (PR #180196)   Benjamin Maxwell via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   via llvm-commits
• [llvm] [InstCombine] Fold ordered fadd reductions to `llvm.vector.reduce.fadd` (PR #180196)   via llvm-commits
• [llvm] [X86] Allow handling of i128/256/512 SELECT on the FPU (PR #180197)   Simon Pilgrim via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Marcos Maronas via llvm-commits
• [llvm] [X86] Allow handling of i128/256/512 SELECT on the FPU (PR #180197)   via llvm-commits
• [llvm] [InstCombine] Fold ordered fadd reductions to `llvm.vector.reduce.fadd` (PR #180196)   via llvm-commits
• [llvm] [Offload] Make the RPC callbacks private to each running server (PR #178901)   Joseph Huber via llvm-commits
• [llvm] [InstCombine] Fold ordered fadd reductions to `llvm.vector.reduce.fadd` (PR #180196)   Benjamin Maxwell via llvm-commits
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• [llvm] [AMDGPU] Remove unused CmpLGOp instruction (PR #180195)   via llvm-commits
• [llvm] [AMDGPU] Fix and simplify patterns selecting fsub to v_fma_mix_f32 (PR #180169)   Jay Foad via llvm-commits
• [llvm] [DebugInfo] Add macro tracking support to DebugInfoFinder (PR #179931)   Marcos Maronas via llvm-commits
• [llvm] [InstCombine] Fold ordered fadd reductions to `llvm.vector.reduce.fadd` (PR #180196)   Benjamin Maxwell via llvm-commits
• [llvm] 48619c8 - [ARM] Autogenerate checks for crypto intrinsics (#180147)   via llvm-commits
• [llvm] [ARM] Autogenerate checks for crypto intrinsics (PR #180147)   Jay Foad via llvm-commits
• [libc] [llvm] [libc][math] Refactor llogbl to be header-only and constexpr (PR #175376)   Mathew Joseph via llvm-commits
• [clang] [libclc] [llvm] [AMDGPU] Define new target gfx1170 (PR #180185)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [SPIRV][AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [llvm] [AMDGPU] Move magic strings used for WMMA modifiers (NFC) (PR #180201)   Mirko Brkušanin via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Enable strict mode in divsf3/mulsf3 tests (PR #179918)   Simon Tatham via llvm-commits
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• [llvm] [ARM] Use REG_SEQUENCE instead of SUBREG_TO_REG for crypto patterns. NFCI. (PR #179910)   Jay Foad via llvm-commits
• [llvm] [AMDGPU] Move magic strings used for WMMA modifiers (NFC) (PR #180201)   Matt Arsenault via llvm-commits
• [llvm] Reapply "[MemCpyOpt] support offset slices for performStackMoveOptzn and processMemCpy", with bug fixed (PR #180002)   Nikita Popov via llvm-commits
• [llvm] Reapply "[MemCpyOpt] support offset slices for performStackMoveOptzn and processMemCpy", with bug fixed (PR #180002)   Nikita Popov via llvm-commits
• [llvm] Reapply "[MemCpyOpt] support offset slices for performStackMoveOptzn and processMemCpy", with bug fixed (PR #180002)   Nikita Popov via llvm-commits
• [llvm] [AMDGPU] Move magic strings used for WMMA modifiers (NFC) (PR #180201)   Matt Arsenault via llvm-commits
• [llvm] [ARM] Use INSERT_SUBREG instead of SUBREG_TO_REG for crypto patterns. NFCI. (PR #179910)   David Green via llvm-commits
• [llvm] [Offload] Try to load Level Zero loader with version suffix (PR #180042)   Alex Duran via llvm-commits
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• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Marcos Maronas via llvm-commits
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• [llvm] [SPIRV] Fix alignment overflow in memory intrinsics (PR #180184)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Fix alignment overflow in memory intrinsics (PR #180184)   Marcos Maronas via llvm-commits
• [llvm] [SPIRV] Fix alignment overflow in memory intrinsics (PR #180184)   Marcos Maronas via llvm-commits
• [llvm] [AArch64] Codegen for AArch64 Return Address Signing Hardening (PR #176187)   Victor Campos via llvm-commits
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• [llvm] [cross-project-tests] Fix lldb version regex (PR #180204)   David Stenberg via llvm-commits
• [llvm] [cross-project-tests][formatters] Add a LIT feature that tests for a compatible LLDB version (PR #174812)   David Stenberg via llvm-commits
• [llvm] [SPIRV] Fix APInt overflow in memset constant array creation (PR #180189)   Marcos Maronas via llvm-commits
• [llvm] [AArch64] Tweak fixed-length loop.dependence.mask costs (PR #175538)   Benjamin Maxwell via llvm-commits
• [llvm] [AArch64] Test all needles when vectorising find_first_of loops. (PR #179298)   David Sherwood via llvm-commits
• [llvm] [AArch64] Test all needles when vectorising find_first_of loops. (PR #179298)   David Sherwood via llvm-commits
• [llvm] [AArch64] Avoid selecting XAR for reverse operations. (PR #178706)   Paul Walker via llvm-commits
• [llvm] [AArch64] Avoid selecting XAR for reverse operations. (PR #178706)   Paul Walker via llvm-commits
• [llvm] [AArch64] Avoid selecting XAR for reverse operations. (PR #178706)   Paul Walker via llvm-commits
• [llvm] [AArch64] Avoid selecting XAR for reverse operations. (PR #178706)   Paul Walker via llvm-commits
• [llvm] [AArch64] Avoid selecting XAR for reverse operations. (PR #178706)   Paul Walker via llvm-commits
• [compiler-rt] [ASan/sanitizers] Make stack unwinding better on Windows. (PR #180205)   via llvm-commits
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• [llvm] [llubi] Add initial support for llubi (PR #180022)   Yingwei Zheng via llvm-commits
• [compiler-rt] [ASan/sanitizers] Make stack unwinding better on Windows. (PR #180205)   via llvm-commits
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• [llvm] [X86] Add test showing failure to fold expand(splat, passthrough, mask) to select(splat, passthrough, mask) (PR #180208)   Simon Pilgrim via llvm-commits
• [llvm] 272d6dd - [AMDGPU] Support v_lshl_add_u64 with non-constant shift amount (#179904)   via llvm-commits
• [llvm] [X86] Add test showing failure to fold expand(splat, passthrough, mask) to select(splat, passthrough, mask) (PR #180208)   Simon Pilgrim via llvm-commits
• [llvm] [AMDGPU] Support v_lshl_add_u64 with non-constant shift amount (PR #179904)   Frederik Harwath via llvm-commits
• [llvm] [AMDGPU] Fix pattern selecting fmul to v_fma_mix_f32 (PR #180210)   Jay Foad via llvm-commits
• [llvm] [Offload][lit] Link against SPIR-V DeviceRTL if present (PR #180030)   Nick Sarnie via llvm-commits
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• [llvm] Revert "[Offload][lit] Link against SPIR-V DeviceRTL if present" (PR #180211)   Nick Sarnie via llvm-commits
• [llvm] [AMDGPU] Fix pattern selecting fmul to v_fma_mix_f32 (PR #180210)   Jay Foad via llvm-commits
• [llvm] Revert "[Offload][lit] Link against SPIR-V DeviceRTL if present" (PR #180211)   Nick Sarnie via llvm-commits
• [llvm] [AArch64] Fix active.lane.mask(0, cttz.elts(x)) -> 'brkb' transform (PR #180177)   Paul Walker via llvm-commits
• [llvm] [AArch64] Fix active.lane.mask(0, cttz.elts(x)) -> 'brkb' transform (PR #180177)   Paul Walker via llvm-commits
• [llvm] [AArch64] Fix active.lane.mask(0, cttz.elts(x)) -> 'brkb' transform (PR #180177)   Paul Walker via llvm-commits
• [llvm] [AArch64] Fix active.lane.mask(0, cttz.elts(x)) -> 'brkb' transform (PR #180177)   Paul Walker via llvm-commits
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• [llvm] Revert "[Offload][lit] Link against SPIR-V DeviceRTL if present" (PR #180211)   Nick Sarnie via llvm-commits
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• [llvm] [AArch64] Fix active.lane.mask(0, cttz.elts(x)) -> 'brkb' transform (PR #180177)   Paul Walker via llvm-commits
• [llvm] [AMDGPU] Fix and simplify patterns selecting fsub to v_fma_mix_f32 (PR #180169)   Jay Foad via llvm-commits
• [llvm] Revert "[Offload][lit] Link against SPIR-V DeviceRTL if present" (PR #180211)   via llvm-commits
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• [llvm] [ARM] Use INSERT_SUBREG instead of SUBREG_TO_REG for crypto patterns. NFCI. (PR #179910)   Jay Foad via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   David Zbarsky via llvm-commits
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• [llvm] [llubi] Add initial support for llubi (PR #180022)   Antonio Frighetto via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Antonio Frighetto via llvm-commits
• [llvm] [Offload] Try to load Level Zero loader with version suffix (PR #180042)   Nick Sarnie via llvm-commits
• [llvm] [Offload] Try to load Level Zero loader with version suffix (PR #180042)   Nick Sarnie via llvm-commits
• [llvm] [NewPM] Port x86-insert-x87-wait (PR #180128)   Kyungtak Woo via llvm-commits
• [llvm] [NewPM] Port x86-insert-x87-wait (PR #180128)   Kyungtak Woo via llvm-commits
• [llvm] [RISCV] Add used callee-saved registers as implicit/implicit-def registers to save/restore call (PR #180133)   Francis Visoiu Mistrih via llvm-commits
• [compiler-rt] [compiler-rt][ARM] Enable strict mode in divsf3/mulsf3 tests (PR #179918)   Simon Tatham via llvm-commits
• [llvm] [InferAddressSpaces] Initialize op(generic const, generic const, ...) -> generic (PR #172143)   Hongyu Chen via llvm-commits
• [llvm] [AsmParserContext] Fix regression after #174566 (PR #180068)   Nikita Popov via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Marcos Maronas via llvm-commits
• [llvm] [CodeGen][AMDGPU] TwoAddress: Only skip undef COPY at REG_SEQUENCE lowering when there is Live info or no uses for subreg (PR #175598)   Felipe Quezada via llvm-commits
• [llvm] [DAGCombiner] Look through freeze for ext(freeze(extload(x))) (PR #178669)   David Sherwood via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU] Remove unused CmpLGOp instruction (PR #180195)   Jay Foad via llvm-commits
• [llvm] [InferAddressSpaces] Initialize op(generic const, generic const, ...) -> generic (PR #172143)   Hongyu Chen via llvm-commits
• [llvm] [InstCombine] Always rewrite multi-use GEP for pointer difference (PR #142787)   Nikita Popov via llvm-commits
• [llvm] [NewPM] Port x86-insert-x87-wait (PR #180128)   Kyungtak Woo via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Dmitry Sidorov via llvm-commits
• [llvm] [Offload] Try to load Level Zero loader with version suffix (PR #180042)   Alex Duran via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Yingwei Zheng via llvm-commits
• [clang] [llvm] AMDGPU: Add llvm.amdgcn.s.wait.event intrinsic (PR #180170)   Joseph Huber via llvm-commits
• [llvm] c8d8e5e - [DebugInfo] Add macro tracking support to DebugInfoFinder (#179931)   via llvm-commits
• [llvm] [DebugInfo] Add macro tracking support to DebugInfoFinder (PR #179931)   Manuel Carrasco via llvm-commits
• [llvm] [Offload] Try to load Level Zero loader with version suffix (PR #180042)   Nick Sarnie via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Yingwei Zheng via llvm-commits
• [llvm] [NewPM] Port x86-global-base-reg (PR #180119)   Kyungtak Woo via llvm-commits
• [llvm] [InstCombine] Fold ordered fadd reductions to `llvm.vector.reduce.fadd` (PR #180196)   Benjamin Maxwell via llvm-commits
• [lld] [ELF][AArch64][PAC][MTE] Handle Memtag globals for R_AARCH64_AUTH_ABS64 (PR #173291)   Peter Smith via llvm-commits
• [llvm] [AsmParserContext] Fix regression after #174566 (PR #180068)   via llvm-commits
• [llvm] 65cdee8 - [AMDGPU] Move magic strings used for WMMA modifiers (NFC) (#180201)   via llvm-commits
• [llvm] [AMDGPU] Move magic strings used for WMMA modifiers (NFC) (PR #180201)   Mirko Brkušanin via llvm-commits
• [llvm] [LV] Add initial support for partial alias masking (PR #177599)   Benjamin Maxwell via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Marcos Maronas via llvm-commits
• [compiler-rt] [libc] [libcxx] [libcxxabi] [libunwind] [llvm] [openmp] [Runtimes] Introduce variables containing resource dir paths (PR #177953)   Michael Kruse via llvm-commits
• [llvm] [libc++] Add link to the running job from the benchmarking bot (PR #180217)   Louis Dionne via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in MacroFusion emitter (PR #180132)   Rahul Joshi via llvm-commits
• [llvm] [libc++] Add link to the running job from the benchmarking bot (PR #180217)   via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in GobalISel emitters (PR #180143)   Rahul Joshi via llvm-commits
• [llvm] e958bcd - [DAGCombiner] Look through freeze for ext(freeze(extload(x))) (#178669)   via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in MacroFusion emitter (PR #180132)   via llvm-commits
• [llvm] [DAGCombiner] Look through freeze for ext(freeze(extload(x))) (PR #178669)   David Sherwood via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in GobalISel emitters (PR #180143)   via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in GobalISel emitters (PR #180143)   via llvm-commits
• [llvm] [NFC][Core][CodeGen] Remove pass initialization from pass constructors (PR #180153)   Rahul Joshi via llvm-commits
• [llvm] [NFC][Core][CodeGen] Remove pass initialization from pass constructors (PR #180153)   via llvm-commits
• [llvm] [NFC][LLVM] Remove pass initialization from pass constructors (PR #180158)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM] Code cleanup in VNCoercion (PR #180159)   Rahul Joshi via llvm-commits
• [llvm] [NFC][LLVM] Remove pass initialization from pass constructors (PR #180158)   via llvm-commits
• [llvm] [NFC][AMDGPU] Remove pass initialization from pass constructors (PR #180149)   Rahul Joshi via llvm-commits
• [llvm] [SPIR-V] Emit ceil(Bitwidth / 32) words during OpConstant creation (PR #180218)   Dmitry Sidorov via llvm-commits
• [llvm] [NFC][LLVM] Code cleanup in VNCoercion (PR #180159)   via llvm-commits
• [llvm] [NFC][AMDGPU] Remove pass initialization from pass constructors (PR #180149)   via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for atomicrmw ops (PR #175257)   Anshil Gandhi via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Dmitry Sidorov via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Antonio Frighetto via llvm-commits
• [llvm] [SPIR-V] Emit ceil(Bitwidth / 32) words during OpConstant creation (PR #180218)   Dmitry Sidorov via llvm-commits
• [llvm] [libc++] Add link to the running job from the benchmarking bot (PR #180217)   Louis Dionne via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   via llvm-commits
• [llvm] [libc++] Add link to the running job from the benchmarking bot (PR #180217)   Louis Dionne via llvm-commits
• [flang] [llvm] Enabling support for Allocate clause in DO construct (PR #180172)   Jack Styles via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Juan Manuel Martinez Caamaño via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   David Zbarsky via llvm-commits
• [llvm] [AMDGPU] Fix pattern selecting fmul to v_fma_mix_f32 (PR #180210)   Georg Lehmann via llvm-commits
• [llvm] [AMDGPU] Fix LDS address correction in promoteConstantOffsetToImm for async stores (PR #180220)   Alexander Weinrauch via llvm-commits
• [llvm] [AMDGPU] Fix pattern selecting fmul to v_fma_mix_f32 (PR #180210)   Georg Lehmann via llvm-commits
• [llvm] [AMDGPU] Fix LDS address correction in promoteConstantOffsetToImm for async stores (PR #180220)   via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   David Zbarsky via llvm-commits
• [llvm] [AMDGPU] Fix LDS address correction in promoteConstantOffsetToImm for async stores (PR #180220)   via llvm-commits
• [clang] [compiler-rt] [llvm] Migrate llvm-profdata to Opt flag parsing (PR #177868)   David Zbarsky via llvm-commits
• [llvm] [NFC][AMDGPU] Remove pass initialization from pass constructors (PR #180149)   Matt Arsenault via llvm-commits
• [llvm] e67bfe8 - [AMDGPU][GlobalISel] Fix D16 buffer load RegBankLegalize rules (#179982)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Fix D16 buffer load RegBankLegalize rules (PR #179982)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Caroline Newcombe via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [InstCombine] Canonicalize gep scaling factor (PR #180216)   via llvm-commits
• [llvm] [InstCombine] Canonicalize gep scaling factor (PR #180216)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnt][NFC] Access Waitcnt elements using InstCounterType (PR #178345)   via llvm-commits
• [clang] [llvm] AMDGPU: Add llvm.amdgcn.s.wait.event intrinsic (PR #180170)   Matt Arsenault via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Gábor Spaits via llvm-commits
• [llvm] [NFC][AMDGPU] Remove pass initialization from pass constructors (PR #180149)   Dark Steve via llvm-commits
• [llvm] [AMDGPU] Fix LDS address correction in promoteConstantOffsetToImm for async stores (PR #180220)   Alexander Weinrauch via llvm-commits
• [llvm] [NFC][AMDGPU] Remove pass initialization from pass constructors (PR #180149)   Dark Steve via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Peter Klausler via llvm-commits
• [llvm] [SPIRV] Fix APInt overflow in memset constant array creation (PR #180189)   Juan Manuel Martinez Caamaño via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Gábor Spaits via llvm-commits
• [llvm] Provide intrinsics for speculative loads (PR #179642)   David Sherwood via llvm-commits
• [llvm] [NewPM] Port x86-insert-x87-wait (PR #180128)   Aiden Grossman via llvm-commits
• [compiler-rt] [ASan] Fix crash in __asan_region_is_poisoned at application memory boundaries (PR #180223)   via llvm-commits
• [clang] [llvm] AMDGPU: Add llvm.amdgcn.s.wait.event intrinsic (PR #180170)   Joseph Huber via llvm-commits
• [compiler-rt] [ASan] Fix crash in __asan_region_is_poisoned at application memory boundaries (PR #180223)   via llvm-commits
• [llvm] WIP: [bolt][aarch64] Change indirect call instrumentation snippet (PR #180225)   Alexey Moksyakov via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Caroline Newcombe via llvm-commits
• [compiler-rt] [ASan] Fix crash in __asan_region_is_poisoned at application memory boundaries (PR #180223)   via llvm-commits
• [llvm] WIP: [bolt][aarch64] Change indirect call instrumentation snippet (PR #180225)   via llvm-commits
• [llvm] [NFC][Core][CodeGen] Remove pass initialization from pass constructors (PR #180153)   Nikita Popov via llvm-commits
• [llvm] [NFC][LLVM] Remove pass initialization from pass constructors (PR #180158)   Nikita Popov via llvm-commits
• [llvm] [NFC][LLVM] Remove pass initialization from pass constructors (PR #180158)   Aiden Grossman via llvm-commits
• [llvm] [SPIRV] Implement lowering for HLSL Texture2D sampling intrinsics (PR #179312)   Nathan Gauër via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Luke Lau via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   via llvm-commits
• [llvm] [Offload] Try to load Level Zero loader with version suffix (PR #180042)   Alex Duran via llvm-commits
• [llvm] [libc++] Add link to the running job from the benchmarking bot (PR #180217)   Aiden Grossman via llvm-commits
• [llvm] [NFC][Core][CodeGen] Remove pass initialization from pass constructors (PR #180153)   Aiden Grossman via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Xinlong Chen via llvm-commits
• [llvm] [NFC][LLVM] Code cleanup in VNCoercion (PR #180159)   Aiden Grossman via llvm-commits
• [llvm] WIP: [bolt][aarch64] Change indirect call instrumentation snippet (PR #180225)   Alexey Moksyakov via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Luke Lau via llvm-commits
• [llvm] WIP: [bolt][aarch64] Change indirect call instrumentation snippet (PR #180225)   Alexey Moksyakov via llvm-commits
• [llvm] 29891ec - [SelectionDAG] Use -filetype=null for llc RUN lines in pr142937 (#180004)   via llvm-commits
• [llvm] [SelectionDAG] Use -filetype=null for llc RUN lines in pr142937 (PR #180004)   Aiden Grossman via llvm-commits
• [llvm] WIP: [bolt][aarch64] Change indirect call instrumentation snippet (PR #180225)   Alexey Moksyakov via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 1 - Setup skeleton (PR #178796)   Derek Schuff via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Nathan Gauër via llvm-commits
• [llvm] [WebAssembly][FastISel] Make use of `sign-ext` proposals instructions when available (PR #179855)   Derek Schuff via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   via llvm-commits
• [clang] [llvm] AMDGPU: Add llvm.amdgcn.s.wait.event intrinsic (PR #180170)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Clean up loop (PR #179572)   Jay Foad via llvm-commits
• [llvm] [RISCV] Lower disjoint shuffle of shuffles to MERGE-GATHER sequence (PR #178095)   Luke Lau via llvm-commits
• [llvm] [Offload] Try to load Level Zero loader with version suffix (PR #180042)   Hansang Bae via llvm-commits
• [llvm] caee8f0 - [RISCV] Add ppair.e and ppaire.w as aliases for pack on RV32 and RV64 respectively (#180100)   via llvm-commits
• [llvm] [RISCV] Add ppair.e and ppaire.w as aliases for pack on RV32 and RV64 respectively (PR #180100)   Craig Topper via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   via llvm-commits
• [llvm] [Offload] Try to load Level Zero loader with version suffix (PR #180042)   Nick Sarnie via llvm-commits
• [clang] [llvm] [HLSL] Implement Sample* methods for Texture2D (PR #179322)   Steven Perron via llvm-commits
• [llvm] Reapply [Offload][lit] Link against SPIR-V DeviceRTL if present (PR #180231)   Nick Sarnie via llvm-commits
• [llvm] Reapply [Offload][lit] Link against SPIR-V DeviceRTL if present (PR #180231)   Nick Sarnie via llvm-commits
• [llvm] [msan] Handle NEON floating-point absolute compare greater than/equal (PR #180120)   Vitaly Buka via llvm-commits
• [llvm] Reapply [Offload][lit] Link against SPIR-V DeviceRTL if present (PR #180231)   Nick Sarnie via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Dmitry Sidorov via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Dmitry Sidorov via llvm-commits
• [llvm] Reapply [Offload][lit] Link against SPIR-V DeviceRTL if present (PR #180231)   Nick Sarnie via llvm-commits
• [llvm] [DA] Introduce domain for monotonicity (PR #176367)   Ryotaro Kasuga via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in MacroFusion emitter (PR #180132)   Pengcheng Wang via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   via llvm-commits
• [clang] [llvm] [HexFloat] add HexFloat to APFloat (PR #179771)   Hubert Tong via llvm-commits
• [llvm] [SPIRV] Fix constant materialization for width > 64bit (PR #180182)   Dmitry Sidorov via llvm-commits
• [llvm] Reapply [Offload][lit] Link against SPIR-V DeviceRTL if present (PR #180231)   Nick Sarnie via llvm-commits
• [llvm] Reapply [Offload][lit] Link against SPIR-V DeviceRTL if present (PR #180231)   Nick Sarnie via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zvabd instructions (PR #180139)   Craig Topper via llvm-commits
• [llvm] 1b0d9d5 - [gn build] Port 1171450d56e2   LLVM GN Syncbot via llvm-commits
• [llvm] [AMDGPU] Fix LDS address correction in promoteConstantOffsetToImm for async stores (PR #180220)   Quentin Colombet via llvm-commits
• [llvm] [AMDGPU] Fix LDS address correction in promoteConstantOffsetToImm for async stores (PR #180220)   Quentin Colombet via llvm-commits
• [llvm] [AMDGPU] Fix LDS address correction in promoteConstantOffsetToImm for async stores (PR #180220)   Quentin Colombet via llvm-commits
• [llvm] [AMDGPU] Fix LDS address correction in promoteConstantOffsetToImm for async stores (PR #180220)   Quentin Colombet via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Alon Zakai via llvm-commits
• [llvm] [NFC][LLVM][IPO] Remove pass initialization from pass constructors (PR #180154)   Rahul Joshi via llvm-commits
• [llvm] 55ecf62 - [NFC][TableGen] Adopt CodeGenHelpers in MacroFusion emitter (#180132)   via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in MacroFusion emitter (PR #180132)   Rahul Joshi via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   David Sherwood via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   David Sherwood via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   David Sherwood via llvm-commits
• [llvm] [AMDGPU] Fix pattern selecting fmul to v_fma_mix_f32 (PR #180210)   Jay Foad via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   David Sherwood via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   David Sherwood via llvm-commits
• [llvm] [AMDGPU] Fix pattern selecting fmul to v_fma_mix_f32 (PR #180210)   Jay Foad via llvm-commits
• [llvm] 295eba2 - [NFC][AMDGPU] Remove pass initialization from pass constructors (#180149)   via llvm-commits
• [llvm] [NFC][AMDGPU] Remove pass initialization from pass constructors (PR #180149)   Rahul Joshi via llvm-commits
• [llvm] [SPIRV] Fix alignment overflow in memory intrinsics (PR #180184)   Dmitry Sidorov via llvm-commits
• [llvm] b12e312 - [NFC][Core][CodeGen] Remove pass initialization from pass constructors (#180153)   via llvm-commits
• [llvm] [WebAssembly] Replace Reachability with SCCs in Irreducible CFG Fixer (PR #179722)   Alon Zakai via llvm-commits
• [llvm] [NFC][Core][CodeGen] Remove pass initialization from pass constructors (PR #180153)   Rahul Joshi via llvm-commits
• [llvm] 017ca73 - [NFC][LLVM] Remove pass initialization from pass constructors (#180158)   via llvm-commits
• [llvm] [NFC][LLVM] Remove pass initialization from pass constructors (PR #180158)   Rahul Joshi via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   Luke Lau via llvm-commits
• [llvm] [NFC][LLVM] Code cleanup in VNCoercion (PR #180159)   Rahul Joshi via llvm-commits
• [llvm] 918d576 - [NFC][LLVM] Code cleanup in VNCoercion (#180159)   via llvm-commits
• [llvm] [SCEVExp] Use SCEVPtrToAddr in tryToReuseLCSSAPhi if possible. (PR #178727)   Florian Hahn via llvm-commits
• [llvm] [NFC][LLVM] Code cleanup in VNCoercion (PR #180159)   Rahul Joshi via llvm-commits
• [llvm] [SCEVExp] Use SCEVPtrToAddr in tryToReuseLCSSAPhi if possible. (PR #178727)   Florian Hahn via llvm-commits
• [llvm] [AMDGPU] Fix pattern selecting fmul to v_fma_mix_f32 (PR #180210)   Jay Foad via llvm-commits
• [llvm] WIP: [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   Alexey Moksyakov via llvm-commits
• [llvm] [VPlan] Ignore poison incoming values when creating blend (PR #180005)   Devon Loehr via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Andrei Elovikov via llvm-commits
• [compiler-rt] [ASan/sanitizers] Make stack unwinding better on Windows. (PR #180205)   Daniel Paoliello via llvm-commits
• [llvm] [LV] Simplify recipes after convertToConcreteRecipes (PR #180235)   Ramkumar Ramachandra via llvm-commits
• [llvm] [LV] Simplify recipes after convertToConcreteRecipes (PR #180235)   via llvm-commits
• [llvm] [LV] Simplify recipes after convertToConcreteRecipes (PR #180235)   via llvm-commits
• [flang] [llvm] Enabling support for Allocate clause in DO construct (PR #180172)   Leandro Lupori via llvm-commits
• [llvm] bd19bfe - [msan] Switch switch() from strict handling to (icmp eq)-style handling (#179851)   via llvm-commits
• [llvm] [msan] Switch switch() from strict handling to (icmp eq)-style handling (PR #179851)   Thurston Dang via llvm-commits
• [llvm] [llvm][.gitignore] macOS case-sensitive update (PR #177971)   via llvm-commits
• [llvm] [llvm][.gitignore] macOS case-sensitive update (PR #177971)   via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Luke Lau via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Luke Lau via llvm-commits
• [llvm] 4afce0c - [AArch64] Correct spelling of INSERT_SUBREF->INSERT_SUBREG. NFC   David Green via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Luke Lau via llvm-commits
• [llvm] [Hexagon] Update maintainers (PR #177935)   Ikhlas Ajbar via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Luke Lau via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Luke Lau via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Luke Lau via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Luke Lau via llvm-commits
• [llvm] [AMDGPU] Fix LDS address correction in promoteConstantOffsetToImm for async stores (PR #180220)   Alexander Weinrauch via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [X86] Fold expand(splat,passthrough,mask) to select(splat,passthrough,mask) (PR #180238)   Simon Pilgrim via llvm-commits
• [llvm] [X86] Fold expand(splat,passthrough,mask) to select(splat,passthrough,mask) (PR #180238)   via llvm-commits
• [llvm] [AMDGPU] Fix LDS address correction in promoteConstantOffsetToImm for async stores (PR #180220)   Alexander Weinrauch via llvm-commits
• [llvm] [flang] Better "out of memory" error for failure to allocate a unit (PR #179291)   Peter Klausler via llvm-commits
• [llvm] [InstCombine] Fold ordered fadd reductions to `llvm.vector.reduce.fadd` (PR #180196)   Alexey Bataev via llvm-commits
• [llvm] d1d9413 - [VPlan] Don't use std::not_fn   Luke Lau via llvm-commits
• [libc] [llvm] [libc][math] Refactor llogbl to be header-only and constexpr (PR #175376)   Mathew Joseph via llvm-commits
• [llvm] [AMDGPU] Analyze REG_SEQUENCE To Remove Redundant CMP Instructions (PR #167364)   Patrick Simmons via llvm-commits
• [llvm] [InstCombine] Fold min/max(fpext x, C) to fpext(min/max(x, fptrunc C)) (PR #179968)   Yingwei Zheng via llvm-commits
• [llvm] [VPlan] Ignore poison incoming values when creating blend (PR #180005)   Luke Lau via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Fangrui Song via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Andrei Elovikov via llvm-commits
• [llvm] [VPlan] Move tail folding out of VPlanPredicator. NFC (PR #176143)   Andrei Elovikov via llvm-commits
• [llvm] AMDGPU: Use promotion to f32 path for log/log10 for f16 by default (PR #180240)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use promotion to f32 path for log/log10 for f16 by default (PR #180240)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use promotion to f32 path for log/log10 for f16 by default (PR #180240)   via llvm-commits
• [llvm] AMDGPU: Use promotion to f32 path for log/log10 for f16 by default (PR #180240)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Use promotion to f32 path for log/log10 for f16 by default (PR #180240)   Matt Arsenault via llvm-commits
• [clang] [lld] [llvm] [llvm][lld][clang] Delay initializing TargetOptions in LTO builds until a Triple is available (PR #179509)   Fangrui Song via llvm-commits
• [llvm] [InstCombine] Relax one-use check for min/max(fpext x, fpext y) to fpext(min/max(x, y)) fold (PR #180164)   Yingwei Zheng via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   via llvm-commits
• [llvm] [llvm][.gitignore] macOS case-sensitive update (PR #177971)   Eric Christopher via llvm-commits
• [llvm] [NFC][LLVM] Namespace cleanup in SCCPSolver (PR #180245)   Rahul Joshi via llvm-commits
• [llvm] [AMDGPU] Fix pattern selecting fmul to v_fma_mix_f32 (PR #180210)   Georg Lehmann via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Yingwei Zheng via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Yingwei Zheng via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Yingwei Zheng via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Yingwei Zheng via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Yingwei Zheng via llvm-commits
• [llvm] [NFC][LLVM] Namespace cleanup in SCCPSolver (PR #180245)   Rahul Joshi via llvm-commits
• [llvm] [SPIRV] Add a `SPIRVTypeInst` type with some guardrails (PR #179947)   Dmitry Sidorov via llvm-commits
• [lld] [lld][BP] Fix nondeterministic function order by using MapVector (PR #179841)   Ellis Hoag via llvm-commits
• [llvm] [VPlan] Ignore poison incoming values when creating blend (PR #180005)   Devon Loehr via llvm-commits
• [llvm] 544caa6 - [StaticDataLayout] Reconcile string literal hotness from data access profiles and PGO profiles. (#178336)   via llvm-commits
• [lld] [lld][BP] Fix nondeterministic function order by using MapVector (PR #179841)   Ellis Hoag via llvm-commits
• [llvm] [StaticDataLayout] Reconcile string literal hotness from data access profiles and PGO profiles. (PR #178336)   Mingming Liu via llvm-commits
• [llvm] [Hexagon] Add post-RA live variables analysis (PR #179531)   Sergei Larin via llvm-commits
• [lld] 9f4e8bc - [lld][BP] Fix nondeterministic function order by using MapVector (#179841)   via llvm-commits
• [lld] [lld][BP] Fix nondeterministic function order by using MapVector (PR #179841)   Ellis Hoag via llvm-commits
• [llvm] [NFC][LLVM] Namespace cleanup in SCCPSolver (PR #180245)   Rahul Joshi via llvm-commits
• [llvm] [Hexagon] Add global region scaffolding (PR #179541)   Sergei Larin via llvm-commits
• [llvm] [objcopy][Wasm] Make strip-all remove all non-engine-interpreted sections (PR #180246)   Derek Schuff via llvm-commits
• [llvm] [objcopy][Wasm] Make strip-all remove all non-engine-interpreted sections (PR #180246)   via llvm-commits
• [llvm] [objcopy][Wasm] Make strip-all remove all non-engine-interpreted sections (PR #180246)   Derek Schuff via llvm-commits
• [llvm] [CGData][GMF] Preserve Profile Data (PR #180126)   Ellis Hoag via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #180247)   Sadaf Ebrahimi via llvm-commits
• [llvm] [bazel][mlir][AMDGPU] Port #180112: Add td dep (PR #180248)   Jordan Rupprecht via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #180247)   via llvm-commits
• [llvm] [NFC][llvm][docs] Fix alphabetical order of commands (PR #178519)   Prabhu Rajasekaran via llvm-commits
• [llvm] 8e17489 - [CGData][GMF] Preserve Profile Data (#180126)   via llvm-commits
• [llvm] [CGData][GMF] Preserve Profile Data (PR #180126)   Kyungwoo Lee via llvm-commits
• [llvm] [SPIRV] Implement lowering for HLSL Texture2D sampling intrinsics (PR #179312)   Steven Perron via llvm-commits
• [llvm] [SandboxIR] Delete SandboxIR/SandboxVectorizer (PR #166417)   via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   via llvm-commits
• [llvm] [NFC][llvm][docs] Fix alphabetical order of commands (PR #178519)   Prabhu Rajasekaran via llvm-commits
• [llvm] [NFC][llvm][docs] Fix alphabetical order of commands (PR #178519)   Prabhu Rajasekaran via llvm-commits
• [llvm] 5efb69f - [NFC][llvm][docs] Fix alphabetical order of commands (#178519)   via llvm-commits
• [llvm] [NFC][llvm][docs] Fix alphabetical order of commands (PR #178519)   Prabhu Rajasekaran via llvm-commits
• [llvm] [InstCombine] Require 'contract' flag on operands for mul tan, cos to sin transformation (PR #180249)   Kshitij Paranjape via llvm-commits
• [llvm] [InstCombine] Require 'contract' flag on operands for mul tan, cos to sin transformation (PR #180249)   via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Yingwei Zheng via llvm-commits
• [llvm] 28042a8 - [Hexagon] Add global region scaffolding (#179541)   via llvm-commits
• [llvm] [Hexagon] Add global region scaffolding (PR #179541)   Fateme Hosseini via llvm-commits
• [llvm] [DebugInfo] Fix an assertion in DWARFTypePrinter (PR #178986)   Peter Rong via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Yingwei Zheng via llvm-commits
• [llvm] [bazel][mlir][AMDGPU] Port #180112: Add td dep (PR #180248)   Jordan Rupprecht via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [libsycl] Add lit configuration files and basic test (PR #177407)   Kseniya Tikhomirova via llvm-commits
• [llvm] [InstCombine] Require 'contract' flag on operands for mul tan, cos to sin transformation (PR #180249)   Kshitij Paranjape via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators (PR #179336)   Andrei Elovikov via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 1 - Setup skeleton (PR #178796)   Demetrius Kanios via llvm-commits
• [llvm] [VPlan] Ignore poison incoming values when creating blend (PR #180005)   Ramkumar Ramachandra via llvm-commits
• [compiler-rt] [scudo] Move getResidentPages function (PR #180247)   via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #174731)   Henrik G. Olsson via llvm-commits
• [llvm] Revert "[llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling" (PR #180252)   Henrik G. Olsson via llvm-commits
• [llvm] [objcopy][Wasm] Make strip-all remove all non-engine-interpreted sections (PR #180246)   Alon Zakai via llvm-commits
• [llvm] Revert "[llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling" (PR #180252)   via llvm-commits
• [llvm] Revert "[llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling" (PR #180252)   Henrik G. Olsson via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove a couple of SUBREG_TO_REG from instruction selection. (PR #180253)   David Green via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove a couple of SUBREG_TO_REG from instruction selection. (PR #180253)   via llvm-commits
• [llvm] [SPIRV] Legalize extended integers for compare instructions. (PR #180254)   Faijul Amin via llvm-commits
• [llvm] [SPIRV] Legalize extended integers for compare instructions. (PR #180254)   via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   via llvm-commits
• [llvm] [SPIRV] Legalize extended integers for compare instructions. (PR #180254)   via llvm-commits
• [llvm] [NewPM] Port x86-cleanup-local-dynamic-tls (PR #179864)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAG] Fix fptoui.sat expansion using minnum/maxnum (PR #180178)   via llvm-commits
• [llvm] [SelectionDAG] Fix fptoui.sat expansion using minnum/maxnum (PR #180178)   via llvm-commits
• [llvm] [SelectionDAG] Fix fptoui.sat expansion using minnum/maxnum (PR #180178)   via llvm-commits
• [llvm] [SelectionDAG] Fix fptoui.sat expansion using minnum/maxnum (PR #180178)   via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 1 - Setup skeleton (PR #178796)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 1 - Setup skeleton (PR #178796)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 1 - Setup skeleton (PR #178796)   Derek Schuff via llvm-commits
• [llvm] [AMDGPU][True16] add true16 pattern for cvt_pk_fp32_f8 (PR #180096)   Stanislav Mekhanoshin via llvm-commits
• [llvm] [objcopy][Wasm] Make strip-all remove all non-engine-interpreted sections (PR #180246)   Brendan Dahl via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove a couple of SUBREG_TO_REG from instruction selection. (PR #180253)   Amara Emerson via llvm-commits
• [llvm] Revert "[SCEVExp] Use SCEVPtrToAddr in tryToReuseLCSSAPhi if possible." (PR #180257)   Florian Hahn via llvm-commits
• [llvm] cb90560 - Revert "[SCEVExp] Use SCEVPtrToAddr in tryToReuseLCSSAPhi if possible." (#180257)   via llvm-commits
• [llvm] Revert "[SCEVExp] Use SCEVPtrToAddr in tryToReuseLCSSAPhi if possible." (PR #180257)   Florian Hahn via llvm-commits
• [llvm] Revert "[SCEVExp] Use SCEVPtrToAddr in tryToReuseLCSSAPhi if possible." (PR #180257)   via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Ramkumar Ramachandra via llvm-commits
• [llvm] [InstructionSimplify] Extend simplifyICmpWithZero to handle equivalent zero RHS (PR #179055)   Yingwei Zheng via llvm-commits
• [llvm] [InstructionSimplify] Extend simplifyICmpWithZero to handle equivalent zero RHS (PR #179055)   Yingwei Zheng via llvm-commits
• [llvm] [InstructionSimplify] Extend simplifyICmpWithZero to handle equivalent zero RHS (PR #179055)   Yingwei Zheng via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   Craig Topper via llvm-commits
• [llvm] [doc] Update clang docs for PTX generation (PR #172588)   Philipp Schrader via llvm-commits
• [llvm] [objcopy][Wasm] Make strip-all remove all non-engine-interpreted sections (PR #180246)   Sam Clegg via llvm-commits
• [llvm] [objcopy][Wasm] Make strip-all remove all non-engine-interpreted sections (PR #180246)   Derek Schuff via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] [InstCombine] Require 'contract' flag on operands for mul tan, cos to sin transformation (PR #180249)   Matt Arsenault via llvm-commits
• [llvm] 734eb95 - [Tablegen] Don't emit decoder tables with islands larger than 64 bits (#179651)   via llvm-commits
• [llvm] [Tablegen] Don't emit decoder tables with islands larger than 64 bits (PR #179651)   Sam Elliott via llvm-commits
• [llvm] [InstCombine] Require 'contract' flag on operands for mul tan, cos to sin transformation (PR #180249)   Matt Arsenault via llvm-commits
• [llvm] 019ecdf - [SystemZ][GOFF] Implement emitGlobalAlias for GOFF/HLASM (#180041)   via llvm-commits
• [llvm] [SystemZ][GOFF] Implement emitGlobalAlias for GOFF/HLASM (PR #180041)   Tony Tao via llvm-commits
• [clang] [llvm] [Offload][SYCL] Refactoring: get rid of newline separators (PR #180274)   Yury Plyakhin via llvm-commits
• [llvm] [Tablegen] Don't emit decoder tables with islands larger than 64 bits (PR #179651)   Sam Elliott via llvm-commits
• [clang] [llvm] [Offload][SYCL] Refactoring: get rid of newline separators (PR #180274)   Joseph Huber via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Grigory Pastukhov via llvm-commits
• [llvm] ef22f0b - [gn] port 9976e5702f05a40 (WebAssembly GISel)   Nico Weber via llvm-commits
• [lld] [lld][Hexagon] Fix R_HEX_TPREL_11_X relocation on duplex instructions (PR #179860)   Brian Cain via llvm-commits
• [llvm] [LV] Support conditional scalar assignments of masked operations (PR #178862)   Kewen Meng via llvm-commits
• [llvm] Revert "[LV] Support conditional scalar assignments of masked operations" (PR #180275)   Kewen Meng via llvm-commits
• [clang] [llvm] [Offload][SYCL] Refactoring: get rid of newline separators (PR #180274)   Nick Sarnie via llvm-commits
• [llvm] Revert "[LV] Support conditional scalar assignments of masked operations" (PR #180275)   Kewen Meng via llvm-commits
• [llvm] Revert "[LV] Support conditional scalar assignments of masked operations" (PR #180275)   via llvm-commits
• [llvm] Revert "[LV] Support conditional scalar assignments of masked operations" (PR #180275)   via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   Yingwei Zheng via llvm-commits
• [llvm] [RISCV] Generate landing pad based on cf-protection-branch flag only (PR #179960)   Sam Elliott via llvm-commits
• [llvm] [InstCombine] Fold ordered fadd reductions to `llvm.vector.reduce.fadd` (PR #180196)   Sander de Smalen via llvm-commits
• [llvm] [RISCV] Use addd/subd for i64 add/sub for RV32+P. (PR #180129)   Sam Elliott via llvm-commits
• [clang] [llvm] InstCombine: Use SimplifyDemandedFPClass on fmul (PR #177490)   Yingwei Zheng via llvm-commits
• [compiler-rt] a4c8e75 - [asan][AIX] Change #ifdef to #if for AIX guard (#180280)   via llvm-commits
• [compiler-rt] [asan][AIX] Change #ifdef to #if for AIX guard (PR #180280)   Jake Egan via llvm-commits
• [llvm] bf4f5d2 - [X86][test] Auto-generate test checks for some cfi tests. NFC (#177248)   via llvm-commits
• [llvm] [X86][test] Auto-generate test checks for some cfi tests. NFC (PR #177248)   Mikhail Gudim via llvm-commits
• [clang] [llvm] InstCombine: Use SimplifyDemandedFPClass on fmul (PR #177490)   Yingwei Zheng via llvm-commits
• [clang] [llvm] InstCombine: Use SimplifyDemandedFPClass on fmul (PR #177490)   Yingwei Zheng via llvm-commits
• [clang] [libcxx] [llvm] [libcxx] renames `__split_buffer` alias template to `_SplitBuffer` (PR #180284)   Christopher Di Bella via llvm-commits
• [llvm] [AMDGPU] Enable sinking of free vector ops that will be folded into their uses (PR #162580)   Gheorghe-Teodor Bercea via llvm-commits
• [lld] [lld][Hexagon] Fix TLS GD PLT to only create PLT entry for __tls_get_… (PR #180297)   Brian Cain via llvm-commits
• [llvm] [NVPTX] Scalarize v2f32 instructions if input operand guarantees need for register coalescing (PR #180113)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] Scalarize v2f32 instructions if input operand guarantees need for register coalescing (PR #180113)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] Scalarize v2f32 instructions if input operand guarantees need for register coalescing (PR #180113)   Princeton Ferro via llvm-commits
• [llvm] [NVPTX] Scalarize v2f32 instructions if input operand guarantees need for register coalescing (PR #180113)   Princeton Ferro via llvm-commits
• [llvm] [WebAssembly] Print type signature and table for call_indirect (PR #179120)   Heejin Ahn via llvm-commits
• [llvm] [NVPTX] Scalarize v2f32 instructions if input operand guarantees need for register coalescing (PR #180113)   Princeton Ferro via llvm-commits
• [llvm] [WebAssembly] Print type signature and table for call_indirect (PR #179120)   Heejin Ahn via llvm-commits
• [lld] [lld][Hexagon] Fix TLS GD PLT to only create PLT entry for __tls_get_… (PR #180297)   via llvm-commits
• [lld] [lld][Hexagon] Fix TLS GD PLT to only create PLT entry for __tls_get_… (PR #180297)   via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   via llvm-commits
• [llvm] [WebAssembly] Print type signature and table for call_indirect (PR #179120)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 1 - Setup skeleton (PR #178796)   Derek Schuff via llvm-commits
• [llvm] [NVPTX] Scalarize v2f32 instructions if input operand guarantees need for register coalescing (PR #180113)   via llvm-commits
• [llvm] [NVPTX] Scalarize v2f32 instructions if input operand guarantees need for register coalescing (PR #180113)   via llvm-commits
• [llvm] [AMDGPU] Enable sinking of free vector ops that will be folded into their uses (PR #162580)   Gheorghe-Teodor Bercea via llvm-commits
• [llvm] [Bazel] NFC refactor out redundant is_x86_64_non_windows config (PR #180296)   via llvm-commits
• [llvm] [NVPTX] Scalarize v2f32 instructions if input operand guarantees need for register coalescing (PR #180113)   via llvm-commits
• [llvm] [NVPTX] Scalarize v2f32 instructions if input operand guarantees need for register coalescing (PR #180113)   via llvm-commits
• [llvm] [Bazel] NFC refactor out redundant is_x86_64_non_windows config (PR #180296)   via llvm-commits
• [llvm] [JumpThreading] Preserve assume instructions to maintain constraint information (PR #176600)   Bu Le via llvm-commits
• [llvm] [SPIRV] Legalize extended integers for compare instructions. (PR #180254)   Faijul Amin via llvm-commits
• [llvm] [AMDGPU] Add more cases to the "this is a wave ID" recognizer (PR #177713)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Add more cases to the "this is a wave ID" recognizer (PR #177713)   Krzysztof Drewniak via llvm-commits
• [llvm] [AMDGPU] Add more cases to the "this is a wave ID" recognizer (PR #177713)   Krzysztof Drewniak via llvm-commits
• [llvm] [SPIRV] Legalize extended integers for compare instructions. (PR #180254)   Faijul Amin via llvm-commits
• [llvm] [SPIRV] Legalize extended integers for compare instructions. (PR #180254)   Faijul Amin via llvm-commits
• [llvm] [AMDGPU] Improve AMDGPU sqrt and inverse sqrt handling for bf16 (PR #180291)   Alex Wang via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   via llvm-commits
• [llvm] Port gisel cse analysis to npm (PR #179815)   Gergo Stomfai via llvm-commits
• [llvm] [FlowSensitive] [StatusOr] Add test fixture target to Bazel (PR #180302)   Florian Mayer via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   via llvm-commits
• [llvm] [obj2yaml] Support SHT_LLVM_BB_ADDR_MAP version 5 (PR #180303)   Aiden Grossman via llvm-commits
• [llvm] [obj2yaml] Support SHT_LLVM_BB_ADDR_MAP version 5 (PR #180303)   via llvm-commits
• [compiler-rt] [NFC] Fix format specifier (PR #138563)   Florian Mayer via llvm-commits
• [llvm] [DebugInfo] Fix an assertion in DWARFTypePrinter (PR #178986)   Peter Rong via llvm-commits
• [llvm] [X86] Fold shift into GF2P8AFFINEQB instruction (PR #180019)   via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #174731)   LLVM Continuous Integration via llvm-commits
• [llvm] [SandboxIR] Delete SandboxIR/SandboxVectorizer (PR #166417)   via llvm-commits
• [llvm] [NFC] [MemoryTagging] pass AllocaInfo to isStandardLifetime (PR #180311)   Florian Mayer via llvm-commits
• [llvm] [NFC] [MemoryTagging] pass AllocaInfo to isStandardLifetime (PR #180311)   via llvm-commits
• [llvm] [NFC] [MemoryTagging] pass AllocaInfo to isStandardLifetime (PR #180311)   via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Add an initial set of InstAliases for P extension. (PR #180315)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add an initial set of InstAliases for P extension. (PR #180315)   via llvm-commits
• [llvm] [RISCV] Add missing instruction tests to rv64p-valid.s. NFC (PR #180316)   Craig Topper via llvm-commits
• [llvm] [RISCV] Add missing instruction tests to rv64p-valid.s. NFC (PR #180316)   via llvm-commits
• [llvm] [RISCV] Remove non-alias tests from rv32zbb-aliases-valid.s and rv64zbb-aliases-valid.s. NFC (PR #180317)   Craig Topper via llvm-commits
• [llvm] [RISCV] Remove non-alias tests from rv32zbb-aliases-valid.s and rv64zbb-aliases-valid.s. NFC (PR #180317)   via llvm-commits
• [clang] [llvm] [AMDGPU] Asynchronous operations with explicit marks and waits (PR #173259)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Asynchronous operations with explicit marks and waits (PR #173259)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [MachinePipeliner] Remove isLoopCarriedDep and use DDG (PR #174394)   Ankit Aggarwal via llvm-commits
• [compiler-rt] [asan][AIX] Add vec_malloc and vec_calloc interceptors (PR #175584)   Jake Egan via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [clang] [llvm] [DSE] Make DSE eliminate stores to objects with a sized dead_on_return (PR #173694)   Henrik G. Olsson via llvm-commits
• [clang] [llvm] [DSE] Make DSE eliminate stores to objects with a sized dead_on_return (PR #173694)   Aiden Grossman via llvm-commits
• [compiler-rt] a362593 - [X86] AMD Zen 6 Initial enablement (#179150)   via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   via llvm-commits
• [llvm] [RISCV] Lower disjoint shuffle of shuffles to MERGE-GATHER sequence (PR #178095)   Ryan Buchner via llvm-commits
• [llvm] [RISCV] Lower disjoint shuffle of shuffles to MERGE-GATHER sequence (PR #178095)   Ryan Buchner via llvm-commits
• [llvm] [NFCI][Analysis] Extract alloca slice analysis from SROA (PR #179593)   Jameson Nash via llvm-commits
• [llvm] 2a2a394 - [SPIRV] Optimize getAllocatedType calls in LegalizeZeroSizeArrays (#179068)   via llvm-commits
• [llvm] [SPIRV] Optimize getAllocatedType calls in LegalizeZeroSizeArrays (PR #179068)   Jameson Nash via llvm-commits
• [clang] [llvm] [DSE] Make DSE eliminate stores to objects with a sized dead_on_return (PR #173694)   Henrik G. Olsson via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for atomicrmw ops (PR #175257)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for G_ATOMICRMW_FADD (PR #175257)   Anshil Gandhi via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for G_ATOMICRMW_FADD (PR #175257)   Anshil Gandhi via llvm-commits
• [clang] [compiler-rt] [llvm] [X86] AMD Zen 6 Initial enablement (PR #179150)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Add legalization rules for G_ATOMICRMW_FADD (PR #175257)   Anshil Gandhi via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [llvm] [SPIRV] Optimize getAllocatedType calls in LegalizeZeroSizeArrays (PR #179068)   LLVM Continuous Integration via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   Ryan Mitchell via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   Ryan Mitchell via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   Ryan Mitchell via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   via llvm-commits
• [llvm] Revert "[MC][TableGen] Expand Opcode field of MCInstrDesc" (PR #180321)   Vladimir Vereschaka via llvm-commits
• [llvm] Revert "[MC][TableGen] Expand Opcode field of MCInstrDesc" (PR #180321)   via llvm-commits
• [llvm] Revert "[MC][TableGen] Expand Opcode field of MCInstrDesc" (PR #180321)   via llvm-commits
• [llvm] Revert "[MC][TableGen] Expand Opcode field of MCInstrDesc" (PR #180321)   via llvm-commits
• [llvm] Revert "[MC][TableGen] Expand Opcode field of MCInstrDesc" (PR #180321)   via llvm-commits
• [llvm] Revert "[MC][TableGen] Expand Opcode field of MCInstrDesc" (PR #180321)   via llvm-commits
• [llvm] Revert "[MC][TableGen] Expand Opcode field of MCInstrDesc" (PR #180321)   via llvm-commits
• [llvm] [obj2yaml] Support SHT_LLVM_BB_ADDR_MAP version 5 (PR #180303)   Micah Weston via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   Pranshu Goyal via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   via llvm-commits
• [llvm] 19d6811 - Revert "[MC][TableGen] Expand Opcode field of MCInstrDesc" (#180321)   via llvm-commits
• [llvm] Revert "[MC][TableGen] Expand Opcode field of MCInstrDesc" (PR #180321)   Vladimir Vereschaka via llvm-commits
• [llvm] [FastISel] Get right type for value from fast isel (PR #180322)   Luo Yuanke via llvm-commits
• [llvm] [FastISel] Get right type for value from fast isel (PR #180322)   via llvm-commits
• [llvm] [X86][SelectionDAG] Register type affect DAG ISel (PR #179446)   Luo Yuanke via llvm-commits
• [llvm] [SelectionDAG] Remove `NoSignedZerosFPMath` in dag combiner (PR #180130)   via llvm-commits
• [llvm] chore(deps): update [github] update gha dependencies (PR #176676)   Mend Renovate via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Chris Cotter via llvm-commits
• [llvm] [mlir] [clang-tidy] pro-type-vararg: Allow type-generic builtins in variadic functions #179845 (PR #179896)   Saksham Singhal via llvm-commits
• [llvm] [SPIRV] Add handling for `uinc_wrap` and `udec_wrap` atomics (PR #179114)   Lleu Yang via llvm-commits
• [compiler-rt] [llvm] [tsan] Introduce Adaptive Delay Scheduling to TSAN (PR #178836)   Chris Cotter via llvm-commits
• [llvm] [RISCV] Lower disjoint shuffle of shuffles to MERGE-GATHER sequence (PR #178095)   Luke Lau via llvm-commits
• [llvm] [RISCV] Lower disjoint shuffle of shuffles to MERGE-GATHER sequence (PR #178095)   Luke Lau via llvm-commits
• [llvm] [SelectionDAG] Remove `NoSignedZerosFPMath` in dag combiner (PR #180130)   via llvm-commits
• [llvm] [WebAssembly] Print type signature and table for call_indirect (PR #179120)   Heejin Ahn via llvm-commits
• [llvm] [WebAssembly] Print type signature and table for call_indirect (PR #179120)   Heejin Ahn via llvm-commits
• [llvm] [X86] Fold shift into GF2P8AFFINEQB instruction (PR #180019)   Abhiram Jampani via llvm-commits
• [llvm] [SelectionDAG] Remove `NoSignedZerosFPMath` in dag combiner (PR #180130)   via llvm-commits
• [llvm] [X86] Fold shift into GF2P8AFFINEQB instruction (PR #180019)   Abhiram Jampani via llvm-commits
• [llvm] 15c9c77 - [MIPS] Do not silently ignore musttail (#178310)   via llvm-commits
• [llvm] [MIPS] Do not silently ignore musttail (PR #178310)   Djordje Todorovic via llvm-commits
• [llvm] [SelectionDAG] Remove `NoSignedZerosFPMath` in dag combiner (PR #180130)   via llvm-commits
• [llvm] [SDAG] Implement SplitVecOp for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)   Benjamin Maxwell via llvm-commits
• [llvm] [InstCombine] Require 'contract' flag on operands for mul tan, cos to sin transformation (PR #180249)   Kshitij Paranjape via llvm-commits
• [llvm] [InstCombine] Require 'contract' flag on operands for mul tan, cos to sin transformation (PR #180249)   Kshitij Paranjape via llvm-commits
• [llvm] [X86] Fold shift into GF2P8AFFINEQB instruction (PR #180019)   via llvm-commits
• [llvm] [X86] Fold shift into GF2P8AFFINEQB instruction (PR #180019)   via llvm-commits
• [llvm] [SDAG] Implement SplitVecOp for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Implement SplitVecOp for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)   Matt Arsenault via llvm-commits
• [llvm] [SDAG] Implement SplitVecOp for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)   Matt Arsenault via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   Matt Arsenault via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for buffer atomic swap (PR #180265)   Matt Arsenault via llvm-commits
• [llvm] Revert "[MC][TableGen] Expand Opcode field of MCInstrDesc" (PR #180321)   LLVM Continuous Integration via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Matt Arsenault via llvm-commits
• [llvm] [NFC][LLVM][IPO] Remove pass initialization from pass constructors (PR #180154)   Matt Arsenault via llvm-commits
• [llvm] [NFC][LLVM][IPO] Remove pass initialization from pass constructors (PR #180154)   Matt Arsenault via llvm-commits
• [llvm] [InstCombine] Fold ordered fadd reductions to `llvm.vector.reduce.fadd` (PR #180196)   Matt Arsenault via llvm-commits
• [llvm] [SCEVExp] Use SCEVPtrToAddr in tryToReuseLCSSAPhi if possible. (PR #178727)   Martin Storsjö via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] [AMDGPU][True16] add true16 pattern for cvt_pk_fp32_f8 (PR #180096)   Matt Arsenault via llvm-commits
• [llvm] [RISCV] Add support for forming WMULSU during type legalization. (PR #180331)   Craig Topper via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] [RISCV] Add support for forming WMULSU during type legalization. (PR #180331)   via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] AMDGPU/GlobalISel: RegBankLegalize rules for amdgcn_sffbh (PR #180099)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] [FastISel] Get right type for value from fast isel (PR #180322)   Matt Arsenault via llvm-commits
• [llvm] [FastISel] Get right type for value from fast isel (PR #180322)   Matt Arsenault via llvm-commits
• [llvm] [FastISel] Get right type for value from fast isel (PR #180322)   Matt Arsenault via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in GobalISel emitters (PR #180143)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] [AMDGPU] Optimize S_OR_B32 to S_ADDK_I32 where possible (PR #177949)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Optimize S_OR_B32 to S_ADDK_I32 where possible (PR #177949)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Optimize S_OR_B32 to S_ADDK_I32 where possible (PR #177949)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Fix pattern selecting fmul to v_fma_mix_f32 (PR #180210)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] wasm: recognize `any_true` and `all_true` (PR #155885)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] [AMDGPU] Add more cases to the "this is a wave ID" recognizer (PR #177713)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] [SDAG] Implement SplitVecOp for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Implement SplitVecOp for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)   Benjamin Maxwell via llvm-commits
• [llvm] [SDAG] Implement SplitVecOp for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add DPP16 Row Share optimization for llvm.amdgcn.wave.shuffle (PR #177470)   LLVM Continuous Integration via llvm-commits
• [llvm] [SDAG] Implement SplitVecOp for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)   Benjamin Maxwell via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU][GFX12.5] Reimplement monitor load as an atomic operation (PR #177343)   Matt Arsenault via llvm-commits
• [llvm] 6c6fb00 - [AMDGPU] Optimize S_OR_B32 to S_ADDK_I32 where possible (#177949)   via llvm-commits
• [llvm] [AMDGPU] Optimize S_OR_B32 to S_ADDK_I32 where possible (PR #177949)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Optimize S_OR_B32 to S_ADDK_I32 where possible (PR #177949)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add custom lowering for G_FMODF (PR #180152)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add custom lowering for G_FMODF (PR #180152)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add custom lowering for G_FMODF (PR #180152)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add custom lowering for G_FMODF (PR #180152)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16] change vdst_in regclass for cvt_pk_f8_fp32 pattern (PR #179995)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] WIP: [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   YongKang Zhu via llvm-commits
• [llvm] [SDAG] Implement SplitVecOp for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)   Benjamin Maxwell via llvm-commits
• [llvm] [InstCombine] Fold ordered fadd reductions to `llvm.vector.reduce.fadd` (PR #180196)   David Green via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add custom lowering for G_FMODF (PR #180152)   Alex Wang via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   David Green via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add custom lowering for G_FMODF (PR #180152)   Alex Wang via llvm-commits
• [llvm] [AMDGPU] Improve AMDGPU sqrt and inverse sqrt handling for bf16 (PR #180291)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] fix eliminateFrameIndex to use SGPR frame index (PR #178991)   Matt Arsenault via llvm-commits
• [llvm] [ForceFunctionAttrs] Fix handling of `alwaysinline` and `noinline` attributes. (PR #180026)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU/GlobalISel: Regbanklegalize rules for G_FSQRT (PR #179817)   Matt Arsenault via llvm-commits
• [llvm] [MC][TableGen] Expand Opcode field of MCInstrDesc (PR #179652)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add lowering for G_FMODF (PR #180152)   Alex Wang via llvm-commits
• [llvm] [SDAG] Implement SplitVecOp for `ISD::VECTOR_FIND_LAST_ACTIVE` (PR #180290)   Benjamin Maxwell via llvm-commits
• [llvm] 269fda1 - [AMDGPU] Fix pattern selecting fmul to v_fma_mix_f32 (#180210)   via llvm-commits
• [llvm] [AMDGPU] Fix pattern selecting fmul to v_fma_mix_f32 (PR #180210)   Jay Foad via llvm-commits
• [llvm] [MIPS] Fix argument size in Fast ISel (PR #180336)   Djordje Todorovic via llvm-commits
• [llvm] [MIPS] Fix argument size in Fast ISel (PR #180336)   via llvm-commits
• [llvm] [MIPS] Fix argument size in Fast ISel (PR #180336)   Djordje Todorovic via llvm-commits
• [llvm] [ValueTracking] Treat fmul NaN sign bit as unknown to prevent incorrect fabs folding (PR #180339)   Nathiyaa Sengodan via llvm-commits
• [llvm] [ValueTracking] Treat fmul NaN sign bit as unknown to prevent incorrect fabs folding (PR #180339)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic #164385 (PR #165109)   Sietze Riemersma via llvm-commits
• [clang] [llvm] [AArch64] Add support for intent to read prefetch intrinsic (PR #179709)   David Green via llvm-commits
• [llvm] [InstCombine] Fold ordered fadd reductions to `llvm.vector.reduce.fadd` (PR #180196)   Benjamin Maxwell via llvm-commits
• [llvm] WIP: [bolt][aarch64] Change indirect call instrumentation snippet (PR #180229)   Alexey Moksyakov via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Sietze Riemersma via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Sietze Riemersma via llvm-commits
• [llvm] [ValueTracking] Treat fmul NaN sign bit as unknown to prevent incorrect fabs folding (PR #180339)   Nathiyaa Sengodan via llvm-commits
• [clang] [compiler-rt] [llvm] ubsan: Add loop detection runtime and e2e tests for -fsanitize-trap-loop. (PR #179011)   Michał Górny via llvm-commits
• [llvm] [InstSimplify] Discard unnecessary `select` when the conditions are `ICmps` with EQ (PR #179183)   Yingwei Zheng via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Nikita Popov via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Nikita Popov via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Nikita Popov via llvm-commits
• [compiler-rt] [compiler-rt] [ubsan] Fix missing include directory (PR #180341)   Michał Górny via llvm-commits
• [clang] [compiler-rt] [llvm] ubsan: Add loop detection runtime and e2e tests for -fsanitize-trap-loop. (PR #179011)   Michał Górny via llvm-commits
• [compiler-rt] [compiler-rt] [ubsan] Fix missing include directory (PR #180341)   via llvm-commits
• [llvm] [llubi] Add initial support for llubi (PR #180022)   Yingwei Zheng via llvm-commits
• [llvm] [SelectionDAG] Remove `NoSignedZerosFPMath` in dag combiner (PR #180130)   via llvm-commits
• [llvm] [SelectionDAG] Remove `NoSignedZerosFPMath` in dag combiner (PR #180130)   via llvm-commits
• [llvm] [SelectionDAG] Remove `NoSignedZerosFPMath` in dag combiner (PR #180130)   via llvm-commits
• [llvm] [AMDGPU] Optimize S_OR_B32 to S_ADDK_I32 where possible (PR #177949)   LLVM Continuous Integration via llvm-commits
• [llvm] [SelectionDAGBuilder] Remove NoNaNsFPMath uses (PR #169904)   Matt Arsenault via llvm-commits
• [compiler-rt] [compiler-rt] [ubsan] Fix missing include directory (PR #180341)   Sam James via llvm-commits
• [compiler-rt] [compiler-rt] [ubsan] Fix missing include directory (PR #180341)   Sam James via llvm-commits
• [compiler-rt] [compiler-rt] [ubsan] Fix missing include directory (PR #180341)   Michał Górny via llvm-commits
• [compiler-rt] 806ad88 - [compiler-rt] [ubsan] Fix missing include directory (#180341)   via llvm-commits
• [compiler-rt] [compiler-rt] [ubsan] Fix missing include directory (PR #180341)   Michał Górny via llvm-commits
• [llvm] [SelectionDAG] Remove `NoSignedZerosFPMath` in dag combiner (PR #180130)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Remove `NoSignedZerosFPMath` in dag combiner (PR #180130)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Remove `NoSignedZerosFPMath` in dag combiner (PR #180130)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add lowering for G_FMODF (PR #180152)   Matt Arsenault via llvm-commits
• [llvm] 8d20783 - [InstCombine] Shrink added constant using LHS known zeros (#174380)   via llvm-commits
• [llvm] [InstCombine] Shrink added constant using LHS known zeros (PR #174380)   via llvm-commits
• [llvm] [AMDGPU] Improving multi memory operands after 3e1e86ef (PR #180027)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improving multi memory operands after 3e1e86ef (PR #180027)   Matt Arsenault via llvm-commits
• [llvm] [IROutliner] Correctly Replace Outlined Constants with Arguments (PR #179885)   Matt Arsenault via llvm-commits
• [llvm] [IROutliner] Correctly Replace Outlined Constants with Arguments (PR #179885)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Make a few WaitcntBracket member functions private (PR #180018)   Matt Arsenault via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [clang] [llvm] [llvm][DebugInfo] Avoid attaching retained nodes to unrelated subprograms in DIBuilder (PR #180294)   Vladislav Dzhidzhoev via llvm-commits
• [compiler-rt] [compiler-rt] [ubsan] Fix missing include directory (PR #180341)   Martin Storsjö via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Matt Arsenault via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Matt Arsenault via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Matt Arsenault via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Matt Arsenault via llvm-commits
• [llvm] 9e8caa7 - [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (#174341)   via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Remove `NoSignedZerosFPMath` in dag combiner (PR #180130)   via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Sietze Riemersma via llvm-commits
• [llvm] llvm-cov: Fix a grammar error (PR #179450)   Benjamin Maxwell via llvm-commits
• [llvm] llvm-cov: Fix a grammar error (PR #179450)   Benjamin Maxwell via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Sietze Riemersma via llvm-commits
• [llvm] [InstCombine] Shrink added constant using LHS known zeros (PR #174380)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Sietze Riemersma via llvm-commits
• [llvm] [InstCombine] Shrink added constant using LHS known zeros (PR #174380)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmaf128 into a header only. (PR #177873)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmaf128 into a header only. (PR #177873)   Muhammad Bassiouni via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Sietze Riemersma via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmaf128 into a header only. (PR #177873)   Muhammad Bassiouni via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (PR #165156)   Sietze Riemersma via llvm-commits
• [clang] [llvm] [HLSL][DXIL][SPRIV] Added WaveActiveProduct intrinsic #164385 (PR #165109)   Sietze Riemersma via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmal to Header Only. (PR #179069)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmal to Header Only. (PR #179069)   Muhammad Bassiouni via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] [libc][math] Refactor asinpif16 to Header Only (PR #179021)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor asinpif16 to Header Only (PR #179021)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor asinpif16 to Header Only (PR #179021)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor asinpif16 to Header Only (PR #179021)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor asinpif16 to Header Only (PR #179021)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor asinpif16 to Header Only (PR #179021)   Muhammad Bassiouni via llvm-commits
• [clang] [llvm] [Clang][inlineasm] Add special support for "rm" output constraints (PR #92040)   Bill Wendling via llvm-commits
• [libc] [llvm] [libc][math] Refactor logb implementation to header-only (PR #175719)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor logb implementation to header-only (PR #175719)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor logb implementation to header-only (PR #175719)   Muhammad Bassiouni via llvm-commits
• [llvm] wasm: recognize `any_true` and `all_true` (PR #155885)   Folkert de Vries via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Luo Yuanke via llvm-commits
• [libc] [llvm] [libc][math] Refactor tanhf16 implementation to header-only in src/__support/math folder. (PR #178645)   Muhammad Bassiouni via llvm-commits
• [llvm] wasm: recognize `any_true` and `all_true` (PR #155885)   Folkert de Vries via llvm-commits
• [libc] [llvm] [libc][math] Refactor llogbl to be header-only and constexpr (PR #175376)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor llogbl to be header-only and constexpr (PR #175376)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor llogbl to be header-only and constexpr (PR #175376)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor llogbl to be header-only and constexpr (PR #175376)   Muhammad Bassiouni via llvm-commits
• [llvm] [LLVM-Tablegen] Explicit Type Constraints for Overloaded LLVM Intrinsics (PR #172442)   Rahul Joshi via llvm-commits
• [llvm] [LLVM-Tablegen] Explicit Type Constraints for Overloaded LLVM Intrinsics (PR #172442)   Rahul Joshi via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] [ValueTracking] Propagate sign information out of loop (PR #175590)   Matt Arsenault via llvm-commits
• [llvm] [ValueTracking] Propagate sign information out of loop (PR #175590)   Matt Arsenault via llvm-commits
• [llvm] 7054a4b - [ValueTracking] Propagate sign information out of loop (#175590)   via llvm-commits
• [llvm] [ValueTracking] Propagate sign information out of loop (PR #175590)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Add `wave_id` and `wave_shuffle` Clang builtins. (PR #179492)   Matt Arsenault via llvm-commits
• [clang] [llvm] [AMDGPU] Add `wave_id` and `wave_shuffle` Clang builtins. (PR #179492)   Matt Arsenault via llvm-commits
• [llvm] [mlir] [clang-tidy] pro-type-vararg: Allow type-generic builtins in variadic functions #179845 (PR #179896)   Stefan Weigl-Bosker via llvm-commits
• [libc] [llvm] [libc][math] Refactor sqrtf128 to header only (PR #177760)   Muhammad Bassiouni via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Florian Hahn via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   LLVM Continuous Integration via llvm-commits
• [llvm] [mlir] [clang-tidy] pro-type-vararg: Allow type-generic builtins in variadic functions #179845 (PR #179896)   Saksham Singhal via llvm-commits
• [llvm] [ValueTracking] Propagate sign information out of loop (PR #175590)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] [libc][math] Refactor sqrtf128 to header only (PR #177760)   via llvm-commits
• [llvm] [ValueTracking] Propagate sign information out of loop (PR #175590)   LLVM Continuous Integration via llvm-commits
• [libc] [llvm] [libc][math] Refactor sqrtf128 to header only (PR #177760)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmal to Header Only. (PR #179069)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmal to Header Only. (PR #179069)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor sqrtf128 to header only (PR #177760)   via llvm-commits
• [llvm] e890821 - [LSR] Support SCEVPtrToAddr in SCEVDbgValueBuilder.   Florian Hahn via llvm-commits
• [libc] [llvm] [libc][math] Refactor sqrtf128 to header only (PR #177760)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor sqrtf128 to header only (PR #177760)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor sqrtf128 to header only (PR #177760)   via llvm-commits
• [llvm] [SCEVExp] Use SCEVPtrToAddr in tryToReuseLCSSAPhi if possible. (PR #178727)   Florian Hahn via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmal to Header Only. (PR #179069)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmal to Header Only. (PR #179069)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmal to Header Only. (PR #179069)   Muhammad Bassiouni via llvm-commits
• [llvm] [IVDesc] Check loop-preheader for loop-legality when pass-remarks enabled (PR #166310)   Florian Hahn via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffmal to Header Only. (PR #179069)   via llvm-commits
• [llvm] SimplifyCFG: fold trivial non-empty blocks with safe instructions (PR #180350)   Ridham Khurana via llvm-commits
• [llvm] SimplifyCFG: fold trivial non-empty blocks with safe instructions (PR #180350)   via llvm-commits
• [llvm] SimplifyCFG: fold trivial non-empty blocks with safe instructions (PR #180350)   via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] [ValueTracking] Propagate sign information out of loop (PR #175590)   LLVM Continuous Integration via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Shilei Tian via llvm-commits
• [llvm] SelectionDAG: Improve expandFMINIMUM_FMAXIMUM (PR #137367)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Improve expandFMINIMUM_FMAXIMUM (PR #137367)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Improve expandFMINIMUM_FMAXIMUM (PR #137367)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Improve expandFMINIMUM_FMAXIMUM (PR #137367)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Improve expandFMINIMUM_FMAXIMUM (PR #137367)   Matt Arsenault via llvm-commits
• [llvm] SelectionDAG: Improve expandFMINIMUM_FMAXIMUM (PR #137367)   Matt Arsenault via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Shilei Tian via llvm-commits
• [llvm] [AMDGPU] Add register pressure guard on LLVM-IR level to prevent harmful optimizations (PR #171267)   Matt Arsenault via llvm-commits
• [llvm] [RegisterCoalescer] The COPY with the implicit-def of super register is not coalescable. (PR #169997)   Matt Arsenault via llvm-commits
• [llvm] [RegisterCoalescer] The COPY with the implicit-def of super register is not coalescable. (PR #169997)   Matt Arsenault via llvm-commits
• [llvm] [RegisterCoalescer] The COPY with the implicit-def of super register is not coalescable. (PR #169997)   Matt Arsenault via llvm-commits
• [llvm] [NFC][LiveStacks] Use vectors instead of map and unordred_map (PR #165477)   Matt Arsenault via llvm-commits
• [llvm] [NFC][LiveStacks] Use vectors instead of map and unordred_map (PR #165477)   Matt Arsenault via llvm-commits
• [llvm] [NFC][LiveStacks] Use vectors instead of map and unordred_map (PR #165477)   Matt Arsenault via llvm-commits
• [llvm] SimplifyCFG: fold trivial non-empty blocks with safe instructions (PR #180350)   Nikita Popov via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Vlad Serebrennikov via llvm-commits
• [llvm] [MachineSSAUpdater][AMDGPU] Add faster version of MachineSSAUpdater class. (PR #145722)   Matt Arsenault via llvm-commits
• [llvm] [MachineSSAUpdater][AMDGPU] Add faster version of MachineSSAUpdater class. (PR #145722)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] add G_ROTL, G_ROTR to computeKnownBits (PR #166365)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] add G_ROTL, G_ROTR to computeKnownBits (PR #166365)   Matt Arsenault via llvm-commits
• [llvm] [SeparateConstOffsetFromGEP] Extend handling of ExtractBase (PR #163241)   Matt Arsenault via llvm-commits
• [llvm] IR: Add verifier plugins for intrinsic verification (PR #159415)   Matt Arsenault via llvm-commits
• [llvm] Add more generic `half` tests (NFC) (PR #157211)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Use V_FMAC_F64 in "if (cond) a -= c" (PR #168710)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Use V_FMAC_F64 in "if (cond) a -= c" (PR #168710)   Matt Arsenault via llvm-commits
• [llvm] f52f97b - [SLP][NFC]Add another shl-to-add modeling test, NFC   Alexey Bataev via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Matt Arsenault via llvm-commits
• [llvm] llvm-cov: Fix a grammar error (PR #179450)   via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Matt Arsenault via llvm-commits
• [llvm] llvm-cov: Fix a grammar error (PR #179450)   via llvm-commits
• [llvm] [ValueTracking] Propagate sign information out of loop (PR #175590)   Yingwei Zheng via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Vlad Serebrennikov via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Vlad Serebrennikov via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Vlad Serebrennikov via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Tom Stellard via llvm-commits
• [llvm] [AMDGPU] Cgscc amdgpu attributor (PR #179719)   Shilei Tian via llvm-commits
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• [llvm] [NFC][LiveStacks] Use vectors instead of map and unordred_map (PR #165477)   Matt Arsenault via llvm-commits
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• [llvm] [GlobalISel] add G_ROTL, G_ROTR to computeKnownBits (PR #166365)   Matt Arsenault via llvm-commits
• [llvm] [GlobalISel] add G_ROTL, G_ROTR to computeKnownBits (PR #166365)   via llvm-commits
• [llvm] [AMDGPU] Insert readfirstlane for uniform VGPR arguments (PR #178198)   Shilei Tian via llvm-commits
• [clang] [llvm] [clang] Add `-verify-directives` cc1 flag (PR #179835)   Vlad Serebrennikov via llvm-commits
• [llvm] [AArch64][GlobalISel] Do not run the Localizer at -O0 (PR #177359)   David Green via llvm-commits
• [llvm] [ValueTracking] Propagate sign information out of loop (PR #175590)   Kshitij Paranjape via llvm-commits
• [llvm] SimplifyCFG: fold trivial non-empty blocks with safe instructions (PR #180350)   Ridham Khurana via llvm-commits
• [llvm] SimplifyCFG: fold trivial non-empty blocks with safe instructions (PR #180350)   Ridham Khurana via llvm-commits
• [llvm] SimplifyCFG: fold trivial non-empty blocks with safe instructions (PR #180350)   Ridham Khurana via llvm-commits
• [llvm] Enable generic overlapping optimization for memmove (PR #177885)   Osama Abdelkader via llvm-commits
• [llvm] [AArch64][GISel] length aware BITCAST between different-element-width fixed vectors (PR #179123)   Shakil Ahmed via llvm-commits
• [llvm] Enable generic overlapping optimization for memmove (PR #177885)   Osama Abdelkader via llvm-commits
• [clang] [libclc] [llvm] [AMDGPU] Define new target gfx1170 (PR #180185)   LLVM Continuous Integration via llvm-commits
• [clang] [llvm] [AMDGPU] Add `wave_id` and `wave_shuffle` Clang builtins. (PR #179492)   Alex Voicu via llvm-commits
• [llvm] SimplifyCFG: fold trivial non-empty blocks with safe instructions (PR #180350)   Nikita Popov via llvm-commits
• [clang] [llvm] [AMDGPU] Add `wave_id` and `wave_shuffle` Clang builtins. (PR #179492)   Alex Voicu via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Qinkun Bao via llvm-commits
• [llvm] Revert "[SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo" (PR #180352)   Qinkun Bao via llvm-commits
• [llvm] Revert "[SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo" (PR #180352)   Qinkun Bao via llvm-commits
• [llvm] Revert "[SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo" (PR #180352)   via llvm-commits
• [llvm] [ValueTracking] Propagate sign information out of loop (PR #175590)   Martin Storsjö via llvm-commits
• [llvm] SimplifyCFG: fold trivial non-empty blocks with safe instructions (PR #180350)   Ridham Khurana via llvm-commits
• [llvm] SimplifyCFG: fold trivial non-empty blocks with safe instructions (PR #180350)   Ridham Khurana via llvm-commits
• [llvm] [ValueTracking] Propagate sign information out of loop (PR #175590)   Paul Kirth via llvm-commits
• [llvm] [ValueTracking] Propagate sign information out of loop (PR #175590)   Qinkun Bao via llvm-commits
• [llvm] Revert "[ValueTracking] Propagate sign information out of loop" (PR #180354)   Qinkun Bao via llvm-commits
• [llvm] Revert "[ValueTracking] Propagate sign information out of loop" (PR #180354)   Qinkun Bao via llvm-commits
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• [clang] [clang-tools-extra] [libcxx] [llvm] [libc++] LWG4012: common_view::begin/end are missing the simple-view check (PR #153674)   A. Jiang via llvm-commits
• [llvm] Revert "[ValueTracking] Propagate sign information out of loop" (PR #180354)   via llvm-commits
• [llvm] wasm: recognize `any_true` and `all_true` (PR #155885)   Folkert de Vries via llvm-commits
• [llvm] workflows/release-asset-audit: Split workflow into two jobs (PR #179833)   Tom Stellard via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Kshitij Paranjape via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Kshitij Paranjape via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Kshitij Paranjape via llvm-commits
• [llvm] [ValueTracking] Propagate sign information out of loop (PR #175590)   Kshitij Paranjape via llvm-commits
• [llvm] 2a74e02 - Revert "[SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo" (#180352)   via llvm-commits
• [llvm] Revert "[SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo" (PR #180352)   Qinkun Bao via llvm-commits
• [llvm] wasm: recognize `any_true` and `all_true` (PR #155885)   Folkert de Vries via llvm-commits
• [llvm] [Mips] Custom lowering of SET_ROUNDING, GET_ROUNDING (PR #170047)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16][CodeGen] si-fix-sgpr-copies legalize size mismatched V2S copy with subreg case (PR #161290)   Matt Arsenault via llvm-commits
• [llvm] 43905d6 - Revert "[ValueTracking] Propagate sign information out of loop" (#180354)   via llvm-commits
• [llvm] Revert "[ValueTracking] Propagate sign information out of loop" (PR #180354)   Qinkun Bao via llvm-commits
• [llvm] [AMDGPU] Disable dpp src1 sgpr on gfx11 (PR #164241)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Disable dpp src1 sgpr on gfx11 (PR #164241)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improved Lowering of abs(i8/i16) and -abs(i8/i16) (PR #165626)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Optimize rotate instruction selection patterns (PR #143551)   Matt Arsenault via llvm-commits
• [llvm] 8bced61 - [NFC][ADT] add NumDigitsBase10 to MathExtra and update some current users (#165479)   via llvm-commits
• [llvm] [NFC][ADT] add NumDigitsBase10 to MathExtra and update some current users (PR #165479)   Matt Arsenault via llvm-commits
• [llvm] [CGP] Do not eliminate blocks which have their address taken (PR #163962)   Matt Arsenault via llvm-commits
• [llvm] [CGP] Do not eliminate blocks which have their address taken (PR #163962)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16] add true16 pattern for cvt_pk_fp32_f8 (PR #180096)   Brox Chen via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Matt Arsenault via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Matt Arsenault via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Matt Arsenault via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Matt Arsenault via llvm-commits
• [llvm] [NFC][LLVM][IPO] Remove pass initialization from pass constructors (PR #180154)   Aiden Grossman via llvm-commits
• [clang] [llvm] [llvm][opt][Transforms][SPIR-V] Enable `InferAddressSpaces` for SPIR-V (PR #110897)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Add module flag to control TBUFFER combining (PR #156454)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16] si-fold-operand selecting srcidx for v_mov_b16_t16_e64 (PR #162101)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][True16] change vdst_in regclass for cvt_pk_f8_fp32 pattern (PR #179995)   Brox Chen via llvm-commits
• [llvm] 8b5e95b - [InferAddressSpaces] Initialize op(generic const, generic const, ...) -> generic (#172143)   via llvm-commits
• [llvm] [InferAddressSpaces] Initialize op(generic const, generic const, ...) -> generic (PR #172143)   Hongyu Chen via llvm-commits
• [compiler-rt] [asan][AIX] Add vec_malloc and vec_calloc interceptors (PR #175584)   Hubert Tong via llvm-commits
• [llvm] [AMDGPU] Constrain AV->VReg if we do not exceed RP thresholds (PR #150086)   Matt Arsenault via llvm-commits
• [llvm] [LVI][SCCP][CVP] Add basic ConstantFPRange support (PR #111544)   Matt Arsenault via llvm-commits
• [llvm] f72da50 - [obj2yaml] Support SHT_LLVM_BB_ADDR_MAP version 5   via llvm-commits
• [llvm] [obj2yaml] Support SHT_LLVM_BB_ADDR_MAP version 5 (PR #180303)   Aiden Grossman via llvm-commits
• [llvm] [lld][ELF] Remove redundant size check in nopInstrFill (PR #180304)   Aiden Grossman via llvm-commits
• [llvm] [lld][ELF] Remove redundant size check in nopInstrFill (PR #180304)   Fangrui Song via llvm-commits
• [llvm] Fix scalarizer oob crash (PR #180359)   via llvm-commits
• [llvm] [lld][ELF] Remove redundant size check in nopInstrFill (PR #180304)   Aiden Grossman via llvm-commits
• [llvm] Fix scalarizer oob crash (PR #180359)   via llvm-commits
• [lld] be4dbf5 - [lld][ELF] Remove redundant size check in nopInstrFill   via llvm-commits
• [llvm] [lld][ELF] Remove redundant size check in nopInstrFill (PR #180304)   Aiden Grossman via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Kshitij Paranjape via llvm-commits
• [llvm] Fix scalarizer oob crash (PR #180359)   Aiden Grossman via llvm-commits
• [llvm] [Instrumentor] Add Instrumentor pass (PR #138958)   Matt Arsenault via llvm-commits
• [llvm] [Instrumentor] Add Instrumentor pass (PR #138958)   Matt Arsenault via llvm-commits
• [llvm] [Instrumentor] Add Instrumentor pass (PR #138958)   Matt Arsenault via llvm-commits
• [llvm] [Instrumentor] Add Instrumentor pass (PR #138958)   Matt Arsenault via llvm-commits
• [llvm] [Instrumentor] Add Instrumentor pass (PR #138958)   Matt Arsenault via llvm-commits
• [llvm] [Instrumentor] Add Instrumentor pass (PR #138958)   Matt Arsenault via llvm-commits
• [llvm] [Instrumentor] Add Instrumentor pass (PR #138958)   Matt Arsenault via llvm-commits
• [lld] [lld][Hexagon] Fix TLS GD PLT to only create PLT entry for __tls_get_addr (PR #180297)   Yanzuo Liu via llvm-commits
• [lld] [lld][Hexagon] Fix TLS GD PLT to only create PLT entry for __tls_get_addr (PR #180297)   Yanzuo Liu via llvm-commits
• [llvm] Fix scalarizer oob crash (PR #180359)   via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Kshitij Paranjape via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Kshitij Paranjape via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Kshitij Paranjape via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Kshitij Paranjape via llvm-commits
• [llvm] Fix scalarizer oob crash (PR #180359)   via llvm-commits
• [llvm] Enable generic overlapping optimization for memmove (PR #177885)   Osama Abdelkader via llvm-commits
• [llvm] Fix scalarizer oob crash (PR #180359)   Aiden Grossman via llvm-commits
• [llvm] Fix scalarizer oob crash (PR #180359)   Aiden Grossman via llvm-commits
• [llvm] Fix scalarizer oob crash (PR #180359)   Aiden Grossman via llvm-commits
• [llvm] Fix scalarizer oob crash (PR #180359)   Aiden Grossman via llvm-commits
• [llvm] Fix scalarizer oob crash (PR #180359)   Aiden Grossman via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((Mask - AddC) - X) & Mask (PR #174278)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add lowering for G_FMODF (PR #180152)   Alex Wang via llvm-commits
• [llvm] [mlir] [MLIR][Shape] Preserve ub.poison during canonicalization (PR #179896)   Stefan Weigl-Bosker via llvm-commits
• [llvm] [mlir] [MLIR][Shape] Preserve ub.poison during canonicalization (PR #179896)   Stefan Weigl-Bosker via llvm-commits
• [lld] [lld][Hexagon] Fix TLS GD PLT to only create PLT entry for __tls_get_addr (PR #180297)   Fangrui Song via llvm-commits
• [lld] [lld][Hexagon] Fix TLS GD PLT to only create PLT entry for __tls_get_addr (PR #180297)   Fangrui Song via llvm-commits
• [lld] [lld][Hexagon] Fix TLS GD PLT to only create PLT entry for __tls_get_addr (PR #180297)   Fangrui Song via llvm-commits
• [lld] [lld][Hexagon] Fix TLS GD PLT to only create PLT entry for __tls_get_addr (PR #180297)   Fangrui Song via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add lowering for G_FMODF (PR #180152)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add lowering for G_FMODF (PR #180152)   Matt Arsenault via llvm-commits
• [llvm] a947599 - [AMDGPU][GlobalISel] Add lowering for G_FMODF (#180152)   via llvm-commits
• [llvm] [AMDGPU][GlobalISel] Add lowering for G_FMODF (PR #180152)   Matt Arsenault via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   via llvm-commits
• [llvm] [InstCombine] Fix #163110: Fold icmp (shl X, L), (add (shl Y, L), 1<<L) to icmp X, (Y + 1) (PR #165975)   via llvm-commits
• [llvm] [InstCombine] Fix #163110: Fold icmp (shl X, L), (add (shl Y, L), 1<<L) to icmp X, (Y + 1) (PR #165975)   via llvm-commits
• [llvm] [DSE] Handle variable offsets with sized dead_on_return (PR #180364)   Aiden Grossman via llvm-commits
• [llvm] [DSE] Handle variable offsets with sized dead_on_return (PR #180364)   via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Kshitij Paranjape via llvm-commits
• [llvm] [DSE] Handle variable offsets with sized dead_on_return (PR #180364)   Nikita Popov via llvm-commits
• [llvm] [IR] Update docstring for stripAndAccumulateConstantOffset (PR #180365)   Aiden Grossman via llvm-commits
• [llvm] [IR] Update docstring for stripAndAccumulateConstantOffset (PR #180365)   via llvm-commits
• [llvm] 39622a7 - [ProfCheck] Add PreISelIntrinsicLoweringTest to XFail   Aiden Grossman via llvm-commits
• [llvm] [ValueTracking] Treat fmul NaN sign bit as unknown to prevent incorrect fabs folding (PR #180339)   Nathiyaa Sengodan via llvm-commits
• [llvm] wasm: recognize `any_true` and `all_true` (PR #155885)   Nikita Popov via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [lld] [lld][ELF] Add range extension thunks for x86-64 (PR #180266)   Fangrui Song via llvm-commits
• [llvm] [IR] Update docstring for stripAndAccumulateConstantOffset (PR #180365)   Nikita Popov via llvm-commits
• [llvm] [IR] Update docstring for stripAndAccumulateConstantOffset (PR #180365)   Aiden Grossman via llvm-commits
• [llvm] [IR] Update docstring for stripAndAccumulateConstantOffset (PR #180365)   Aiden Grossman via llvm-commits
• [libc] [llvm] [libc] Add RPC helpers for dispatching functions to the host (PR #179085)   Joseph Huber via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   Joseph Huber via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   Joseph Huber via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   Joseph Huber via llvm-commits
• [llvm] ec059d8 - [DSE] Handle variable offsets with sized dead_on_return (#180364)   via llvm-commits
• [llvm] [DSE] Handle variable offsets with sized dead_on_return (PR #180364)   Aiden Grossman via llvm-commits
• [llvm] [X86] Use shift+add/sub for vXi8 splat multiplies (PR #174110)   Cody Cutler via llvm-commits
• [llvm] wasm: recognize `any_true` and `all_true` (PR #155885)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Matt Arsenault via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] 0c4f809 - [VPlan] Compute predicated load/store costs in VPlan. (NFC) (#179129)   via llvm-commits
• [llvm] [VPlan] Compute predicated load/store costs in VPlan. (NFC) (PR #179129)   Florian Hahn via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Rick Gaiser via llvm-commits
• [llvm] [NFCI][Analysis] Extract alloca slice analysis from SROA (PR #179593)   Jameson Nash via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Rick Gaiser via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Rick Gaiser via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Rick Gaiser via llvm-commits
• [llvm] [BOLT] Don't fold hot text mover functions in ICF (PR #180367)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Don't fold hot text mover functions in ICF (PR #180367)   via llvm-commits
• [llvm] Fix scalarizer oob crash (PR #180359)   via llvm-commits
• [llvm] [Mips] Add r5900 (PlayStation 2 Emotion Engine) FPU Support (PR #178942)   Rick Gaiser via llvm-commits
• [llvm] Reapply "[MemCpyOpt] support offset slices for performStackMoveOptzn and processMemCpy", with bug fixed (PR #180002)   Jameson Nash via llvm-commits
• [llvm] Fix scalarizer oob crash (PR #180359)   via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Haoren Wang via llvm-commits
• [llvm] [AMDGPU] Improved Lowering of abs(i8/i16) and -abs(i8/i16) (PR #165626)   Patrick Simmons via llvm-commits
• [llvm] Revert "Revert "[SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo"" (PR #180368)   Haoren Wang via llvm-commits
• [llvm] Revert "Revert "[SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo"" (PR #180368)   via llvm-commits
• [llvm] Revert "Revert "[SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo"" (PR #180368)   Haoren Wang via llvm-commits
• [llvm] Revert "Revert "[SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo"" (PR #180368)   via llvm-commits
• [llvm] [AMDGPU] Improved Lowering of abs(i8/i16) and -abs(i8/i16) (PR #165626)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improved Lowering of abs(i8/i16) and -abs(i8/i16) (PR #165626)   Patrick Simmons via llvm-commits
• [llvm] [AMDGPU] Improved Lowering of abs(i8/i16) and -abs(i8/i16) (PR #165626)   Patrick Simmons via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   via llvm-commits
• [llvm] [NFC][LiveStacks] Use vectors instead of map and unordred_map (PR #165477)   via llvm-commits
• [llvm] [VPlan] Support masked VPInsts, use for predication (NFC) (PR #142285)   Florian Hahn via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Benjamin Maxwell via llvm-commits
• [llvm] workflows/release-asset-audit: Split workflow into two jobs (PR #179833)   Tom Stellard via llvm-commits
• [llvm] workflows/release-asset-audit: Split workflow into two jobs (PR #179833)   via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Benjamin Maxwell via llvm-commits
• [llvm] [NFC] Various Cleanup in StackColoring, StackSlotColoring, LiveStacks (PR #143931)   via llvm-commits
• [llvm] [NFC] Various Cleanup in StackColoring, StackSlotColoring, LiveStacks (PR #143931)   via llvm-commits
• [llvm] 88dff28 - [AMDGPU][SIInsertWaitcnts][NFC] Make a few WaitcntBracket member functions private (#180018)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Make a few WaitcntBracket member functions private (PR #180018)   via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Nikita Popov via llvm-commits
• [llvm] llvm-cov: Fix a grammar error (PR #179450)   Benjamin Maxwell via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Benjamin Maxwell via llvm-commits
• [llvm] [Docs][Intrisics] Fix the name of llvm.memset.inline in the documentation (PR #180373)   Nicolas IOOSS via llvm-commits
• [llvm] [Docs][Intrisics] Fix the name of llvm.memset.inline in the documentation (PR #180373)   via llvm-commits
• [llvm] [Docs][Intrisics] Fix the name of llvm.memset.inline in the documentation (PR #180373)   via llvm-commits
• [llvm] [AMDGPU][SIInsertWaitcnts][NFC] Make a few WaitcntBracket member functions private (PR #180018)   LLVM Continuous Integration via llvm-commits
• [llvm] [BOLT] Don't fold hot text mover functions in ICF (PR #180367)   Amir Ayupov via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   Folkert de Vries via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   Ryan Mitchell via llvm-commits
• [llvm] [VPlan] Compute predicated load/store costs in VPlan. (NFC) (PR #179129)   Nikita Popov via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   Folkert de Vries via llvm-commits
• [llvm] [SPIRV] Fix APInt overflow in memset constant array creation (PR #180189)   Dmitry Sidorov via llvm-commits
• [polly] [Polly] Update isl to isl-0.27-78-gfc484e00 (PR #180377)   Michael Kruse via llvm-commits
• [polly] [Polly] Update isl to isl-0.27-78-gfc484e00 (PR #180377)   Michael Kruse via llvm-commits
• [polly] [Polly] Update isl to isl-0.27-78-gfc484e00 (PR #180377)   via llvm-commits
• [polly] [Polly] Update isl to isl-0.27-78-gfc484e00 (PR #180377)   Michael Kruse via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   Ryan Mitchell via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   Ryan Mitchell via llvm-commits
• [polly] ac57c4a - [Polly] Update isl to isl-0.27-78-gfc484e00 (#180377)   via llvm-commits
• [polly] [Polly] Update isl to isl-0.27-78-gfc484e00 (PR #180377)   Michael Kruse via llvm-commits
• [clang] [clang-tools-extra] [libcxx] [llvm] [libc++] LWG4012: common_view::begin/end are missing the simple-view check (PR #153674)   Nhat Nguyen via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Emit MULHU/MULHS/UMUL_LOHI/SMUL_LOHI from our custom XLen*2 expansion. (PR #180379)   Craig Topper via llvm-commits
• [llvm] [RISCV] Emit MULHU/MULHS/UMUL_LOHI/SMUL_LOHI from our custom XLen*2 expansion. (PR #180379)   via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   Ryan Mitchell via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [InferAS] Infer the address space of inttoptr (PR #173244)   Luo Yuanke via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [ASan] Don't mark alloca as safe if address escapes to callee (PR #178591)   Tom Stellard via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [VPlan] Compute predicated load/store costs in VPlan. (NFC) (PR #179129)   via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [Hexagon] Add global region scaffolding (PR #179541)   LLVM Continuous Integration via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [X86] Reimplement bundle alignment mode (PR #175830)   Fangrui Song via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Alexander Richardson via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Alexander Richardson via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Alexander Richardson via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Alexander Richardson via llvm-commits
• [llvm] [polly] [SCEV] Use SCEVPtrToAddr instead of SCEVPtrToInt in SCEV. (PR #180244)   Alexander Richardson via llvm-commits
• [polly] [Polly] Honor 'scops' phase being disabled (PR #180380)   Michael Kruse via llvm-commits
• [llvm] [AMDGPU] Improve AMDGPU sqrt and inverse sqrt handling for bf16 (PR #180291)   Alex Wang via llvm-commits
• [llvm] [AMDGPU] Improve AMDGPU sqrt and inverse sqrt handling for bf16 (PR #180291)   Alex Wang via llvm-commits
• [llvm] [DA] Fixing correctness issues in StrongSIV test (PR #178047)   Ehsan Amiri via llvm-commits
• [llvm] MC: Move generateCompactUnwindEncodings to MCObjectStreamer. NFC (PR #180381)   Fangrui Song via llvm-commits
• [llvm] MC: Move generateCompactUnwindEncodings to MCObjectStreamer. NFC (PR #180381)   Fangrui Song via llvm-commits
• [llvm] [AMDGPU] Add module flag to control TBUFFER combining (PR #156454)   Harrison Hao via llvm-commits
• [llvm] [AMDGPU] Improve AMDGPU sqrt and inverse sqrt handling for bf16 (PR #180291)   Alex Wang via llvm-commits
• [llvm] 62e93fe - MC: Move generateCompactUnwindEncodings to MCObjectStreamer. NFC (#180381)   via llvm-commits
• [llvm] MC: Move generateCompactUnwindEncodings to MCObjectStreamer. NFC (PR #180381)   Fangrui Song via llvm-commits
• [llvm] [RISCV] Combine ADDD with UMUL_LOHI/SMUL_LOHI into WMACCU/WMACC (PR #180383)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine ADDD with UMUL_LOHI/SMUL_LOHI into WMACCU/WMACC (PR #180383)   via llvm-commits
• [llvm] [FastISel] Get right type for value from fast isel (PR #180322)   Luo Yuanke via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Luo Yuanke via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Luo Yuanke via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Luo Yuanke via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Luo Yuanke via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Luo Yuanke via llvm-commits
• [llvm] 3aac5e0 - [PowerPC] Use MCAssembler::getEmitter instead of getEmitterPtr. NFC   Fangrui Song via llvm-commits
• [llvm] 10a0f40 - [SLP][NFC]Add another shl-to-add modeling case   Alexey Bataev via llvm-commits
• [llvm] [X86] Fold shift into GF2P8AFFINEQB instruction (PR #180019)   Abhiram Jampani via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Luo Yuanke via llvm-commits
• [llvm] [AArch64][GlobalISel] Remove a couple of SUBREG_TO_REG from instruction selection. (PR #180253)   Amara Emerson via llvm-commits
• [llvm] [NFC][AMDGPU] Add a test to show the impact of wrong `s_mov_b64` instruction size (PR #180386)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Add a test to show the impact of wrong `s_mov_b64` instruction size (PR #180386)   Shilei Tian via llvm-commits
• [llvm] [NFC][AMDGPU] Add a test to show the impact of wrong `s_mov_b64` instruction size (PR #180386)   via llvm-commits
• [llvm] [ConstantRange] Expand makeAllowedICmpRegion to use samesign to give tighter range (PR #174355)   Adar Dagan via llvm-commits
• [llvm] 74aa875 - MC: Remove unused overload and delete stale comment. NFC   Fangrui Song via llvm-commits
• [llvm] [BOLT] Don't fold hot text mover functions in ICF (PR #180367)   Maksim Panchenko via llvm-commits
• [llvm] [Bolt] Replace -1ULL/-2ULL/-3ULL with std::numeric_limits in DataAggregator (PR #178597)   via llvm-commits
• [llvm] [ProfCheck] Add utility to get a MDNode for unknown branch weights (PR #180389)   Aiden Grossman via llvm-commits
• [llvm] [ProfCheck] Add utility to get a MDNode for unknown branch weights (PR #180389)   via llvm-commits
• [llvm] [ProfCheck] Add utility to get a MDNode for unknown branch weights (PR #180389)   Snehasish Kumar via llvm-commits
• [llvm] [ProfCheck] Add utility to get a MDNode for unknown branch weights (PR #180389)   Snehasish Kumar via llvm-commits
• [llvm] [ProfCheck] Add utility to get a MDNode for unknown branch weights (PR #180389)   Snehasish Kumar via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   via llvm-commits
• [llvm] [ProfCheck] Add utility to get a MDNode for unknown branch weights (PR #180389)   Aiden Grossman via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   via llvm-commits
• [lld] [ELF] Add target-specific relocation scanning for x86 (PR #178846)   Fangrui Song via llvm-commits
• [llvm] [NFC][AMDGPU] Add a test to show the impact of wrong `s_mov_b64` instruction size (PR #180386)   Matt Arsenault via llvm-commits
• [clang] [clang-tools-extra] [libcxx] [llvm] [libc++] LWG4012: common_view::begin/end are missing the simple-view check (PR #153674)   A. Jiang via llvm-commits
• [llvm] [LLVM-Tablegen] Explicit Type Constraints for Overloaded LLVM Intrinsics (PR #172442)   Dharuni R Acharya via llvm-commits
• [llvm] [LLVM-Tablegen] Explicit Type Constraints for Overloaded LLVM Intrinsics (PR #172442)   Dharuni R Acharya via llvm-commits
• [llvm] [LLVM-Tablegen] Explicit Type Constraints for Overloaded LLVM Intrinsics (PR #172442)   Dharuni R Acharya via llvm-commits
• [llvm] [ProfCheck] Add utility to get a MDNode for unknown branch weights (PR #180389)   Snehasish Kumar via llvm-commits
• [libc] [llvm] [libc][math] Refactor logb implementation to header-only (PR #175719)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor logb implementation to header-only (PR #175719)   via llvm-commits
• [llvm] [BOLT] Keep folded functions in BinaryFunctions map. NFC (PR #180392)   Maksim Panchenko via llvm-commits
• [llvm] [BOLT] Keep folded functions in BinaryFunctions map. NFC (PR #180392)   via llvm-commits
• [llvm] [LLVM-Tablegen] Explicit Type Constraints for Overloaded LLVM Intrinsics (PR #172442)   Dharuni R Acharya via llvm-commits
• [llvm] [SPARC][IAS] Add lzd alias for lzcnt (PR #179487)   Brad Smith via llvm-commits
• [llvm] [NFC] Various Cleanup in StackColoring, StackSlotColoring, LiveStacks (PR #143931)   Matt Arsenault via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Matt Arsenault via llvm-commits
• [llvm] [MIParser] - Add support for MMRAs (PR #180320)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Improve AMDGPU sqrt and inverse sqrt handling for bf16 (PR #180291)   Alex Wang via llvm-commits
• [llvm] [TTI] Add distinguished shouldVectorizeNTStore/Load (PR #177936)   Tomer Shafir via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Nikita Popov via llvm-commits
• [llvm] [Analysis] isTriviallyVectorizable - add Intrinsic::clmul along with vectorisation tests (PR #180014)   Pranshu Goyal via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   via llvm-commits
• [llvm] [WebAssembly][GlobalISel] Part 2 - CallLowering `lowerFormalArguments` (PR #180263)   Demetrius Kanios via llvm-commits
• [llvm] [cmake] forward LLVM_EXTERNAL_*_SOURCE_DIR to runtimes (PR #180399)   Wenju He via llvm-commits
• [llvm] InstCombine: fold umax/umin(shl(umax/umin(x,C1),s),C3) -> umax/umin(shl(x,s),C3) when safe (#139786) (PR #169943)   via llvm-commits
• [llvm] [X86] Fold shift into GF2P8AFFINEQB instruction (PR #180019)   Abhiram Jampani via llvm-commits
• [llvm] [X86] Fold shift into GF2P8AFFINEQB instruction (PR #180019)   Abhiram Jampani via llvm-commits
• [llvm] [AArch64] Consider MOVaddr* as cheap if fuse-adrp-add (PR #121904)   Guy David via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   Folkert de Vries via llvm-commits
• [llvm] [OFFLOAD] Support host plugin on Windows (PR #180401)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Support host plugin on Windows (PR #180401)   via llvm-commits
• [llvm] [OFFLOAD] Support host plugin on Windows (PR #180401)   via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   Alex Duran via llvm-commits
• [llvm] [OFFLOAD] Support host plugin on Windows (PR #180401)   Alex Duran via llvm-commits
• [llvm] 0d94148 - [X86] optimize 512-bit masked truncated saturating stores (#179130)   via llvm-commits
• [llvm] [X86] Optimized ADC + ADD to ADC (PR #176713)   via llvm-commits
• [llvm] [X86] optimize 512-bit masked truncated saturating stores (PR #179130)   Folkert de Vries via llvm-commits
• [llvm] [X86] Fixed flags issue for onlyZeroFlagUsed (PR #174940)   via llvm-commits
• [llvm] [X86] combine widening `shl` + adjacent addition into `VPMADDWD` (PR #179326)   via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   Folkert de Vries via llvm-commits
• [llvm] [VectorCombine] Fold (icmp eq/ne (reduce.add X), 0) to reduce.umax (PR #180001)   Guy David via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   Folkert de Vries via llvm-commits
• [llvm] [AArch64] optimize vselect of bitcast (PR #180375)   via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Matt Arsenault via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #174341)   Benjamin Maxwell via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lld] [lldb] [llvm] [mlir] simplifyBinaryIntrinsic: Return nan if snan is passed to maxnum/minnum (PR #180105)   YunQiang Su via llvm-commits
• [llvm] simplifyBinaryIntrinsic: Return nan if snan is passed to maxnum/minnum (PR #180105)   YunQiang Su via llvm-commits
• [llvm] [ARM] Replace manual CLS expansion with ISD::CTLS (PR #178430)   Hamza Hassanain via llvm-commits
• [llvm] simplifyBinaryIntrinsic: Return nan if snan is passed to maxnum/minnum (PR #180105)   YunQiang Su via llvm-commits
• [llvm] [X86] Fixed flags issue of onlyZeroFlagUsed (PR #180405)   via llvm-commits
• [llvm] [X86] Fixed flags issue of onlyZeroFlagUsed (PR #180405)   via llvm-commits
• [llvm] [X86] Fixed flags issue of onlyZeroFlagUsed (PR #180405)   via llvm-commits
• [llvm] [VectorCombine] Fold (icmp eq/ne (reduce.add X), 0) to reduce.umax (PR #180001)   Guy David via llvm-commits
• [llvm] [VectorCombine] Fold (icmp eq/ne (reduce.add X), 0) to reduce.umax (PR #180001)   Guy David via llvm-commits
• [llvm] 3192fe2 - [VPlan] Fall back to legacy cost model if PtrSCEV is nullptr.   Florian Hahn via llvm-commits
• [llvm] [SimplifyCFG] Enable icmp-to-switch for direct ret cases (PR #174473)   Nikita Popov via llvm-commits
• [llvm] [VPlan] Compute predicated load/store costs in VPlan. (NFC) (PR #179129)   Florian Hahn via llvm-commits
• [llvm] llvm-cov: Fix a grammar error (PR #179450)   via llvm-commits
• [llvm] llvm-cov: Fix a grammar error (PR #179450)   via llvm-commits
• [llvm] llvm-cov: Fix a grammar error (PR #179450)   via llvm-commits
• [llvm] [X86] Fold expand(splat,passthrough,mask) -> select(splat,passthrough,mask) (PR #180238)   Simon Pilgrim via llvm-commits
• [llvm] llvm-cov: Fix a grammar error (PR #179450)   Benjamin Maxwell via llvm-commits
• [polly] [Polly] Honor 'scops' phase being disabled (PR #180380)   Michael Kruse via llvm-commits
• [llvm] [X86] Use shift+add/sub for vXi8 splat multiplies (PR #174110)   Simon Pilgrim via llvm-commits
• [llvm] [OFFLOAD] Support host plugin on Windows (PR #180401)   Joseph Huber via llvm-commits
• [llvm] Fix emulated TLS alignment for large variables (PR #171037)   Medha Tiwari via llvm-commits
• [llvm] [SimplifyCFG] Enable icmp-to-switch for direct ret cases (PR #174473)   Jannik Glückert via llvm-commits
• [llvm] [MC][COFF] Associate pseudo probe desc section with its function (PR #177540)   Wei Xiao via llvm-commits
• [llvm] [OFFLOAD] Support host plugin on Windows (PR #180401)   Alex Duran via llvm-commits
• [llvm] Fix emulated TLS alignment for large variables (PR #171037)   via llvm-commits
• [llvm] Fix emulated TLS alignment for large variables (PR #171037)   via llvm-commits
• [llvm] [OFFLOAD] Support host plugin on Windows (PR #180401)   Alex Duran via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ehsan Amiri via llvm-commits
• [libc] [llvm] [libc][math] Refactor sinpif16 to header only. (PR #178503)   via llvm-commits
• [lld] [LLD][COFF] Fix out-of-bounds write when filling gaps with INT3 in code sections (PR #180411)   Petr Beneš via llvm-commits
• [lld] [LLD][COFF] Fix out-of-bounds write when filling gaps with INT3 in code sections (PR #180411)   via llvm-commits
• [lld] [LLD][COFF] Fix out-of-bounds write when filling gaps with INT3 in code sections (PR #180411)   via llvm-commits
• [clang] [compiler-rt] [llvm] [AIX] Implement the ifunc attribute. (PR #153049)   LLVM Continuous Integration via llvm-commits
• [llvm] [DAG] TargetLowering::expandCLMUL - avoid ISD::MUL if target hasBitTest (PR #177566)   via llvm-commits
• [llvm] [DAG] TargetLowering::expandCLMUL - avoid ISD::MUL if target hasBitTest (PR #177566)   via llvm-commits
• [llvm] [VPlan] Support masked VPInsts, use for predication (NFC) (PR #142285)   Florian Hahn via llvm-commits
• [llvm] [InstCombine] Avoid overflow in `foldVecExtTruncToExtElt` (PR #180414)   Yingwei Zheng via llvm-commits
• [llvm] [InstCombine] Avoid overflow in `foldVecExtTruncToExtElt` (PR #180414)   via llvm-commits
• [llvm] [InstCombine] Avoid overflow in `foldVecExtTruncToExtElt` (PR #180414)   Yingwei Zheng via llvm-commits
• [libc] [llvm] [libc][math] Refactor sinpif16 to header only. (PR #178503)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor sinpif16 to header only. (PR #178503)   via llvm-commits
• [libc] [llvm] [libc][math] Refactor sinpif16 to header only. (PR #178503)   via llvm-commits
• [llvm] [instcombine][x86]: simplifyx86fpmaxmin - allow negzero for single operand (PR #180418)   Madhur Kumar via llvm-commits
• [llvm] [instcombine][x86]: simplifyx86fpmaxmin - allow negzero for single operand (PR #180418)   via llvm-commits
• [llvm] [instcombine][x86]: simplifyx86fpmaxmin - allow negzero for single operand (PR #180418)   via llvm-commits
• [llvm] [instcombine][x86]: simplifyx86fpmaxmin - allow negzero for single operand (PR #180418)   via llvm-commits
• [llvm] [NFC][LiveStacks] Use vectors instead of map and unordred_map (PR #165477)   Qinkun Bao via llvm-commits
• [llvm] [AMDGPU] Do not use 64-bit literals with VOP3* encodings (PR #156602)   Shilei Tian via llvm-commits
• [llvm] 3c5b054 - [VPlan] Pass underlying instr to getMemoryOpCost in ::computeCost.   Florian Hahn via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   Florian Hahn via llvm-commits
• [llvm] [LV] Fix issue in VPFirstOrderRecurrencePHIRecipe::usesFirstLaneOnly (PR #179977)   Florian Hahn via llvm-commits
• [llvm] Revert "[NFC][LiveStacks] Use vectors instead of map and unordred_map" (PR #180421)   Qinkun Bao via llvm-commits
• [llvm] Revert "[NFC][LiveStacks] Use vectors instead of map and unordred_map" (PR #180421)   Qinkun Bao via llvm-commits
• [llvm] Revert "[NFC][LiveStacks] Use vectors instead of map and unordred_map" (PR #180421)   via llvm-commits
• [llvm] Revert "[NFC][LiveStacks] Use vectors instead of map and unordred_map" (PR #180421)   via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Paul Kirth via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Paul Kirth via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Paul Kirth via llvm-commits
• [llvm] [ValueTracking] Fix crash in PR175590 (PR #180355)   Paul Kirth via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor ffma implementation to header-only in src/__support/math folder (PR #175304)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor logb implementation to header-only (PR #175719)   Muhammad Bassiouni via llvm-commits
• [libc] [llvm] [libc][math] Refactor logb implementation to header-only (PR #175719)   Muhammad Bassiouni via llvm-commits
• [llvm] [VPlan] Add `-vplan-print-after=` option (PR #178700)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add `-vplan-print-after=` option (PR #178700)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add `-vplan-print-after=` option (PR #178700)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Add `-vplan-print-after=` option (PR #178700)   Florian Hahn via llvm-commits
• [llvm] Fix emulated TLS alignment for large variables (PR #171037)   Medha Tiwari via llvm-commits
• [llvm] [DAG] TargetLowering::expandCLMUL - avoid ISD::MUL if target hasBitTest (PR #177566)   Simon Pilgrim via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or), simplify x && true -> x (PR #180048)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Consider MOVaddr* as cheap if fuse-adrp-add (PR #121904)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Consider MOVaddr* as cheap if fuse-adrp-add (PR #121904)   Florian Hahn via llvm-commits
• [llvm] [AArch64] Consider MOVaddr* as cheap if fuse-adrp-add (PR #121904)   Florian Hahn via llvm-commits
• [llvm] 1b0f139 - Revert "[NFC][LiveStacks] Use vectors instead of map and unordred_map" (#180421)   via llvm-commits
• [llvm] Revert "[NFC][LiveStacks] Use vectors instead of map and unordred_map" (PR #180421)   Qinkun Bao via llvm-commits
• [llvm] [VPlan] Support masked VPInsts, use for predication (NFC) (PR #142285)   Florian Hahn via llvm-commits
• [llvm] [MIPS] musttail.ll - regenerate test checks (PR #180423)   Simon Pilgrim via llvm-commits
• [llvm] [MIPS] musttail.ll - regenerate test checks (PR #180423)   Simon Pilgrim via llvm-commits
• [llvm] [MIPS] musttail.ll - regenerate test checks (PR #180423)   via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [llvm] Update [Github] Update GHA Dependencies (PR #176676)   Mend Renovate via llvm-commits
• [clang] [llvm] [clang] Add regalloc PBQP for all targets in clang (PR #166645)   Ivan Shumakov via llvm-commits
• [clang] [llvm] [clang] Add regalloc PBQP for all targets in clang (PR #166645)   Ivan Shumakov via llvm-commits
• [llvm] [WIP][Support] Always scale InstructionCost::Value (PR #178962)   Ryan Buchner via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #180425)   Haoren Wang via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #180425)   via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #180425)   Benjamin Maxwell via llvm-commits
• [llvm] ed9c186 - [MIPS] musttail.ll - regenerate test checks (#180423)   via llvm-commits
• [llvm] [MIPS] musttail.ll - regenerate test checks (PR #180423)   Simon Pilgrim via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [clang] [llvm] [X86] support reserve r8~r15 on X86_64 (PR #180242)   via llvm-commits
• [llvm] [WebAssembly] Print type signature and table for call_indirect (PR #179120)   via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #180425)   Haoren Wang via llvm-commits
• [llvm] [SelectionDAG] Fix null pointer dereference in resolveDanglingDebugInfo (PR #180425)   Haoren Wang via llvm-commits
• [lld] [LLD][COFF] Fix out-of-bounds write when filling gaps with INT3 in code sections (PR #180411)   Alexandre Ganea via llvm-commits
• [llvm] [WebAssembly] Print type signature and table for call_indirect (PR #179120)   via llvm-commits
• [llvm] [WebAssembly] Print type signature and table for call_indirect (PR #179120)   via llvm-commits
• [llvm] [Bolt] Replace -1ULL/-2ULL/-3ULL with std::numeric_limits in DataAggregator (PR #178597)   via llvm-commits
• [llvm] Fix scalarizer oob crash (PR #180359)   via llvm-commits
• [llvm] Move target specific constant folding from ConstantFolding.cpp file (PR #180428)   Ivan Shumakov via llvm-commits
• [llvm] Move target specific constant folding from ConstantFolding.cpp file (PR #180428)   via llvm-commits
• [llvm] Move target specific constant folding from ConstantFolding.cpp file (PR #180428)   Ivan Shumakov via llvm-commits
• [llvm] Move target specific constant folding from ConstantFolding.cpp file (PR #180428)   via llvm-commits
• [llvm] Move target specific constant folding from ConstantFolding.cpp file (PR #180428)   via llvm-commits
• [llvm] [ProfCheck] Add utility to get a MDNode for unknown branch weights (PR #180389)   Aiden Grossman via llvm-commits
• [llvm] Fix scalarizer oob crash (PR #180359)   via llvm-commits
• [llvm] 33291dd - [ProfCheck] Add utility to get a MDNode for unknown branch weights   via llvm-commits
• [llvm] [ProfCheck] Add utility to get a MDNode for unknown branch weights (PR #180389)   Aiden Grossman via llvm-commits
• [lld] [LLD][COFF] Fix out-of-bounds write when filling gaps with INT3 in code sections (PR #180411)   Petr Beneš via llvm-commits
• [llvm] [ProfCheck] Add prof data for lowering of @llvm.cond.loop (PR #180390)   Aiden Grossman via llvm-commits
• [llvm] [InstCombine] Fold ((X + AddC) & Mask) ^ Mask to ((Mask - AddC) - X) & Mask (PR #174278)   via llvm-commits
• [llvm] [ProfCheck] Add prof data for lowering of @llvm.cond.loop (PR #180390)   Aiden Grossman via llvm-commits
• [llvm] 4d5d2ff - [ProfCheck] Add prof data for lowering of @llvm.cond.loop   via llvm-commits
• [llvm] [ProfCheck] Add prof data for lowering of @llvm.cond.loop (PR #180390)   Aiden Grossman via llvm-commits
• [llvm] Fix scalarizer oob crash (PR #180359)   Aiden Grossman via llvm-commits
• [llvm] [MIPS] musttail.ll - regenerate test checks (PR #180423)   LLVM Continuous Integration via llvm-commits
• [lld] [LLD][COFF] Fix out-of-bounds write when filling gaps with INT3 in code sections (PR #180411)   Petr Beneš via llvm-commits
• [llvm] 7509cad - [VPlan] Support masked VPInsts, use for predication (NFC) (#142285)   via llvm-commits
• [llvm] [VPlan] Support masked VPInsts, use for predication (NFC) (PR #142285)   Florian Hahn via llvm-commits
• [llvm] [Docs][Intrisics] Fix the name of llvm.memset.inline in the documentation (PR #180373)   Aiden Grossman via llvm-commits
• [llvm] sketch idea of getConstantBuildVector (PR #180074)   via llvm-commits
• [llvm] [InstCombine] Avoid overflow in `foldVecExtTruncToExtElt` (PR #180414)   Aiden Grossman via llvm-commits
• [llvm] [InstCombine] Avoid overflow in `foldVecExtTruncToExtElt` (PR #180414)   Aiden Grossman via llvm-commits
• [llvm] sketch idea of getConstantBuildVector (PR #180074)   via llvm-commits
• [llvm] Revert "[Inliner] Add option (default off) to inline all calls regardless of the cost" (PR #180431)   Justin Fargnoli via llvm-commits
• [llvm] Revert "[Inliner] Add option (default off) to inline all calls regardless of the cost" (PR #180431)   Justin Fargnoli via llvm-commits
• [llvm] Revert "[Inliner] Add option (default off) to inline all calls regardless of the cost" (PR #180431)   Justin Fargnoli via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Aryan Kadole via llvm-commits
• [llvm] Fix scalarizer oob crash (PR #180359)   via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   Aryan Kadole via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   via llvm-commits
• [llvm] Fix scalarizer oob crash (PR #180359)   via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Pedro Lobo via llvm-commits
• [llvm] workflows/release-task: Use less privileged token for uploading release notes (PR #180299)   Aiden Grossman via llvm-commits
• [llvm] [RISCV] Refactor the MC layer SiFix VCIX classes. (PR #180433)   Craig Topper via llvm-commits
• [llvm] [RISCV] Refactor the MC layer SiFive VCIX classes. (PR #180433)   Craig Topper via llvm-commits
• [llvm] [RISCV] Refactor the MC layer SiFive VCIX classes. (PR #180433)   via llvm-commits
• [llvm] [InstCombine] Avoid overflow in `foldVecExtTruncToExtElt` (PR #180414)   Yingwei Zheng via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [RISCV] Combine ADDD with UMUL_LOHI/SMUL_LOHI into WMACCU/WMACC (PR #180383)   Sam Elliott via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Pedro Lobo via llvm-commits
• [llvm] [RISCV] Emit MULHU/MULHS/UMUL_LOHI/SMUL_LOHI from our custom XLen*2 expansion. (PR #180379)   Sam Elliott via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [AMDGPU] Physical register tracking in GCN trackers. (PR #177223)   Dhruva Chakrabarti via llvm-commits
• [llvm] [RISCV] Add support for forming WMULSU during type legalization. (PR #180331)   Sam Elliott via llvm-commits
• [llvm] [InstCombine] Drop nonnull assumes if the pointer is already known to be nonnull (PR #180434)   Nikolas Klauser via llvm-commits
• [llvm] [InstCombine] Drop nonnull assumes if the pointer is already known to be nonnull (PR #180434)   via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   via llvm-commits
• [llvm] [X86] i512 shift expansion on AVX512 targets (PR #180432)   via llvm-commits
• [llvm] sketch idea of getConstantBuildVector (PR #180074)   via llvm-commits
• [llvm] sketch idea of getConstantBuildVector (PR #180074)   via llvm-commits
• [llvm] sketch idea of getConstantBuildVector (PR #180074)   via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Pedro Lobo via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Pedro Lobo via llvm-commits
• [llvm] [IR] Add initial support for the byte type (PR #178666)   Pedro Lobo via llvm-commits
• [llvm] [InstCombine] Drop nonnull assumes if the pointer is already known to be nonnull (PR #180434)   via llvm-commits
• [llvm] [InstCombine] Drop nonnull assumes if the pointer is already known to be nonnull (PR #180434)   via llvm-commits
• [llvm] [AArch64] Consider MOVaddr* as cheap if fuse-adrp-add (PR #121904)   Guy David via llvm-commits
• [llvm] [AArch64] Consider MOVaddr* as cheap if fuse-adrp-add (PR #121904)   Guy David via llvm-commits
• [llvm] 6324ee3 - [VPlan] Use PredBB's terminator as insert point for VPIRPhi extracts.   Florian Hahn via llvm-commits
• [llvm] a563e6b - [RISCV] Add support for forming WMULSU during type legalization. (#180331)   via llvm-commits
• [llvm] [RISCV] Add support for forming WMULSU during type legalization. (PR #180331)   Craig Topper via llvm-commits
• [llvm] [LoopVectorize] Fix crash in VPWidenRecipe (PR #177357)   Florian Hahn via llvm-commits
• [llvm] [RISCV] Combine ADDD with UMUL_LOHI/SMUL_LOHI into WMACCU/WMACC (PR #180383)   Craig Topper via llvm-commits
• [llvm] [OFFLOAD] Support host plugin on Windows (PR #180401)   via llvm-commits
• [llvm] [OFFLOAD] Support host plugin on Windows (PR #180401)   Joseph Huber via llvm-commits
• [llvm] [RISCV] Emit MULHU/MULHS/UMUL_LOHI/SMUL_LOHI from our custom XLen*2 expansion. (PR #180379)   Craig Topper via llvm-commits
• [llvm] [RISCV] Emit MULHU/MULHS/UMUL_LOHI/SMUL_LOHI from our custom XLen*2 expansion. (PR #180379)   Craig Topper via llvm-commits
• [clang] [clang-tools-extra] [libcxx] [llvm] [libc++] LWG4012: common_view::begin/end are missing the simple-view check (PR #153674)   Nhat Nguyen via llvm-commits
• [llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Reject partial reductions with invalid costs in getScaledReds. (PR #180438)   Florian Hahn via llvm-commits
• [llvm] [VPlan] Reject partial reductions with invalid costs in getScaledReds. (PR #180438)   via llvm-commits
• [llvm] [InstCombine] Drop nonnull assumes if the pointer is already known to be nonnull (PR #180434)   Nikolas Klauser via llvm-commits
• [clang] [llvm] [SPIRV][AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [llvm] [Docs][Intrisics] Fix the name of llvm.memset.inline in the documentation (PR #180373)   Nicolas IOOSS via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   via llvm-commits
• [llvm] [NFC][TableGen] Adopt CodeGenHelpers in GobalISel emitters (PR #180143)   Sam Elliott via llvm-commits
• [llvm] [OFFLOAD] Add support for host offloading device (PR #177307)   via llvm-commits
• [llvm] [PredicateInfo] Fix crash on nonnull assume taking a constant (PR #180440)   Nikolas Klauser via llvm-commits
• [llvm] [PredicateInfo] Fix crash on nonnull assume taking a constant (PR #180440)   via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ehsan Amiri via llvm-commits
• [llvm] [PredicateInfo] Fix crash on nonnull assume taking a constant (PR #180440)   Nikita Popov via llvm-commits
• [llvm] [SelectionDAG][ARM] Add lowering for strict fp16 nodes on systems without fullfp16 (PR #173666)   Erik Enikeev via llvm-commits
• [llvm] [Docs][Intrisics] Fix the name of llvm.memset.inline in the documentation (PR #180373)   Nikita Popov via llvm-commits
• [llvm] c25018b - [Docs][Intrisics] Fix the name of llvm.memset.inline in the documentation (#180373)   via llvm-commits
• [llvm] [Docs][Intrisics] Fix the name of llvm.memset.inline in the documentation (PR #180373)   Nikita Popov via llvm-commits
• [llvm] [Docs][Intrisics] Fix the name of llvm.memset.inline in the documentation (PR #180373)   via llvm-commits
• [llvm] 5c826f5 - [RISCV] Emit MULHU/MULHS/UMUL_LOHI/SMUL_LOHI from our custom XLen*2 expansion. (#180379)   via llvm-commits
• [llvm] [RISCV] Emit MULHU/MULHS/UMUL_LOHI/SMUL_LOHI from our custom XLen*2 expansion. (PR #180379)   Craig Topper via llvm-commits
• [llvm] 769b734 - [RISCV] Combine ADDD with UMUL_LOHI/SMUL_LOHI into WMACCU/WMACC (#180383)   via llvm-commits
• [llvm] [RISCV] Combine ADDD with UMUL_LOHI/SMUL_LOHI into WMACCU/WMACC (PR #180383)   Craig Topper via llvm-commits
• [llvm] [OFFLOAD] Support host plugin on Windows (PR #180401)   via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or), simplify x && true -> x (PR #180048)   Ramkumar Ramachandra via llvm-commits
• [llvm] [OFFLOAD] Support host plugin on Windows (PR #180401)   via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or), simplify x && true -> x (PR #180048)   Ramkumar Ramachandra via llvm-commits
• [llvm] [VPlan] Introduce m_c_Logical(And|Or), simplify x && true -> x (PR #180048)   Ramkumar Ramachandra via llvm-commits
• [clang] [llvm] [SPIRV][AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [clang] [llvm] [SPIRV][AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)   Alex Voicu via llvm-commits
• [llvm] [SCEVExp] Use SCEVPtrToAddr in tryToReuseLCSSAPhi if possible. (PR #178727)   Qinkun Bao via llvm-commits
• [libc] [llvm] [libc] Add RPC helpers for dispatching functions to the host (PR #179085)   Joseph Huber via llvm-commits
• [libc] [llvm] [libc][math] Refactor sinpif16 to header only. (PR #178503)   via llvm-commits
• [lld] [LLD][COFF] Fix out-of-bounds write when filling gaps with INT3 in code sections (PR #180411)   Alexandre Ganea via llvm-commits
• [lld] [LLD][COFF] Fix out-of-bounds write when filling gaps with INT3 in code sections (PR #180411)   Alexandre Ganea via llvm-commits
• [lld] [LLD][COFF] Fix out-of-bounds write when filling gaps with INT3 in code sections (PR #180411)   Alexandre Ganea via llvm-commits
• [lld] [LLD][COFF] Fix out-of-bounds write when filling gaps with INT3 in code sections (PR #180411)   Alexandre Ganea via llvm-commits
• [llvm] 5c5677d - [llvm] Remove "no-infs-fp-math" attribute support (#180083)   via llvm-commits
• [clang] [flang] [llvm] [mlir] [llvm] Remove "no-infs-fp-math" attribute support (PR #180083)   via llvm-commits
• [llvm] [MachinePipeliner] Remove isLoopCarriedDep and use DDG (PR #174394)   Ryotaro Kasuga via llvm-commits
• [llvm] 9892b2a - [DWARFLinker] Make MCTargetOptions a class member. NFC   Fangrui Song via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Luo Yuanke via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Luo Yuanke via llvm-commits
• [clang] [clang-tools-extra] [libcxx] [llvm] [libc++] LWG4012: common_view::begin/end are missing the simple-view check (PR #153674)   A. Jiang via llvm-commits
• [llvm] [DA] Rewrite the formula in the Strong SIV test (PR #179665)   Ryotaro Kasuga via llvm-commits
• [clang] [clang-tools-extra] [libcxx] [llvm] [libc++] LWG4012: common_view::begin/end are missing the simple-view check (PR #153674)   A. Jiang via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Luo Yuanke via llvm-commits
• [llvm] TargetRegistry: Remove deprecated create*Info that take StringRef parameter (PR #180448)   Fangrui Song via llvm-commits
• [llvm] TargetRegistry: Remove deprecated create*Info that take StringRef parameter (PR #180448)   via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #174731)   Ben Shi via llvm-commits
• [llvm] TargetRegistry: Remove deprecated create*Info that take StringRef parameter (PR #180448)   Aiden Grossman via llvm-commits
• [llvm] [MC] Move MCTargetOptions ownership from MCContext to MCAsmInfo (PR #180449)   Fangrui Song via llvm-commits
• [llvm] [MC] Move MCTargetOptions ownership from MCContext to MCAsmInfo (PR #180449)   via llvm-commits
• [llvm] SelectionDAG: Improve expandFMINIMUM_FMAXIMUM (PR #137367)   YunQiang Su via llvm-commits
• [llvm] SelectionDAG: Improve expandFMINIMUM_FMAXIMUM (PR #137367)   YunQiang Su via llvm-commits
• [llvm] [MC] Move MCTargetOptions ownership from MCContext to MCAsmInfo (PR #180449)   Fangrui Song via llvm-commits
• [llvm] TargetRegistry: Remove deprecated create*Info that take StringRef parameter (PR #180448)   Fangrui Song via llvm-commits
• [llvm] TargetRegistry: Remove deprecated create*Info that take StringRef parameter (PR #180448)   Fangrui Song via llvm-commits
• [llvm] TargetRegistry: Remove deprecated create*Info that take StringRef parameter (PR #180448)   Aiden Grossman via llvm-commits
• [clang] [flang] [llvm] [mlir] [llvm] Remove "no-infs-fp-math" attribute support (PR #180083)   LLVM Continuous Integration via llvm-commits
• [llvm] c53acf0 - [SelectionDAGBuilder] Remove NoNaNsFPMath uses (#169904)   via llvm-commits
• [llvm] [SelectionDAGBuilder] Remove NoNaNsFPMath uses (PR #169904)   via llvm-commits
• [llvm] [RISCV] Generate 8alt/16alt version error message for zvfofp8min (PR #180450)   Jim Lin via llvm-commits
• [llvm] [RISCV] Generate 8alt/16alt version error message for zvfofp8min (PR #180450)   via llvm-commits
• [llvm] [RISCV] Update Andes45 vector fixed-point arithmetic scheduling info (PR #180451)   Jim Lin via llvm-commits
• [llvm] [RISCV] Update Andes45 vector fixed-point arithmetic scheduling info (PR #180451)   via llvm-commits
• [llvm] 84b5e9f - [RISCV] Add used callee-saved registers as implicit/implicit-def registers to save/restore call (#180133)   via llvm-commits
• [llvm] [RISCV] Add used callee-saved registers as implicit/implicit-def registers to save/restore call (PR #180133)   Jim Lin via llvm-commits
• [llvm] [MC] Move MCTargetOptions ownership from MCContext to MCAsmInfo (PR #180449)   Aiden Grossman via llvm-commits
• [lld] [lld][Hexagon] Fix R_HEX_TPREL_11_X relocation on duplex instructions (PR #179860)   Fangrui Song via llvm-commits
• [lld] [lld][Hexagon] Fix R_HEX_TPREL_11_X relocation on duplex instructions (PR #179860)   Fangrui Song via llvm-commits
• [lld] [lld][Hexagon] Fix R_HEX_TPREL_11_X relocation on duplex instructions (PR #179860)   Fangrui Song via llvm-commits
• [flang] [llvm] [flang] Implement 'F_C_STRING' library function (Fortran 2023) (PR #174474)   Caroline Newcombe via llvm-commits
• [llvm] [SelectionDAGBuilder] Remove NoNaNsFPMath uses (PR #169904)   LLVM Continuous Integration via llvm-commits
• [llvm] [ConstantFolding] Constant fold nextafter and nexttoward (PR #168794)   Sayan Sivakumaran via llvm-commits
• [llvm] [ConstantFolding] Constant fold nextafter and nexttoward (PR #168794)   Sayan Sivakumaran via llvm-commits
• [llvm] [ConstantFolding] Constant fold nextafter and nexttoward (PR #168794)   Sayan Sivakumaran via llvm-commits
• [llvm] 80f627e - TargetRegistry: Remove deprecated create*Info that take StringRef parameter (#180448)   via llvm-commits
• [llvm] TargetRegistry: Remove deprecated create*Info that take StringRef parameter (PR #180448)   Fangrui Song via llvm-commits
• [llvm] [ConstantFolding] Constant fold nextafter and nexttoward (PR #168794)   Sayan Sivakumaran via llvm-commits
• [llvm] [ConstantFolding] Constant fold nextafter and nexttoward (PR #168794)   Sayan Sivakumaran via llvm-commits
• [llvm] [AArch64][GlobalISel] Fix incorrect codegen for FPR16/FPR8 to GPR copies (PR #171499)   Ian Butterworth via llvm-commits
• [llvm] [ConstantFolding] Constant fold nextafter and nexttoward (PR #168794)   Sayan Sivakumaran via llvm-commits
• [compiler-rt] [asan][AIX] Add vec_malloc and vec_calloc interceptors (PR #175584)   Hubert Tong via llvm-commits
• [clang] [flang] [llvm] [mlir] [llvm] Remove "no-infs-fp-math" attribute support (PR #180083)   LLVM Continuous Integration via llvm-commits
• [llvm] [Scalarizer] Fix out-of-bounds crash (PR #180359)   via llvm-commits
• [llvm] [Mips] Fix cttz.i32 fails to lower on mips16 (PR #179633)   via llvm-commits
• [llvm] [RISCV] Add used callee-saved registers as implicit/implicit-def registers to save/restore call (PR #180133)   Sam Elliott via llvm-commits
• [llvm] [MC][COFF] Associate pseudo probe desc section with its function (PR #177540)   Haohai Wen via llvm-commits
• [llvm] [RISCV] Refactor the MC layer SiFive VCIX classes. (PR #180433)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Refactor the MC layer SiFive VCIX classes. (PR #180433)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Refactor the MC layer SiFive VCIX classes. (PR #180433)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Refactor the MC layer SiFive VCIX classes. (PR #180433)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add used callee-saved registers as implicit/implicit-def registers to save/restore call (PR #180133)   Jim Lin via llvm-commits
• [llvm] [DAGCombiner] Fold trunc(build_vector(ext(x), ext(x)) -> build_vector(x,x) (PR #179857)   Liao Chunyu via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Refactor the MC layer SiFive VCIX classes. (PR #180433)   Craig Topper via llvm-commits
• [llvm] [RISCV] Enable select optimization by default (PR #178394)   Pengcheng Wang via llvm-commits
• [llvm] [DAGCombiner] Fold trunc(build_vector(ext(x), ext(x)) -> build_vector(x,x) (PR #179857)   Liao Chunyu via llvm-commits
• [llvm] [NFC][VPlan] Rename VPEVLBasedIVPHIRecipe to VPCurrentIterationPHIRecipe (PR #177114)   Shih-Po Hung via llvm-commits
• [llvm] TargetRegistry: Remove deprecated create*Info that take StringRef parameter (PR #180448)   LLVM Continuous Integration via llvm-commits
• [llvm] [RISCV] Combine ADDD+WMULSU to WMACCSU (PR #180454)   Craig Topper via llvm-commits
• [llvm] [RISCV] Combine ADDD+WMULSU to WMACCSU (PR #180454)   via llvm-commits
• [llvm] [MC][COFF] Associate pseudo probe desc section with its function (PR #177540)   Haohai Wen via llvm-commits
• [llvm] [RISCV] Enable select optimization by default (PR #178394)   Craig Topper via llvm-commits
• [llvm] [DAGCombiner] Fold trunc(build_vector(ext(x), ext(x)) -> build_vector(x,x) (PR #179857)   Liao Chunyu via llvm-commits
• [llvm] [BOLT][NFC] Stop populating unnecessary samples into MemSamples (PR #179472)   Amir Ayupov via llvm-commits
• [llvm] Fix emulated TLS alignment for large variables (PR #171037)   Medha Tiwari via llvm-commits
• [llvm] [SLP] Use the correct identity when combining binary opcodes with AND/MUL (PR #180457)   Ryan Buchner via llvm-commits
• [llvm] [SLP] Use the correct identity when combining binary opcodes with AND/MUL (PR #180457)   via llvm-commits
• [llvm] Fix emulated TLS alignment for large variables (PR #171037)   Eli Friedman via llvm-commits
• [llvm] bd4784a - [RISCV] Add SpacemiT X100 base scheduling model (#178189)   via llvm-commits
• [llvm] [RISCV] Add SpacemiT X100 base scheduling model (PR #178189)   Mark Zhuang via llvm-commits
• [llvm] [RISCV] Enable select optimization by default (PR #178394)   Pengcheng Wang via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zvabd instructions (PR #180139)   Pengcheng Wang via llvm-commits
• [libc] [llvm] [libc] Add RPC helpers for dispatching functions to the host (PR #179085)   Joseph Huber via llvm-commits
• [llvm] [AArch64] Remove NoNaNsFPMath uses (PR #180462)   via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zvabd instructions (PR #180139)   Craig Topper via llvm-commits
• [llvm] [DA] Fixing correctness issues in StrongSIV test (PR #178047)   Ehsan Amiri via llvm-commits
• [llvm] [SLP] Use the correct identity when combining binary opcodes with AND/MUL (PR #180457)   via llvm-commits
• [llvm] [SLP] Use the correct identity when combining binary opcodes with AND/MUL (PR #180457)   via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #174731)   Ruoyu Qiu via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Luke Lau via llvm-commits
• [lldb] [llvm] [NFC] Ensure MCTargetOptions outlives MCAsmInfo at createMCAsmInfo call sites (PR #180465)   Fangrui Song via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Luke Lau via llvm-commits
• [lldb] [llvm] [NFC] Ensure MCTargetOptions outlives MCAsmInfo at createMCAsmInfo call sites (PR #180465)   via llvm-commits
• [llvm] [ValueTracking] Treat fmul NaN sign bit as unknown to prevent incorrect fabs folding (PR #180339)   Nathiyaa Sengodan via llvm-commits
• [llvm] [ValueTracking] Treat fmul NaN sign bit as unknown to prevent incorrect fabs folding (PR #180339)   via llvm-commits
• [llvm] [ValueTracking] Treat fmul NaN sign bit as unknown to prevent incorrect fabs folding (PR #180339)   via llvm-commits
• [lldb] [llvm] [NFC] Ensure MCTargetOptions outlives MCAsmInfo at createMCAsmInfo call sites (PR #180465)   Fangrui Song via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Luke Lau via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Luke Lau via llvm-commits
• [llvm] [VPlan] Propagate FastMathFlags from phis to blends (PR #180226)   Luke Lau via llvm-commits
• [llvm] [MC] Move MCTargetOptions ownership from MCContext to MCAsmInfo (PR #180449)   Fangrui Song via llvm-commits
• [llvm] [AArch64] Remove NoNaNsFPMath uses (PR #180462)   via llvm-commits
• [llvm] [RISCV] Enable select optimization by default (PR #178394)   Luke Lau via llvm-commits
• [clang] [llvm] [AMDGPU] Asynchronous loads from global/buffer to LDS on pre-GFX12 (PR #180466)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Asynchronous loads from global/buffer to LDS on pre-GFX12 (PR #180466)   via llvm-commits
• [clang] [llvm] [AMDGPU] Asynchronous loads from global/buffer to LDS on pre-GFX12 (PR #180466)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Asynchronous operations with explicit marks and waits (PR #173259)   Sameer Sahasrabuddhe via llvm-commits
• [clang] [llvm] [AMDGPU] Asynchronous operations with explicit marks and waits (PR #173259)   Sameer Sahasrabuddhe via llvm-commits
• [llvm] [AMDGPU] Teach SIPreEmitPeephole pass to preserve MachineLoopInfo (PR #178868)   Carl Ritson via llvm-commits
• [llvm] [AArch64] Remove NoNaNsFPMath uses (PR #180462)   via llvm-commits
• [llvm] [AArch64] Remove NoNaNsFPMath uses (PR #180462)   via llvm-commits
• [llvm] [LoopFusion] Assert failure in the issue 80301 (PR #167837)   Sushant Gokhale via llvm-commits
• [llvm] Reland PR 174731, resolve cyclic dependency issue (PR #180468)   Ruoyu Qiu via llvm-commits
• [llvm] Reland PR 174731, resolve cyclic dependency issue (PR #180468)   via llvm-commits
• [llvm] [llvm-objdump][AVR] Reland PR 174731, resolve cyclic dependency issue (PR #180468)   Ruoyu Qiu via llvm-commits
• [llvm] SelectionDAG: Improve expandFMINIMUM_FMAXIMUM (PR #137367)   YunQiang Su via llvm-commits
• [llvm] [InstCombine] Avoid overflow in `foldVecExtTruncToExtElt` (PR #180414)   Hongyu Chen via llvm-commits
• [llvm] [X86] Add test for VPBLENDW Tuning (PR #179906)   via llvm-commits
• [llvm] [AArch64] Remove NoNaNsFPMath uses (PR #180462)   via llvm-commits
• [llvm] [AArch64] Remove NoNaNsFPMath uses (PR #180462)   via llvm-commits
• [llvm] [AArch64] Remove NoNaNsFPMath uses (PR #180462)   via llvm-commits
• [llvm] [AMDGPU] Remove `NoNaNsFPMath` uses (PR #180469)   via llvm-commits
• [llvm] [AMDGPU] Remove `NoNaNsFPMath` uses (PR #180469)   via llvm-commits
• [llvm] [X86] Optimized ADC + ADD to ADC (PR #176713)   Phoebe Wang via llvm-commits
• [llvm] [DebugInfo/DWARF] Fix data race in DWARFUnit DIE extraction (PR #180470)   Shivam Kunwar via llvm-commits
• [llvm] [DebugInfo/DWARF] Fix data race in DWARFUnit DIE extraction (PR #180470)   via llvm-commits
• [llvm] [AMDGPU] Remove `NoNaNsFPMath` uses (PR #180469)   via llvm-commits
• [llvm] [DebugInfo/DWARF] Fix data race in DWARFUnit DIE extraction (PR #180470)   Shivam Kunwar via llvm-commits
• [llvm] [DebugInfo/DWARF] Fix data race in DWARFUnit DIE extraction (PR #180470)   Shivam Kunwar via llvm-commits
• [llvm] SelectionDAG: Improve expandFMINIMUM_FMAXIMUM (PR #137367)   YunQiang Su via llvm-commits
• [llvm] [Bolt] Replace -1ULL/-2ULL/-3ULL with std::numeric_limits in DataAggregator (PR #178597)   Amir Ayupov via llvm-commits
• [llvm] [Bolt] Replace -1ULL/-2ULL/-3ULL with std::numeric_limits in DataAggregator (PR #178597)   via llvm-commits
• [llvm] [MIPS] Fix argument size in Fast ISel (PR #180336)   Eli Friedman via llvm-commits
• [llvm] [X86] Optimized ADC + ADD to ADC (PR #176713)   via llvm-commits
• [llvm] Fix emulated TLS alignment for large variables (PR #171037)   Medha Tiwari via llvm-commits
• [llvm] fad32ff - [X86] Optimized ADC + ADD to ADC (#176713)   via llvm-commits
• [llvm] [X86] Optimized ADC + ADD to ADC (PR #176713)   via llvm-commits
• [llvm] Fix emulated TLS alignment for large variables (PR #171037)   Medha Tiwari via llvm-commits
• [llvm] 151fade - [RISCV][MC] Support experimental Zvabd instructions   via llvm-commits
• [clang] [llvm] [RISCV][MC] Support experimental Zvabd instructions (PR #180139)   Pengcheng Wang via llvm-commits
• [llvm] [AMDGPU] Remove `NoNaNsFPMath` uses (PR #180469)   via llvm-commits
• [llvm] [AMDGPU] Remove `NoNaNsFPMath` uses (PR #180469)   via llvm-commits
• [llvm] [AMDGPU] Remove `NoNaNsFPMath` uses (PR #180469)   via llvm-commits
• [llvm] [X86] Optimized ADC + ADD to ADC (PR #176713)   LLVM Continuous Integration via llvm-commits
• [llvm] [llvm-ir2vec] Adding BB Embeddings Map API to ir2vec python bindings (PR #180135)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding BB Embeddings Map API to ir2vec python bindings (PR #180135)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   via llvm-commits
• [llvm] [llvm-ir2vec] Adding BB Embeddings Map API to ir2vec python bindings (PR #180135)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] [FastISel] Lower call instruction with illegal type returned (PR #180322)   Luo Yuanke via llvm-commits
• [llvm] [X86] Optimized ADC + ADD to ADC (PR #176713)   via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [NFCI][RTTI][Passes] Make the ID fields const char (PR #179970)   Steffen Larsen via llvm-commits
• [llvm] [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (PR #180472)   via llvm-commits
• [llvm] [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (PR #180472)   via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] [DebugInfo/DWARF] Fix data race in DWARFUnit DIE extraction (PR #180470)   Shivam Kunwar via llvm-commits
• [llvm] [DebugInfo/DWARF] Fix data race in DWARFUnit DIE extraction (PR #180470)   Shivam Kunwar via llvm-commits
• [llvm] [X86] Fix lower1BitShuffle blend-with-zero shuffles to AND mask (PR #180472)   via llvm-commits
• [llvm] [llvm-objdump][AVR] Reland PR 174731, resolve cyclic dependency issue (PR #180468)   Fangrui Song via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-symbolizer] Make symbolizer parse section relative syntax (PR #168524)   via llvm-commits
• [llvm] Adding getFuncNames API to ir2vec python bindings (PR #180473)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-ir2vec] Adding Inst Embeddings Map API to ir2vec python bindings (PR #180140)   Nishant Sachdeva via llvm-commits
• [llvm] Adding getFuncNames API to ir2vec python bindings (PR #180473)   Nishant Sachdeva via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [NFCI][RTTI][Passes] Make the ID fields const char (PR #179970)   Steffen Larsen via llvm-commits
• [clang] [clang-tools-extra] [compiler-rt] [lldb] [llvm] [NFCI][RTTI][Passes] Make the ID fields const char (PR #179970)   Steffen Larsen via llvm-commits
• [llvm] Adding getFuncNames API to ir2vec python bindings (PR #180473)   Nishant Sachdeva via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #180468)   Ruoyu Qiu via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [RISCV] Improve loop by extract reduction instruction (PR #179215)   via llvm-commits
• [llvm] [llvm-objdump][AVR] Detect AVR architecture from ELF flags for disassembling (PR #180468)   Ruoyu Qiu via llvm-commits
• [clang] [llvm] [RISCV][CodeGen] Lower `abds`/`abdu` to `Zvabd` instructions (PR #180141)   Pengcheng Wang via llvm-commits
• [llvm] e992593 - [RISCV][CodeGen] Lower `abds`/`abdu` to `Zvabd` instructions   via llvm-commits
• [clang] [llvm] [RISCV][CodeGen] Lower `abds`/`abdu` to `Zvabd` instructions (PR #180141)   Pengcheng Wang via llvm-commits
• [llvm] [Verifier] Make verifier fail when global variable size exceeds address space size (PR #179625)   Steffen Larsen via llvm-commits
• [llvm] [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (PR #180148)   via llvm-commits
• [llvm] [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (PR #180148)   via llvm-commits
• [llvm] [InstCombine] fold `gepi _, (srem x, y)` to `gepi _, (urem x, y)` if `y` is power-of-2 (PR #180148)   via llvm-commits
• [llvm] [NVPTX] Composable and Extensible Memory Cache Control Hints (PR #175901)   Fei Peng via llvm-commits
• [clang] [llvm] [RISCV][CodeGen] Lower `ISD::ABS` to Zvabd instructions (PR #180142)   Pengcheng Wang via llvm-commits
• [llvm] 972e73b - [RISCV][CodeGen] Lower `ISD::ABS` to Zvabd instructions   via llvm-commits
• [clang] [llvm] [RISCV][CodeGen] Lower `ISD::ABS` to Zvabd instructions (PR #180142)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add cost for @llvm.vector.splice.{left, right} (PR #179219)   Luke Lau via llvm-commits
• [llvm] [RISCV] Add cost for @llvm.vector.splice.{left, right} (PR #179219)   Luke Lau via llvm-commits
• [llvm] [VectorCombine] Optimize vector combine in fold binop of reduction (PR #179416)   via llvm-commits
• [llvm] [ValueLattice][SCCP] Consider provenance for predicate-derived pointer constants (PR #160083)   Antonio Frighetto via llvm-commits
• [lld] [lld] Add explicit std::move(...) to avoid a few vector copies (PR #180474)   via llvm-commits
• [llvm] [ValueLattice][SCCP] Consider provenance for predicate-derived pointer constants (PR #160083)   Antonio Frighetto via llvm-commits
• [lld] [lld] Add explicit std::move(...) to avoid a few vector copies (PR #180474)   via llvm-commits
• [lld] [lld] Add explicit std::move(...) to avoid a few vector copies (PR #180474)   via llvm-commits
• [llvm] [DominanceFrontier] Support post-dominators on graphs with single root (PR #179336)   Luke Lau via llvm-commits
• [llvm] 0c583e7 - AMDGPU: Add llvm.amdgcn.s.wait.event intrinsic (#180170)   via llvm-commits
• [clang] [llvm] AMDGPU: Add llvm.amdgcn.s.wait.event intrinsic (PR #180170)   Matt Arsenault via llvm-commits
• [clang] [llvm] AMDGPU: Add syntax for s_wait_event values (PR #180272)   Matt Arsenault via llvm-commits
• [clang] [llvm] [RISCV][TTI] Adjust the cost of `llvm.abs` intrinsic when `Zvabd` exists (PR #180146)   Pengcheng Wang via llvm-commits
• [llvm] e16f354 - [RISCV][TTI] Adjust the cost of `llvm.abs` intrinsic when `Zvabd` exists   via llvm-commits
• [clang] [llvm] [RISCV][TTI] Adjust the cost of `llvm.abs` intrinsic when `Zvabd` exists (PR #180146)   Pengcheng Wang via llvm-commits
• [llvm] [RISCV] Add cost for @llvm.vector.splice.{left, right} (PR #179219)   Pengcheng Wang via llvm-commits
• [llvm] AMDGPU: Add syntax for s_wait_event values (PR #180272)   Matt Arsenault via llvm-commits
• [llvm] [AMDGPU] Remove `NoNaNsFPMath` uses (PR #180469)   Matt Arsenault via llvm-commits
• [llvm] AMDGPU: Add syntax for s_wait_event values (PR #180272)   Matt Arsenault via llvm-commits