[llvm] [RegisterCoalescer] The COPY with the implicit-def of super register is not coalescable. (PR #169997)

[Matt Arsenault via llvm-commits]

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@@ -507,6 +507,15 @@ bool CoalescerPair::setRegisters(const MachineInstr *MI) {
       if (Src == Dst && SrcSub != DstSub)
         return false;
 
+      // The implicit-def of the super register is zero extended.
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arsenm wrote:

I don't think the zero extending part is real. Yes, a dependence on the high bits needs to be preserved, but I don't think anything is relying on knowing these are 0. Until recently you were allowed to specify other values for the high bits 

https://github.com/llvm/llvm-project/pull/169997