[llvm] [AArch64] Wrap integer SCALAR_TO_VECTOR nodes in bitcasts (PR #172837)

David Green via llvm-commits llvm-commits at lists.llvm.org
Mon Feb 2 04:05:27 PST 2026


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@@ -200,10 +200,27 @@ def dup_v4f32 :
              [(v2f32 (extract_subvector (v4f32 (AArch64duplane32 (v4f32 node:$LHS), node:$RHS)), (i64 0))),
               (v2f32 (AArch64duplane32 (v4f32 node:$LHS), node:$RHS))]>;
 
+// Match scalar_to_vector values, optionally wrapped in a bitcast through
+// f32/f64.
+def scalar_to_vector_any_64 : PatFrags<(ops node:$src),
+                          [(scalar_to_vector node:$src),
+                           (bitconvert (v2f32 (scalar_to_vector (f32 (bitconvert node:$src))))),
+                           (bitconvert (v1f64 (scalar_to_vector (f64 (bitconvert node:$src)))))]>;
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davemgreen wrote:

These patterns create build/lib/Target/AArch64/AArch64GenDAGISel.inc, which on some architecture has hit limits in size before. If this increases the table size for types which cannot happen then that is't a great use of the tables capacity (or clang binary size).

I would expect it would be better to be more precise with the types and make sure they do not generate unexpected output from messy input code.

https://github.com/llvm/llvm-project/pull/172837


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