[llvm] [GlobalISel] Combine into abd[su] and legalize abd[su] (PR #179437)

[via llvm-commits]

github-actions[bot] wrote:

<!--LLVM CODE FORMAT COMMENT: {clang-format}-->


:warning: C/C++ code formatter, clang-format found issues in your code. :warning:

<details>
<summary>
You can test this locally with the following command:
</summary>

``````````bash
git-clang-format --diff origin/main HEAD --extensions h,cpp -- llvm/lib/CodeGen/GlobalISel/CombinerHelperSelect.cpp llvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h llvm/include/llvm/CodeGen/GlobalISel/GenericMachineInstrs.h llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp llvm/lib/CodeGen/GlobalISel/CombinerHelperCasts.cpp llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp --diff_from_common_commit
``````````

:warning:
The reproduction instructions above might return results for more than one PR
in a stack if you are using a stacked PR workflow. You can limit the results by
changing `origin/main` to the base branch/commit you want to compare against.
:warning:

</details>

<details>
<summary>
View the diff from clang-format here.
</summary>

``````````diff
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
index a2bd03972..44d8d4ec1 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
@@ -8591,34 +8591,34 @@ bool CombinerHelper::matchCtls(MachineInstr &CtlzMI,
   };
 
   return true;
-// sub(smax(lhs,rhs), smin(lhs,rhs)) -> abds(lhs, rhs)
-bool CombinerHelper::matchSubAbds(const MachineInstr &MI) {
-  const GSub *Sub = cast<GSub>(&MI);
-  const GMaxMinOp *LHS = cast<GMaxMinOp>(MRI.getVRegDef(Sub->getLHSReg()));
-  const GMaxMinOp *RHS = cast<GMaxMinOp>(MRI.getVRegDef(Sub->getRHSReg()));
+  // sub(smax(lhs,rhs), smin(lhs,rhs)) -> abds(lhs, rhs)
+  bool CombinerHelper::matchSubAbds(const MachineInstr &MI) {
+    const GSub *Sub = cast<GSub>(&MI);
+    const GMaxMinOp *LHS = cast<GMaxMinOp>(MRI.getVRegDef(Sub->getLHSReg()));
+    const GMaxMinOp *RHS = cast<GMaxMinOp>(MRI.getVRegDef(Sub->getRHSReg()));
+
+    if (!MRI.hasOneNonDBGUse(LHS->getReg(0)) ||
+        !MRI.hasOneNonDBGUse(RHS->getReg(0)))
+      return false;
 
-  if (!MRI.hasOneNonDBGUse(LHS->getReg(0)) ||
-      !MRI.hasOneNonDBGUse(RHS->getReg(0)))
-    return false;
+    Register Dst = Sub->getReg(0);
+    LLT DstTy = MRI.getType(Dst);
 
-  Register Dst = Sub->getReg(0);
-  LLT DstTy = MRI.getType(Dst);
+    return isLegalOrBeforeLegalizer({TargetOpcode::G_ABDS, {DstTy}});
+  }
 
-  return isLegalOrBeforeLegalizer({TargetOpcode::G_ABDS, {DstTy}});
-}
+  // sub(umax(lhs,rhs), umin(lhs,rhs)) -> abdu(lhs, rhs)
+  bool CombinerHelper::matchSubAbdu(const MachineInstr &MI) {
+    const GSub *Sub = cast<GSub>(&MI);
+    const GMaxMinOp *LHS = cast<GMaxMinOp>(MRI.getVRegDef(Sub->getLHSReg()));
+    const GMaxMinOp *RHS = cast<GMaxMinOp>(MRI.getVRegDef(Sub->getRHSReg()));
 
-// sub(umax(lhs,rhs), umin(lhs,rhs)) -> abdu(lhs, rhs)
-bool CombinerHelper::matchSubAbdu(const MachineInstr &MI) {
-  const GSub *Sub = cast<GSub>(&MI);
-  const GMaxMinOp *LHS = cast<GMaxMinOp>(MRI.getVRegDef(Sub->getLHSReg()));
-  const GMaxMinOp *RHS = cast<GMaxMinOp>(MRI.getVRegDef(Sub->getRHSReg()));
-
-  if (!MRI.hasOneNonDBGUse(LHS->getReg(0)) ||
-      !MRI.hasOneNonDBGUse(RHS->getReg(0)))
-    return false;
+    if (!MRI.hasOneNonDBGUse(LHS->getReg(0)) ||
+        !MRI.hasOneNonDBGUse(RHS->getReg(0)))
+      return false;
 
-  Register Dst = Sub->getReg(0);
-  LLT DstTy = MRI.getType(Dst);
+    Register Dst = Sub->getReg(0);
+    LLT DstTy = MRI.getType(Dst);
 
-  return isLegalOrBeforeLegalizer({TargetOpcode::G_ABDU, {DstTy}});
-}
+    return isLegalOrBeforeLegalizer({TargetOpcode::G_ABDU, {DstTy}});
+  }
diff --git a/llvm/lib/CodeGen/GlobalISel/CombinerHelperCasts.cpp b/llvm/lib/CodeGen/GlobalISel/CombinerHelperCasts.cpp
index e0b6d826c..ad62690ab 100644
--- a/llvm/lib/CodeGen/GlobalISel/CombinerHelperCasts.cpp
+++ b/llvm/lib/CodeGen/GlobalISel/CombinerHelperCasts.cpp
@@ -412,58 +412,58 @@ bool CombinerHelper::matchRedundantSextInReg(MachineInstr &Root,
   }
 
   return true;
-// trunc(abs(sext(x) - sext(y))) -> abds(x, y)
-bool CombinerHelper::matchTruncAbds(const MachineInstr &MI) {
-  const GTrunc *Trunc = cast<GTrunc>(&MI);
-  const GAbs *Abs = cast<GAbs>(MRI.getVRegDef(Trunc->getSrcReg()));
-  const GSub *Sub = cast<GSub>(MRI.getVRegDef(Abs->getSourceReg()));
+  // trunc(abs(sext(x) - sext(y))) -> abds(x, y)
+  bool CombinerHelper::matchTruncAbds(const MachineInstr &MI) {
+    const GTrunc *Trunc = cast<GTrunc>(&MI);
+    const GAbs *Abs = cast<GAbs>(MRI.getVRegDef(Trunc->getSrcReg()));
+    const GSub *Sub = cast<GSub>(MRI.getVRegDef(Abs->getSourceReg()));
 
-  Register Dst = Trunc->getReg(0);
-  LLT DstTy = MRI.getType(Dst);
+    Register Dst = Trunc->getReg(0);
+    LLT DstTy = MRI.getType(Dst);
 
-  GSext *SextLHS = cast<GSext>(MRI.getVRegDef(Sub->getLHSReg()));
-  GSext *SextRHS = cast<GSext>(MRI.getVRegDef(Sub->getRHSReg()));
+    GSext *SextLHS = cast<GSext>(MRI.getVRegDef(Sub->getLHSReg()));
+    GSext *SextRHS = cast<GSext>(MRI.getVRegDef(Sub->getRHSReg()));
 
-  LLT SextLHSTy = MRI.getType(SextLHS->getSrcReg());
-  LLT SextRHSTy = MRI.getType(SextRHS->getSrcReg());
+    LLT SextLHSTy = MRI.getType(SextLHS->getSrcReg());
+    LLT SextRHSTy = MRI.getType(SextRHS->getSrcReg());
 
-  if (SextLHSTy != SextRHSTy || DstTy != SextLHSTy)
-    return false;
+    if (SextLHSTy != SextRHSTy || DstTy != SextLHSTy)
+      return false;
 
-  // one-use
-  if (!MRI.hasOneNonDBGUse(Abs->getReg(0)) ||
-      !MRI.hasOneNonDBGUse(Sub->getReg(0)) ||
-      !MRI.hasOneNonDBGUse(Sub->getLHSReg()) ||
-      !MRI.hasOneNonDBGUse(Sub->getRHSReg()))
-    return false;
+    // one-use
+    if (!MRI.hasOneNonDBGUse(Abs->getReg(0)) ||
+        !MRI.hasOneNonDBGUse(Sub->getReg(0)) ||
+        !MRI.hasOneNonDBGUse(Sub->getLHSReg()) ||
+        !MRI.hasOneNonDBGUse(Sub->getRHSReg()))
+      return false;
 
-  return isLegalOrBeforeLegalizer({TargetOpcode::G_ABDS, {DstTy}});
-}
+    return isLegalOrBeforeLegalizer({TargetOpcode::G_ABDS, {DstTy}});
+  }
 
-// trunc(abs(zext(x) - zext(y))) -> abdu(x, y)
-bool CombinerHelper::matchTruncAbdu(const MachineInstr &MI) {
-  const GTrunc *Trunc = cast<GTrunc>(&MI);
-  const GAbs *Abs = cast<GAbs>(MRI.getVRegDef(Trunc->getSrcReg()));
-  const GSub *Sub = cast<GSub>(MRI.getVRegDef(Abs->getSourceReg()));
+  // trunc(abs(zext(x) - zext(y))) -> abdu(x, y)
+  bool CombinerHelper::matchTruncAbdu(const MachineInstr &MI) {
+    const GTrunc *Trunc = cast<GTrunc>(&MI);
+    const GAbs *Abs = cast<GAbs>(MRI.getVRegDef(Trunc->getSrcReg()));
+    const GSub *Sub = cast<GSub>(MRI.getVRegDef(Abs->getSourceReg()));
 
-  Register Dst = Trunc->getReg(0);
-  LLT DstTy = MRI.getType(Dst);
+    Register Dst = Trunc->getReg(0);
+    LLT DstTy = MRI.getType(Dst);
 
-  GZext *ZextLHS = cast<GZext>(MRI.getVRegDef(Sub->getLHSReg()));
-  GZext *ZextRHS = cast<GZext>(MRI.getVRegDef(Sub->getRHSReg()));
+    GZext *ZextLHS = cast<GZext>(MRI.getVRegDef(Sub->getLHSReg()));
+    GZext *ZextRHS = cast<GZext>(MRI.getVRegDef(Sub->getRHSReg()));
 
-  LLT ZextLHSTy = MRI.getType(ZextLHS->getSrcReg());
-  LLT ZextRHSTy = MRI.getType(ZextRHS->getSrcReg());
+    LLT ZextLHSTy = MRI.getType(ZextLHS->getSrcReg());
+    LLT ZextRHSTy = MRI.getType(ZextRHS->getSrcReg());
 
-  if (ZextLHSTy != ZextRHSTy || DstTy != ZextLHSTy)
-    return false;
+    if (ZextLHSTy != ZextRHSTy || DstTy != ZextLHSTy)
+      return false;
 
-  // one-use
-  if (!MRI.hasOneNonDBGUse(Abs->getReg(0)) ||
-      !MRI.hasOneNonDBGUse(Sub->getReg(0)) ||
-      !MRI.hasOneNonDBGUse(Sub->getLHSReg()) ||
-      !MRI.hasOneNonDBGUse(Sub->getRHSReg()))
-    return false;
+    // one-use
+    if (!MRI.hasOneNonDBGUse(Abs->getReg(0)) ||
+        !MRI.hasOneNonDBGUse(Sub->getReg(0)) ||
+        !MRI.hasOneNonDBGUse(Sub->getLHSReg()) ||
+        !MRI.hasOneNonDBGUse(Sub->getRHSReg()))
+      return false;
 
-  return isLegalOrBeforeLegalizer({TargetOpcode::G_ABDU, {DstTy}});
-}
+    return isLegalOrBeforeLegalizer({TargetOpcode::G_ABDU, {DstTy}});
+  }

``````````

</details>


https://github.com/llvm/llvm-project/pull/179437