[llvm] [RISCV] Call updateCZceFeatureImplications from RISCVAsmParser::setFeatureBits. (PR #179870)
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 4 22:16:53 PST 2026
https://github.com/topperc created https://github.com/llvm/llvm-project/pull/179870
None
>From 0e3880b2915ae94a89a5545486e391e2db6ec6ca Mon Sep 17 00:00:00 2001
From: Craig Topper <craig.topper at sifive.com>
Date: Wed, 4 Feb 2026 22:15:56 -0800
Subject: [PATCH] [RISCV] Call updateCZceFeatureImplications from
RISCVAsmParser::setFeatureBits.
---
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp | 8 ++++++--
llvm/test/MC/RISCV/option-arch.s | 3 +--
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index 19d6fb3b95c4a..ea5713159fe48 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -246,8 +246,12 @@ class RISCVAsmParser : public MCTargetAsmParser {
void setFeatureBits(uint64_t Feature, StringRef FeatureString) {
if (!(getSTI().hasFeature(Feature))) {
MCSubtargetInfo &STI = copySTI();
- setAvailableFeatures(
- ComputeAvailableFeatures(STI.ToggleFeature(FeatureString)));
+ STI.ToggleFeature(FeatureString);
+
+ // Update the C and Zce implications.
+ RISCV::updateCZceFeatureImplications(STI);
+
+ setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
}
}
diff --git a/llvm/test/MC/RISCV/option-arch.s b/llvm/test/MC/RISCV/option-arch.s
index 7926fa453845f..0367ef317e71a 100644
--- a/llvm/test/MC/RISCV/option-arch.s
+++ b/llvm/test/MC/RISCV/option-arch.s
@@ -127,8 +127,7 @@ addi a0, a1, 0
# CHECK: .option arch, +zve32x
.option arch, rv32i
-# FIXME: This shouldn't require +zcf.
-.option arch, +zce, +f, +zcf
+.option arch, +zce, +f
# CHECK-INST: flw fa0, 0x0(a0)
# CHECK: # encoding: [0x08,0x61]
c.flw fa0, 0(a0)
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