[llvm] a13c6ea - [CodeGen] Simplify ExpandPostRA::LowerSubregToReg. NFC. (#179634)

[via llvm-commits]

Author: Jay Foad
Date: 2026-02-04T12:06:41Z
New Revision: a13c6ea80dbd4c0a26ad290595aaf79f25f8ffa9

URL: https://github.com/llvm/llvm-project/commit/a13c6ea80dbd4c0a26ad290595aaf79f25f8ffa9
DIFF: https://github.com/llvm/llvm-project/commit/a13c6ea80dbd4c0a26ad290595aaf79f25f8ffa9.diff

LOG: [CodeGen] Simplify ExpandPostRA::LowerSubregToReg. NFC. (#179634)

SUBREG_TO_REG always has a non-zero subreg index so DstSubReg can never
be the same as DstReg.

Added: 
    

Modified: 
    llvm/lib/CodeGen/ExpandPostRAPseudos.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp b/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
index a94b609532c82..9692420c7020b 100644
--- a/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
+++ b/llvm/lib/CodeGen/ExpandPostRAPseudos.cpp
@@ -95,7 +95,11 @@ bool ExpandPostRA::LowerSubregToReg(MachineInstr *MI) {
 
   LLVM_DEBUG(dbgs() << "subreg: CONVERTING: " << *MI);
 
-  if (MI->allDefsAreDead()) {
+  if (MI->allDefsAreDead() || DstSubReg == InsReg) {
+    // No need to insert an identity copy instruction.
+    // Watch out for case like this:
+    // %rax = SUBREG_TO_REG 0, killed %eax, 3
+    // We must leave %rax live.
     MI->setDesc(TII->get(TargetOpcode::KILL));
     MI->removeOperand(3); // SubIdx
     MI->removeOperand(1); // Imm
@@ -103,31 +107,15 @@ bool ExpandPostRA::LowerSubregToReg(MachineInstr *MI) {
     return true;
   }
 
-  if (DstSubReg == InsReg) {
-    // No need to insert an identity copy instruction.
-    // Watch out for case like this:
-    // %rax = SUBREG_TO_REG 0, killed %eax, 3
-    // We must leave %rax live.
-    if (DstReg != InsReg) {
-      MI->setDesc(TII->get(TargetOpcode::KILL));
-      MI->removeOperand(3);     // SubIdx
-      MI->removeOperand(1);     // Imm
-      LLVM_DEBUG(dbgs() << "subreg: replace by: " << *MI);
-      return true;
-    }
-    LLVM_DEBUG(dbgs() << "subreg: eliminated!");
-  } else {
-    TII->copyPhysReg(*MBB, MI, MI->getDebugLoc(), DstSubReg, InsReg,
-                     MI->getOperand(2).isKill());
-
-    // Implicitly define DstReg for subsequent uses.
-    MachineBasicBlock::iterator CopyMI = MI;
-    --CopyMI;
-    CopyMI->addRegisterDefined(DstReg);
-    LLVM_DEBUG(dbgs() << "subreg: " << *CopyMI);
-  }
+  TII->copyPhysReg(*MBB, MI, MI->getDebugLoc(), DstSubReg, InsReg,
+                   MI->getOperand(2).isKill());
+
+  // Implicitly define DstReg for subsequent uses.
+  MachineBasicBlock::iterator CopyMI = MI;
+  --CopyMI;
+  CopyMI->addRegisterDefined(DstReg);
+  LLVM_DEBUG(dbgs() << "subreg: " << *CopyMI);
 
-  LLVM_DEBUG(dbgs() << '\n');
   MBB->erase(MI);
   return true;
 }