[llvm] [AMDGPU] Handle vector types for reqd_work_group_size constant folding. (PR #179551)

[Marcos Maronas via llvm-commits]

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@@ -378,10 +378,23 @@ static bool processUse(CallInst *CI, bool IsV5OrAbove) {
     if (!GroupSize)
       continue;
 
+    Type *GroupSizeType = GroupSize->getType();
     ConstantInt *KnownSize = mdconst::extract<ConstantInt>(MD->getOperand(I));
-    GroupSize->replaceAllUsesWith(
-        ConstantFoldIntegerCast(KnownSize, GroupSize->getType(), false, DL));
-    MadeChange = true;
+    Constant *Replacement = nullptr;
+
+    if (auto *VecTy = dyn_cast<VectorType>(GroupSizeType)) {
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maarquitos14 wrote:

My understanding is that this optimization is only trying to constant fold one of the elements of work group size into a variable, so I would say it only makes sense for scalars and 1 x vector types, which are effectively scalars for the purpose of this opt. I agree, it's just a bit reinterpret, but I have found issues with every single cast I tried so far. Let me see if bitcast works any better. 

https://github.com/llvm/llvm-project/pull/179551