[llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 4 08:12:11 PST 2026
================
@@ -899,6 +905,23 @@ SIMemOpAccess::getLDSDMAInfo(const MachineBasicBlock::iterator &MI) const {
return constructFromMIWithMMO(MI);
}
+/// \returns true if \p MI has one or more MMO, and all of them are fit for
+/// being marked as non-volatile. This means that either they are accessing the
+/// constant address space, are accessing a known invariant memory location, or
+/// that they are marked with the non-volatile metadata/MMO flag.
+static bool isNonVolatileMemoryAccess(const MachineInstr &MI) {
+ static constexpr unsigned NVFlags =
+ (MOThreadPrivate | MachineMemOperand::MOInvariant);
+ if (MI.getNumMemOperands() == 0)
+ return false;
+ return all_of(MI.memoperands(), [&](const MachineMemOperand *MMO) {
+ unsigned AS = MMO->getAddrSpace();
+ return AS == AMDGPUAS::CONSTANT_ADDRESS ||
+ AS == AMDGPUAS::CONSTANT_ADDRESS_32BIT ||
----------------
arsenm wrote:
Don't spread the special case of these address spaces around, these MMOs should get tagged as invariant anyway
https://github.com/llvm/llvm-project/pull/179413
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