[llvm] [LV] Handle partial sub-reductions with sub in middle block. (PR #178919)

[Graham Hunter via llvm-commits]

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@@ -5578,8 +5578,13 @@ static bool transformToPartialReduction(const VPPartialReductionChain &Chain,
 
   }
 
-  // Handle SUB by negating the operand and using ADD for the partial reduction.
-  if (WidenRecipe->getOpcode() == Instruction::Sub) {
+  // For partial reductions the 'sub' is performed outside the loop,
+  // so that the reduction itself is all positive, because otherwise
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huntergr-arm wrote:

Might be worth clarifying that this is due to the current set of intrinsics/ISD nodes. While we don't have an extending mls-like operation on AArch64 at present, if Arm adds such an instruction (or another target does), we would add support for an in-loop version.

https://github.com/llvm/llvm-project/pull/178919