[llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)

[Petar Avramovic via llvm-commits]

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@@ -10671,23 +10639,40 @@ SIInstrInfo::getGenericInstructionUniformity(const MachineInstr &MI) const {
   if (Opcode == TargetOpcode::G_ADDRSPACE_CAST)
     return HandleAddrSpaceCast(MI);
 
-  if (auto *GI = dyn_cast<GIntrinsic>(&MI)) {
-    auto IID = GI->getIntrinsicID();
-    if (AMDGPU::isIntrinsicSourceOfDivergence(IID))
-      return InstructionUniformity::NeverUniform;
+  if (const GIntrinsic *GI = dyn_cast<GIntrinsic>(&MI)) {
+    Intrinsic::ID IID = GI->getIntrinsicID();
+    if (AMDGPU::isIntrinsicSourceOfDivergence(IID)) {
+      // Some intrinsics produce multiple outputs with mixed uniformity.
+      // For these, we need to check DefIdx to determine which output is being
+      // queried and return the appropriate uniformity.
+      switch (IID) {
+      case Intrinsic::amdgcn_if:
+      case Intrinsic::amdgcn_else:
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petar-avramovic wrote:

At which point of the pipeline would it be relevant to know if register is uniform/divergent and what it would it be used for?
Tracking Instructions is good enough to get correct register classes assigned

Also never liked the
i1 (to become i64 exec mask at some point) is divergent
and "Saved exec mask (i64) " is uniform
If analysis is going to track registers instead of instructions
think that it should also track lane masks to be able to tell the difference between between saved exec mask and just uniform i64. This would allow for uniformity analysis to be used in later passes.


https://github.com/llvm/llvm-project/pull/179275