[llvm] AMDGPU: Correct value and name for ID_RTN_SAVE_WAVE_HAS_TDM (PR #180181)
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Fri Feb 6 04:23:31 PST 2026
https://github.com/arsenm created https://github.com/llvm/llvm-project/pull/180181
The old name and ID value do not match the documentation. The
documentation calls this RTN_SAVE_WAVE_HAS_TDM with the value
0x98.
>From 45408d7bcfcb0a2f8f531470ea0fb7063b9da76f Mon Sep 17 00:00:00 2001
From: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: Fri, 6 Feb 2026 13:02:50 +0100
Subject: [PATCH] AMDGPU: Correct value and name for ID_RTN_SAVE_WAVE_HAS_TDM
The old name and ID value do not match the documentation. The
documentation calls this RTN_SAVE_WAVE_HAS_TDM with the value
0x98.
---
llvm/lib/Target/AMDGPU/SIDefines.h | 2 +-
llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp | 2 +-
llvm/test/MC/AMDGPU/gfx1250_asm_sopp.s | 8 ++++++--
3 files changed, 8 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/SIDefines.h b/llvm/lib/Target/AMDGPU/SIDefines.h
index 147ef9dddebf6..93e0dff002e97 100644
--- a/llvm/lib/Target/AMDGPU/SIDefines.h
+++ b/llvm/lib/Target/AMDGPU/SIDefines.h
@@ -450,7 +450,6 @@ enum Id { // Message ID, width(4) [3:0].
ID_EARLY_PRIM_DEALLOC = 8, // added in GFX9, removed in GFX10
ID_GS_ALLOC_REQ = 9, // added in GFX9
ID_GET_DOORBELL = 10, // added in GFX9, removed in GFX11
- ID_SAVEWAVE_HAS_TDM = 10, // added in GFX1250
ID_GET_DDID = 11, // added in GFX10, removed in GFX11
ID_SYSMSG = 15,
@@ -464,6 +463,7 @@ enum Id { // Message ID, width(4) [3:0].
ID_RTN_GET_SE_AID_ID = 135,
ID_RTN_GET_CLUSTER_BARRIER_STATE = 136, // added in GFX1250
+ ID_RTN_SAVE_WAVE_HAS_TDM = 152, // added in GFX1250
ID_MASK_PreGFX11_ = 0xF,
ID_MASK_GFX11Plus_ = 0xFF
diff --git a/llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp b/llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
index ee5a10fb6e8f9..24fd02c6e543a 100644
--- a/llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
+++ b/llvm/lib/Target/AMDGPU/Utils/AMDGPUAsmUtils.cpp
@@ -99,7 +99,6 @@ static constexpr CustomOperand MsgOperands[] = {
{{"MSG_EARLY_PRIM_DEALLOC"}, ID_EARLY_PRIM_DEALLOC, isGFX9_GFX10},
{{"MSG_GS_ALLOC_REQ"}, ID_GS_ALLOC_REQ, isGFX9Plus},
{{"MSG_GET_DOORBELL"}, ID_GET_DOORBELL, isGFX9_GFX10},
- {{"MSG_SAVEWAVE_HAS_TDM"}, ID_SAVEWAVE_HAS_TDM, isGFX1250Plus},
{{"MSG_GET_DDID"}, ID_GET_DDID, isGFX10},
{{"MSG_SYSMSG"}, ID_SYSMSG},
{{"MSG_RTN_GET_DOORBELL"}, ID_RTN_GET_DOORBELL, isGFX11Plus},
@@ -112,6 +111,7 @@ static constexpr CustomOperand MsgOperands[] = {
{{"MSG_RTN_GET_SE_AID_ID"}, ID_RTN_GET_SE_AID_ID, isGFX12Plus},
{{"MSG_RTN_GET_CLUSTER_BARRIER_STATE"}, ID_RTN_GET_CLUSTER_BARRIER_STATE,
isGFX1250Plus},
+ {{"MSG_RTN_SAVE_WAVE_HAS_TDM"}, ID_RTN_SAVE_WAVE_HAS_TDM, isGFX1250Plus}
};
static constexpr CustomOperand SysMsgOperands[] = {
diff --git a/llvm/test/MC/AMDGPU/gfx1250_asm_sopp.s b/llvm/test/MC/AMDGPU/gfx1250_asm_sopp.s
index 8a98f5b549f6e..78bb59af75c1d 100644
--- a/llvm/test/MC/AMDGPU/gfx1250_asm_sopp.s
+++ b/llvm/test/MC/AMDGPU/gfx1250_asm_sopp.s
@@ -61,8 +61,12 @@ s_monitor_sleep 0
// GFX1250: s_monitor_sleep 0 ; encoding: [0x00,0x00,0x84,0xbf]
// GFX12-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: instruction not supported on this GPU
-s_sendmsg sendmsg(MSG_SAVEWAVE_HAS_TDM)
-// GFX1250: s_sendmsg sendmsg(MSG_SAVEWAVE_HAS_TDM) ; encoding: [0x0a,0x00,0xb6,0xbf]
+s_sendmsg_rtn_b32 s1, sendmsg(MSG_RTN_SAVE_WAVE_HAS_TDM) ; encoding: [0x0a,0x00,0xb6,0xbf]
+// GFX12: s_sendmsg_rtn_b32 s1, sendmsg(MSG_RTN_SAVE_WAVE_HAS_TDM) ; encoding: [0x98,0x4c,0x81,0xbe]
+// GFX12-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: specified message id is not supported on this GPU
+
+s_sendmsg sendmsg(MSG_RTN_SAVE_WAVE_HAS_TDM) ; encoding: [0x0a,0x00,0xb6,0xbf]
+// GFX1250: s_sendmsg sendmsg(MSG_RTN_SAVE_WAVE_HAS_TDM) ; encoding: [0x98,0x00,0xb6,0xbf]
// GFX12-ERR: :[[@LINE-2]]:{{[0-9]+}}: error: specified message id is not supported on this GPU
s_barrier_wait -3
More information about the llvm-commits
mailing list