[llvm] [Uniformity] Implement per-output machine uniformity analysis (PR #179275)

[Sameer Sahasrabuddhe via llvm-commits]

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@@ -10639,19 +10640,34 @@ SIInstrInfo::getGenericInstructionUniformity(const MachineInstr &MI) const {
   if (Opcode == TargetOpcode::G_ADDRSPACE_CAST)
     return HandleAddrSpaceCast(MI);
 
-  if (auto *GI = dyn_cast<GIntrinsic>(&MI)) {
-    auto IID = GI->getIntrinsicID();
-    if (AMDGPU::isIntrinsicSourceOfDivergence(IID))
-      return InstructionUniformity::NeverUniform;
+  if (const GIntrinsic *GI = dyn_cast<GIntrinsic>(&MI)) {
+    Intrinsic::ID IID = GI->getIntrinsicID();
+    if (AMDGPU::isIntrinsicSourceOfDivergence(IID)) {
+      // Some intrinsics produce multiple outputs with mixed uniformity.
+      // For these, we need to check DefIdx to determine which output is being
+      // queried and return the appropriate uniformity.
+      switch (IID) {
+      case Intrinsic::amdgcn_if:
+      case Intrinsic::amdgcn_else:
+        // These intrinsics produce two outputs:
+        //   DefIdx=0: "Exec mask not zero" flag (i1) - inherits divergence from
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ssahasra wrote:

Does that mean that this flag is true when exec mask is all zeros, and false when exec mask contains at least one set bit?

https://github.com/llvm/llvm-project/pull/179275