Author: Jim Lin
Date: 2026-02-05T13:07:33+08:00
New Revision: 79a26b9d655ac36ee1e6cedd2f12f58f71392835
URL: https://github.com/llvm/llvm-project/commit/79a26b9d655ac36ee1e6cedd2f12f58f71392835
DIFF: https://github.com/llvm/llvm-project/commit/79a26b9d655ac36ee1e6cedd2f12f58f71392835.diff
LOG: [RISCV] Update Andes45 vector integer arithmetic scheduling info (#174538)
This PR adds latency/throughput for all RVV integer arithmetic to the
andes45 series scheduling model.
Added:
Modified:
llvm/lib/Target/RISCV/RISCVSchedAndes45.td
llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-arithmetic.s
llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-bitwise.s
llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-comparison.s
llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-conversion.s
llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-fma.s
llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-minmax.s
llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-mul-div.s
llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-permutation.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/RISCVSchedAndes45.td b/llvm/lib/Target/RISCV/RISCVSchedAndes45.td
index 71563b0ac136b..e183ad947a0a1 100644
--- a/llvm/lib/Target/RISCV/RISCVSchedAndes45.td
+++ b/llvm/lib/Target/RISCV/RISCVSchedAndes45.td
@@ -82,6 +82,81 @@ class Andes45GetLMULValue<string mx> {
);
}
+// (VLEN/DLEN)*LMUL
+// When fractional LMUL is used, the LMUL used in calculation is 1.
+class Andes45GetCyclesDefault<string mx> {
+ int c = !cond(
+ !eq(mx, "M1") : !mul(Andes45VLEN_DLEN_RATIO, 1),
+ !eq(mx, "M2") : !mul(Andes45VLEN_DLEN_RATIO, 2),
+ !eq(mx, "M4") : !mul(Andes45VLEN_DLEN_RATIO, 4),
+ !eq(mx, "M8") : !mul(Andes45VLEN_DLEN_RATIO, 8),
+ !eq(mx, "MF2") : !mul(Andes45VLEN_DLEN_RATIO, 1),
+ !eq(mx, "MF4") : !mul(Andes45VLEN_DLEN_RATIO, 1),
+ !eq(mx, "MF8") : !mul(Andes45VLEN_DLEN_RATIO, 1)
+ );
+}
+
+// (VLEN/DLEN)*LMUL*2, if LMUL >= 1,
+// (VLEN != DLEN) ? 4 : 1, if LMUL < 1.
+class Andes45GetCyclesWidening<string mx> {
+ int c = !cond(
+ !eq(mx, "M1") : !mul(Andes45VLEN_DLEN_RATIO, 2),
+ !eq(mx, "M2") : !mul(Andes45VLEN_DLEN_RATIO, 4),
+ !eq(mx, "M4") : !mul(Andes45VLEN_DLEN_RATIO, 8),
+ // FIXME: .v* and .w* are
diff erent if LMUL < 1.
+ !eq(mx, "MF2") : !if(!ne(Andes45VLEN, Andes45DLEN), 4, 1),
+ !eq(mx, "MF4") : !if(!ne(Andes45VLEN, Andes45DLEN), 4, 1),
+ !eq(mx, "MF8") : !if(!ne(Andes45VLEN, Andes45DLEN), 4, 1),
+ );
+}
+
+class Andes45GetLatencyDiv<int sew> {
+ int c = !add(sew, 4);
+}
+
+// (VLEN/DLEN)*LMUL*SEW+(VLEN/DLEN)*LMUL*2+1
+// = (VLEN/DLEN)*LMUL*(SEW+2)+1
+class Andes45GetCyclesDiv<string mx, int sew> {
+ defvar a = !mul(Andes45VLEN_DLEN_RATIO, !add(sew, 2));
+ int b = !cond(
+ !eq(mx, "M1") : !mul(a, 1),
+ !eq(mx, "M2") : !mul(a, 2),
+ !eq(mx, "M4") : !mul(a, 4),
+ !eq(mx, "M8") : !mul(a, 8),
+ !eq(mx, "MF2") : !mul(a, 1),
+ !eq(mx, "MF4") : !mul(a, 1),
+ !eq(mx, "MF8") : !mul(a, 1)
+ );
+
+ int c = !add(b, 1);
+}
+
+// (VLEN/DLEN)*LMUL*2, if LMUL >= 1,
+// (VLEN != DLEN) ? : 4 : 1, if LMUL < 1.
+class Andes45GetCyclesNarrowing<string mx> {
+ int c = !cond(
+ !eq(mx, "M1") : !mul(Andes45VLEN_DLEN_RATIO, 2),
+ !eq(mx, "M2") : !mul(Andes45VLEN_DLEN_RATIO, 4),
+ !eq(mx, "M4") : !mul(Andes45VLEN_DLEN_RATIO, 8),
+ !eq(mx, "MF2") : !if(!ne(Andes45VLEN, Andes45DLEN), 4, 1),
+ !eq(mx, "MF4") : !if(!ne(Andes45VLEN, Andes45DLEN), 4, 1),
+ !eq(mx, "MF8") : !if(!ne(Andes45VLEN, Andes45DLEN), 4, 1)
+ );
+}
+
+// 3, if LMUL >= 1,
+// (VLEN != DLEN) ? 3 : 2, if LMUL <1.
+class Andes45GetLatencyNarrowing<string mx> {
+ int c = !cond(
+ !eq(mx, "M1") : 3,
+ !eq(mx, "M2") : 3,
+ !eq(mx, "M4") : 3,
+ !eq(mx, "MF2") : !if(!ne(Andes45VLEN, Andes45DLEN), 3, 2),
+ !eq(mx, "MF4") : !if(!ne(Andes45VLEN, Andes45DLEN), 3, 2),
+ !eq(mx, "MF8") : !if(!ne(Andes45VLEN, Andes45DLEN), 3, 2)
+ );
+}
+
def Andes45Model : SchedMachineModel {
let MicroOpBufferSize = 0; // Andes45 is in-order processor
let IssueWidth = 2; // 2 micro-ops dispatched per cycle
@@ -588,70 +663,100 @@ foreach LMul = [1, 2, 4, 8] in {
// 11. Vector Integer Arithmetic Instructions
foreach mx = SchedMxList in {
+ defvar Cycles = Andes45GetCyclesDefault<mx>.c;
defvar IsWorstCase = Andes45IsWorstCaseMX<mx, SchedMxList>.c;
- defm "" : LMULWriteResMX<"WriteVIALUV", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIALUX", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIALUI", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVExtV", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVICALUV", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVICALUX", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVICALUI", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVICALUMV", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVICALUMX", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVICALUMI", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVICmpV", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVICmpX", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVICmpI", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMinMaxV", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMinMaxX", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMergeV", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMergeX", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMergeI", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMovV", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMovX", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMovI", [Andes45VALU], mx, IsWorstCase>;
-
- defm "" : LMULWriteResMX<"WriteVShiftV", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVShiftX", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVShiftI", [Andes45VALU], mx, IsWorstCase>;
-
- defm "" : LMULWriteResMX<"WriteVIMulV", [Andes45VMAC], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMulX", [Andes45VMAC], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMulAddV", [Andes45VMAC], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIMulAddX", [Andes45VMAC], mx, IsWorstCase>;
+ let Latency = 2, ReleaseAtCycles = [Cycles] in {
+ defm "" : LMULWriteResMX<"WriteVIALUV", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIALUX", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIALUI", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICALUV", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICALUX", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICALUI", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICALUMV", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICALUMX", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICALUMI", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMinMaxV", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMinMaxX", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMergeV", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMergeX", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMergeI", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMovV", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMovX", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMovI", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVShiftV", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVShiftX", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVShiftI", [Andes45VALU], mx, IsWorstCase>;
+ }
+
+ let Latency = 2, ReleaseAtCycles = [Cycles] in
+ defm "" : LMULWriteResMX<"WriteVExtV", [Andes45VPERMUT], mx, IsWorstCase>;
+
+ // Mask results can't chain.
+ let Latency = !add(Cycles, 2),
+ ReleaseAtCycles = [!add(Cycles, !ne(Andes45VLEN, Andes45DLEN))] in {
+ defm "" : LMULWriteResMX<"WriteVICmpV", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICmpX", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVICmpI", [Andes45VALU], mx, IsWorstCase>;
+ }
+}
+
+foreach mx = SchedMxList in {
+ defvar Cycles = Andes45GetCyclesDefault<mx>.c;
+ defvar IsWorstCase = Andes45IsWorstCaseMX<mx, SchedMxList>.c;
+
+ let Latency = 4, ReleaseAtCycles = [Cycles] in {
+ defm "" : LMULWriteResMX<"WriteVIMulV", [Andes45VMAC], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMulX", [Andes45VMAC], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMulAddV", [Andes45VMAC], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIMulAddX", [Andes45VMAC], mx, IsWorstCase>;
+ }
}
// Widening
foreach mx = SchedMxListW in {
+ defvar Cycles = Andes45GetCyclesWidening<mx>.c;
defvar IsWorstCase = Andes45IsWorstCaseMX<mx, SchedMxListW>.c;
- defm "" : LMULWriteResMX<"WriteVIWALUV", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIWALUX", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIWALUI", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIWMulV", [Andes45VMAC], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIWMulX", [Andes45VMAC], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIWMulAddV", [Andes45VMAC], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVIWMulAddX", [Andes45VMAC], mx, IsWorstCase>;
+ let Latency = 2, ReleaseAtCycles = [Cycles] in {
+ defm "" : LMULWriteResMX<"WriteVIWALUV", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIWALUX", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIWALUI", [Andes45VALU], mx, IsWorstCase>;
+ }
+
+ let Latency = 4, ReleaseAtCycles = [Cycles] in {
+ defm "" : LMULWriteResMX<"WriteVIWMulV", [Andes45VMAC], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIWMulX", [Andes45VMAC], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIWMulAddV", [Andes45VMAC], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVIWMulAddX", [Andes45VMAC], mx, IsWorstCase>;
+ }
}
// Vector Integer Division and Remainder
foreach mx = SchedMxList in {
foreach sew = SchedSEWSet<mx>.val in {
+ defvar Latency = Andes45GetLatencyDiv<sew>.c;
+ defvar Cycles = Andes45GetCyclesDiv<mx, sew>.c;
defvar IsWorstCase = Andes45IsWorstCaseMXSEW<mx, sew, SchedMxList>.c;
- defm "" : LMULSEWWriteResMXSEW<"WriteVIDivV", [Andes45VDIV], mx, sew, IsWorstCase>;
- defm "" : LMULSEWWriteResMXSEW<"WriteVIDivX", [Andes45VDIV], mx, sew, IsWorstCase>;
+ let Latency = Latency, ReleaseAtCycles = [Cycles] in {
+ defm "" : LMULSEWWriteResMXSEW<"WriteVIDivV", [Andes45VDIV], mx, sew, IsWorstCase>;
+ defm "" : LMULSEWWriteResMXSEW<"WriteVIDivX", [Andes45VDIV], mx, sew, IsWorstCase>;
+ }
}
}
// Narrowing Shift
foreach mx = SchedMxListW in {
+ defvar Latency = Andes45GetLatencyNarrowing<mx>.c;
+ defvar Cycles = Andes45GetCyclesNarrowing<mx>.c;
defvar IsWorstCase = Andes45IsWorstCaseMX<mx, SchedMxListW>.c;
- defm "" : LMULWriteResMX<"WriteVNShiftV", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVNShiftX", [Andes45VALU], mx, IsWorstCase>;
- defm "" : LMULWriteResMX<"WriteVNShiftI", [Andes45VALU], mx, IsWorstCase>;
+ let Latency = Latency, ReleaseAtCycles = [Cycles] in {
+ defm "" : LMULWriteResMX<"WriteVNShiftV", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVNShiftX", [Andes45VALU], mx, IsWorstCase>;
+ defm "" : LMULWriteResMX<"WriteVNShiftI", [Andes45VALU], mx, IsWorstCase>;
+ }
}
// 12. Vector Fixed-Point Arithmetic Instructions
diff --git a/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-arithmetic.s b/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-arithmetic.s
index dc4122ab19293..e7d76cf49e06d 100644
--- a/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-arithmetic.s
+++ b/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-arithmetic.s
@@ -2330,685 +2330,685 @@ vwsub.wx v8, v16, x30
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VI vadd.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VI vadd.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VV vadd.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VV vadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADD_VX vadd.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADD_VX vadd.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VV vsub.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSUB_VV vsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSUB_VX vsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSUB_VX vsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VVM vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VVM vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VXM vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VXM vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VADC_VIM vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VADC_VIM vadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VVM vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSBC_VVM vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSBC_VXM vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSBC_VXM vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VV vwaddu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_VV vwaddu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_VX vwaddu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_VX vwaddu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VV vwadd.vv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_VV vwadd.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_VX vwadd.vx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_VX vwadd.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VV vwsubu.vv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_VV vwsubu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_VX vwsubu.vx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_VX vwsubu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VV vwsub.vv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_VV vwsub.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_VX vwsub.vx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_VX vwsub.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAADDU_VV vaaddu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -3362,533 +3362,533 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VASUB_VX vasub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VI vmadc.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VI vmadc.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VIM vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VIM vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VV vmadc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VV vmadc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VVM vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VVM vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VX vmadc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VX vmadc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMADC_VXM vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMADC_VXM vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VV vmsbc.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VV vmsbc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VVM vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VX vmsbc.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VX vmsbc.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMSBC_VXM vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VI vrsub.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VRSUB_VI vrsub.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VRSUB_VX vrsub.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VRSUB_VX vrsub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSADDU_VI vsaddu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -4330,245 +4330,245 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSSUB_VX vssub.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WV vwaddu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_WV vwaddu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADDU_WX vwaddu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADDU_WX vwaddu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WV vwadd.wv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_WV vwadd.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWADD_WX vwadd.wx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWADD_WX vwadd.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WV vwsubu.wv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_WV vwsubu.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUBU_WX vwsubu.wx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUBU_WX vwsubu.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WV vwsub.wv v8, v16, v24
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_WV vwsub.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VWSUB_WX vwsub.wx v8, v16, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VWSUB_WX vwsub.wx v8, v16, t5
# CHECK: Resources:
# CHECK-NEXT: [0.0] - Andes45ALU
@@ -4591,7 +4591,7 @@ vwsub.wx v8, v16, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
-# CHECK-NEXT: - - 1120.00 - - - - - - 1120.00 - - - - - - -
+# CHECK-NEXT: - - 1120.00 - - - - - - 2616.00 - - - - - - -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] Instructions:
@@ -4604,11 +4604,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -4616,29 +4616,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -4648,11 +4648,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -4660,29 +4660,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -4692,11 +4692,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -4704,29 +4704,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadd.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadd.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadd.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadd.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -4736,11 +4736,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -4748,29 +4748,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -4780,11 +4780,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -4792,29 +4792,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -4824,11 +4824,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -4836,29 +4836,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -4868,11 +4868,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -4880,29 +4880,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -4912,11 +4912,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -4924,29 +4924,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -4956,11 +4956,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -4968,29 +4968,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5000,11 +5000,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5012,29 +5012,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5042,29 +5042,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5072,29 +5072,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5102,29 +5102,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5132,29 +5132,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5162,29 +5162,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5192,29 +5192,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5222,29 +5222,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5252,29 +5252,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vaaddu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5636,11 +5636,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5648,29 +5648,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5680,11 +5680,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5692,29 +5692,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5724,11 +5724,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5736,29 +5736,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5768,11 +5768,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5780,29 +5780,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5812,11 +5812,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5824,29 +5824,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5856,11 +5856,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5868,29 +5868,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmadc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5900,11 +5900,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5912,29 +5912,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5944,11 +5944,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -5956,29 +5956,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -5988,11 +5988,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6000,29 +6000,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6032,11 +6032,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6044,29 +6044,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsbc.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6076,11 +6076,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vrsub.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vrsub.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vrsub.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6088,29 +6088,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vrsub.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vrsub.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vrsub.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vrsub.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vrsub.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vrsub.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vrsub.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vrsub.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vrsub.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6120,11 +6120,11 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vrsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vrsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vrsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -6132,29 +6132,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vrsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vrsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vrsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vrsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vrsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vrsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vrsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vrsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vrsub.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vrsub.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsaddu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6602,29 +6602,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6632,29 +6632,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwaddu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwaddu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6662,29 +6662,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6692,29 +6692,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwadd.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwadd.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwadd.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwadd.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6722,29 +6722,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6752,29 +6752,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsubu.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsubu.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6782,29 +6782,29 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -6812,26 +6812,26 @@ vwsub.wx v8, v16, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vwsub.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vwsub.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vwsub.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vwsub.wx v8, v16, t5
diff --git a/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-bitwise.s b/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-bitwise.s
index 3445098403df3..c7eec08847b14 100644
--- a/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-bitwise.s
+++ b/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-bitwise.s
@@ -1486,581 +1486,581 @@ vssrl.vx v8, v8, x30
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VV vand.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAND_VV vand.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VX vand.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAND_VX vand.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VAND_VI vand.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VAND_VI vand.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VV vor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VOR_VV vor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VX vor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VOR_VX vor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VOR_VI vor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VOR_VI vor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VV vxor.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VXOR_VV vxor.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VX vxor.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VXOR_VX vxor.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VXOR_VI vxor.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VXOR_VI vxor.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 3 2.00 3 Andes45VALU[2] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 3 4.00 3 Andes45VALU[4] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 3 8.00 3 Andes45VALU[8] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 3 2.00 3 Andes45VALU[2] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 3 4.00 3 Andes45VALU[4] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 3 8.00 3 Andes45VALU[8] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 3 2.00 3 Andes45VALU[2] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 3 4.00 3 Andes45VALU[4] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WV vnsra.wv v8, v16, v24
+# CHECK-NEXT: 1 3 8.00 3 Andes45VALU[8] VNSRA_WV vnsra.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 3 2.00 3 Andes45VALU[2] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 3 4.00 3 Andes45VALU[4] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 3 8.00 3 Andes45VALU[8] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 3 2.00 3 Andes45VALU[2] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 3 4.00 3 Andes45VALU[4] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 3 8.00 3 Andes45VALU[8] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 3 2.00 3 Andes45VALU[2] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 3 4.00 3 Andes45VALU[4] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WX vnsra.wx v8, v16, t5
+# CHECK-NEXT: 1 3 8.00 3 Andes45VALU[8] VNSRA_WX vnsra.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 3 2.00 3 Andes45VALU[2] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 3 4.00 3 Andes45VALU[4] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 3 8.00 3 Andes45VALU[8] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 3 2.00 3 Andes45VALU[2] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 3 4.00 3 Andes45VALU[4] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 3 8.00 3 Andes45VALU[8] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 3 2.00 3 Andes45VALU[2] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 3 4.00 3 Andes45VALU[4] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRA_WI vnsra.wi v8, v16, 12
+# CHECK-NEXT: 1 3 8.00 3 Andes45VALU[8] VNSRA_WI vnsra.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 3 2.00 3 Andes45VALU[2] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 3 4.00 3 Andes45VALU[4] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 3 8.00 3 Andes45VALU[8] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 3 2.00 3 Andes45VALU[2] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 3 4.00 3 Andes45VALU[4] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 3 8.00 3 Andes45VALU[8] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 3 2.00 3 Andes45VALU[2] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 3 4.00 3 Andes45VALU[4] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WV vnsrl.wv v8, v16, v24
+# CHECK-NEXT: 1 3 8.00 3 Andes45VALU[8] VNSRL_WV vnsrl.wv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 3 2.00 3 Andes45VALU[2] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 3 4.00 3 Andes45VALU[4] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 3 8.00 3 Andes45VALU[8] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 3 2.00 3 Andes45VALU[2] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 3 4.00 3 Andes45VALU[4] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 3 8.00 3 Andes45VALU[8] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 3 2.00 3 Andes45VALU[2] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 3 4.00 3 Andes45VALU[4] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WX vnsrl.wx v8, v16, t5
+# CHECK-NEXT: 1 3 8.00 3 Andes45VALU[8] VNSRL_WX vnsrl.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 3 2.00 3 Andes45VALU[2] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 3 4.00 3 Andes45VALU[4] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 3 8.00 3 Andes45VALU[8] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 3 2.00 3 Andes45VALU[2] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 3 4.00 3 Andes45VALU[4] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 3 8.00 3 Andes45VALU[8] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 3 2.00 3 Andes45VALU[2] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 3 4.00 3 Andes45VALU[4] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNSRL_WI vnsrl.wi v8, v16, 12
+# CHECK-NEXT: 1 3 8.00 3 Andes45VALU[8] VNSRL_WI vnsrl.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNCLIPU_WI vnclipu.wi v8, v16, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2242,401 +2242,401 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VNCLIP_WX vnclip.wx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VI vsll.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSLL_VI vsll.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VV vsll.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSLL_VV vsll.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSLL_VX vsll.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSLL_VX vsll.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VI vsra.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRA_VI vsra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VV vsra.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRA_VV vsra.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRA_VX vsra.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRA_VX vsra.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VI vsrl.vi v8, v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRL_VI vsrl.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VV vsrl.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRL_VV vsrl.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSRL_VX vsrl.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VSRL_VX vsrl.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSSRA_VI vssra.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2923,7 +2923,7 @@ vssrl.vx v8, v8, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
-# CHECK-NEXT: - - 708.00 - - - - - - 708.00 - - - - - - -
+# CHECK-NEXT: - - 708.00 - - - - - - 1698.00 - - - - - - -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] Instructions:
@@ -2936,11 +2936,11 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vand.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vand.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vand.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2948,29 +2948,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vand.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vand.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vand.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vand.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vand.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vand.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vand.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vand.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vand.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2980,11 +2980,11 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vand.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vand.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vand.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2992,29 +2992,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vand.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vand.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vand.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vand.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vand.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vand.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vand.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vand.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vand.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3024,11 +3024,11 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vand.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vand.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vand.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -3036,29 +3036,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vand.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vand.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vand.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vand.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vand.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vand.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vand.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vand.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vand.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vand.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3068,11 +3068,11 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -3080,29 +3080,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3112,11 +3112,11 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -3124,29 +3124,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3156,11 +3156,11 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -3168,29 +3168,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3200,11 +3200,11 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vxor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vxor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vxor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -3212,29 +3212,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vxor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vxor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vxor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vxor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vxor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vxor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vxor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vxor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vxor.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3244,11 +3244,11 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vxor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vxor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vxor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -3256,29 +3256,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vxor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vxor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vxor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vxor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vxor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vxor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vxor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vxor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vxor.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3288,11 +3288,11 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vxor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vxor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vxor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -3300,29 +3300,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vxor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vxor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vxor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vxor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vxor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vxor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vxor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vxor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vxor.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vxor.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3330,29 +3330,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vnsra.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vnsra.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vnsra.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vnsra.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vnsra.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vnsra.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vnsra.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vnsra.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vnsra.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3360,29 +3360,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vnsra.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vnsra.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vnsra.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vnsra.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vnsra.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vnsra.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vnsra.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vnsra.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vnsra.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3390,29 +3390,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vnsra.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vnsra.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vnsra.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vnsra.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vnsra.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vnsra.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vnsra.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vnsra.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsra.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vnsra.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3420,29 +3420,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vnsrl.wv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3450,29 +3450,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vnsrl.wx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3480,29 +3480,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnsrl.wi v8, v16, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vnsrl.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vnclipu.wi v8, v16, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3692,11 +3692,11 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsll.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsll.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsll.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -3704,29 +3704,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsll.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsll.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsll.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsll.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsll.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsll.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsll.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsll.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsll.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3736,11 +3736,11 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsll.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsll.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsll.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -3748,29 +3748,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsll.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsll.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsll.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsll.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsll.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsll.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsll.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsll.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsll.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3780,11 +3780,11 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsll.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsll.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsll.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -3792,29 +3792,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsll.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsll.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsll.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsll.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsll.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsll.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsll.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsll.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsll.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsll.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3824,11 +3824,11 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsra.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsra.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsra.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -3836,29 +3836,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsra.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsra.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsra.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsra.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsra.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsra.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsra.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsra.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsra.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3868,11 +3868,11 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsra.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsra.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsra.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -3880,29 +3880,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsra.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsra.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsra.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsra.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsra.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsra.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsra.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsra.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsra.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3912,11 +3912,11 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsra.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsra.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsra.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -3924,29 +3924,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsra.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsra.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsra.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsra.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsra.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsra.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsra.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsra.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsra.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsra.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3956,11 +3956,11 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsrl.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsrl.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsrl.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -3968,29 +3968,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsrl.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsrl.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsrl.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsrl.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsrl.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsrl.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsrl.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsrl.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsrl.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -4000,11 +4000,11 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsrl.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsrl.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsrl.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -4012,29 +4012,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsrl.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsrl.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsrl.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsrl.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsrl.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsrl.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsrl.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsrl.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsrl.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -4044,11 +4044,11 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsrl.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsrl.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsrl.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -4056,29 +4056,29 @@ vssrl.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsrl.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsrl.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsrl.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsrl.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsrl.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsrl.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vsrl.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vsrl.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsrl.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vsrl.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vssra.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
diff --git a/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-comparison.s b/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-comparison.s
index 7aaa351bbbc3e..1f671b4174532 100644
--- a/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-comparison.s
+++ b/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-comparison.s
@@ -934,885 +934,885 @@ vmslt.vx v8, v8, x30
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VV vmseq.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VV vmseq.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VX vmseq.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VX vmseq.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSEQ_VI vmseq.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSEQ_VI vmseq.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VV vmsle.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VV vmsle.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VX vmsle.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VX vmsle.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLE_VI vmsle.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLE_VI vmsle.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VV vmsleu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VV vmsleu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VX vmsleu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VX vmsleu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLEU_VI vmsleu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLEU_VI vmsleu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VV vmsne.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VV vmsne.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VX vmsne.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VX vmsne.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSNE_VI vmsne.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSNE_VI vmsne.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VI vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGTU_VI vmsgtu.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGTU_VX vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGTU_VX vmsgtu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VI vmsgt.vi v8, v8, 12
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGT_VI vmsgt.vi v8, v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSGT_VX vmsgt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSGT_VX vmsgt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VV vmsltu.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLTU_VV vmsltu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLTU_VX vmsltu.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLTU_VX vmsltu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VV vmslt.vv v8, v8, v8
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLT_VV vmslt.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 3 1.00 3 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VALU[2] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 6 4.00 6 Andes45VALU[4] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMSLT_VX vmslt.vx v8, v8, t5
+# CHECK-NEXT: 1 10 8.00 10 Andes45VALU[8] VMSLT_VX vmslt.vx v8, v8, t5
# CHECK: Resources:
# CHECK-NEXT: [0.0] - Andes45ALU
@@ -1835,7 +1835,7 @@ vmslt.vx v8, v8, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
-# CHECK-NEXT: - - 440.00 - - - - - - 440.00 - - - - - - -
+# CHECK-NEXT: - - 440.00 - - - - - - 1320.00 - - - - - - -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] Instructions:
@@ -1848,11 +1848,11 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmseq.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmseq.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1860,29 +1860,29 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmseq.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmseq.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmseq.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmseq.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmseq.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmseq.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1892,11 +1892,11 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmseq.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmseq.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1904,29 +1904,29 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmseq.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmseq.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmseq.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmseq.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmseq.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmseq.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1936,11 +1936,11 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmseq.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmseq.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1948,29 +1948,29 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmseq.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmseq.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmseq.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmseq.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmseq.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmseq.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmseq.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmseq.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1980,11 +1980,11 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1992,29 +1992,29 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2024,11 +2024,11 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2036,29 +2036,29 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2068,11 +2068,11 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2080,29 +2080,29 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsle.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsle.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsle.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsle.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2112,11 +2112,11 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2124,29 +2124,29 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2156,11 +2156,11 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2168,29 +2168,29 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2200,11 +2200,11 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2212,29 +2212,29 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsleu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsleu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2244,11 +2244,11 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsne.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsne.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsne.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2256,29 +2256,29 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsne.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsne.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsne.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsne.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsne.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsne.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsne.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsne.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsne.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2288,11 +2288,11 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsne.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsne.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsne.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2300,29 +2300,29 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsne.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsne.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsne.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsne.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsne.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsne.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsne.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsne.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsne.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2332,11 +2332,11 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsne.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsne.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsne.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2344,29 +2344,29 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsne.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsne.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsne.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsne.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsne.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsne.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsne.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsne.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsne.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsne.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2376,11 +2376,11 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2388,29 +2388,29 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgtu.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2420,11 +2420,11 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2432,29 +2432,29 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgtu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgtu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2464,11 +2464,11 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2476,29 +2476,29 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vi v8, v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgt.vi v8, v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2508,11 +2508,11 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2520,29 +2520,29 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsgt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsgt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2552,11 +2552,11 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2564,29 +2564,29 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsltu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2596,11 +2596,11 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2608,29 +2608,29 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmsltu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmsltu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2640,11 +2640,11 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmslt.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmslt.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmslt.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2652,29 +2652,29 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmslt.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmslt.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmslt.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmslt.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmslt.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmslt.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmslt.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmslt.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmslt.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2684,11 +2684,11 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmslt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmslt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmslt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2696,26 +2696,26 @@ vmslt.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmslt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmslt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmslt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmslt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmslt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmslt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmslt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmslt.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmslt.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmslt.vx v8, v8, t5
diff --git a/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-conversion.s b/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-conversion.s
index f7273e5851d81..f81e529da2718 100644
--- a/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-conversion.s
+++ b/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-conversion.s
@@ -623,117 +623,117 @@ vfwcvt.xu.f.v v8, v16
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF2 vsext.vf2 v8, v16
+# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VSEXT_VF2 vsext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF2 vzext.vf2 v8, v16
+# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VZEXT_VF2 vzext.vf2 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF4 vsext.vf4 v8, v16
+# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VSEXT_VF4 vsext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF4 vzext.vf4 v8, v16
+# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VZEXT_VF4 vzext.vf4 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF8 vsext.vf8 v8, v16
+# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VSEXT_VF8 vsext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF8 vsext.vf8 v8, v16
+# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VSEXT_VF8 vsext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF8 vsext.vf8 v8, v16
+# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VSEXT_VF8 vsext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VSEXT_VF8 vsext.vf8 v8, v16
+# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VSEXT_VF8 vsext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF8 vzext.vf8 v8, v16
+# CHECK-NEXT: 1 2 1.00 2 Andes45VPERMUT VZEXT_VF8 vzext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF8 vzext.vf8 v8, v16
+# CHECK-NEXT: 1 2 2.00 2 Andes45VPERMUT[2] VZEXT_VF8 vzext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF8 vzext.vf8 v8, v16
+# CHECK-NEXT: 1 2 4.00 2 Andes45VPERMUT[4] VZEXT_VF8 vzext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VZEXT_VF8 vzext.vf8 v8, v16
+# CHECK-NEXT: 1 2 8.00 2 Andes45VPERMUT[8] VZEXT_VF8 vzext.vf8 v8, v16
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 Andes45VFMIS VFCVT_F_XU_V vfcvt.f.xu.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -1206,122 +1206,122 @@ vfwcvt.xu.f.v v8, v16
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
-# CHECK-NEXT: - - 281.00 - - - - - - 56.00 - - 225.00 - - - -
+# CHECK-NEXT: - - 281.00 - - - - - - - - - 225.00 - - - 188.00
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] Instructions:
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vsext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vsext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vsext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vsext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vsext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vsext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vsext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vsext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vsext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vsext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vsext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vsext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vsext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vsext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vsext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vzext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vzext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vzext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vzext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vzext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vzext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vzext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vzext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vzext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vzext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vzext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vzext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vzext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vzext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf2 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vzext.vf2 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vsext.vf4 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vsext.vf4 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vsext.vf4 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vsext.vf4 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vsext.vf4 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vsext.vf4 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vsext.vf4 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vsext.vf4 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vsext.vf4 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vzext.vf4 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vzext.vf4 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vzext.vf4 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vzext.vf4 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vzext.vf4 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vzext.vf4 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vzext.vf4 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vzext.vf4 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf4 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vzext.vf4 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vsext.vf8 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vsext.vf8 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vsext.vf8 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vsext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vsext.vf8 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vzext.vf8 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 2.00 vzext.vf8 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 4.00 vzext.vf8 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vzext.vf8 v8, v16
+# CHECK-NEXT: - - - - - - - - - - - - - - - - 8.00 vzext.vf8 v8, v16
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfcvt.f.xu.v v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
diff --git a/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-fma.s b/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-fma.s
index 7f5df0694a4c5..a90365722ff88 100644
--- a/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-fma.s
+++ b/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-fma.s
@@ -763,567 +763,567 @@ vfwnmsac.vv v8, v16, v24
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VV vmacc.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMACC_VV vmacc.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMACC_VX vmacc.vx v8, s0, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMACC_VX vmacc.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VV vmadd.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMADD_VV vmadd.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMADD_VX vmadd.vx v8, s0, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMADD_VX vmadd.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VV vnmsac.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VNMSAC_VV vnmsac.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSAC_VX vnmsac.vx v8, s0, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VNMSAC_VX vnmsac.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VV vnmsub.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VNMSUB_VV vnmsub.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VNMSUB_VX vnmsub.vx v8, s0, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VNMSUB_VX vnmsub.vx v8, s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VV vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACCU_VV vwmaccu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCU_VX vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACCU_VX vwmaccu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VV vwmacc.vv v8, v16, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACC_VV vwmacc.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACC_VX vwmacc.vx v8, a6, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACC_VX vwmacc.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VV vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACCSU_VV vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCSU_VX vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACCSU_VX vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMACCUS_VX vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMACCUS_VX vwmaccus.vx v8, a6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VFWMACC_VF vfwmacc.vf v8, fa6, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -1490,7 +1490,7 @@ vfwnmsac.vv v8, v16, v24
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
-# CHECK-NEXT: - - 353.00 - - - - - - - - - - - 353.00 - -
+# CHECK-NEXT: - - 353.00 - - - - - - - - - - - 936.00 - -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] Instructions:
@@ -1503,11 +1503,11 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmacc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmacc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmacc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1515,29 +1515,29 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmacc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmacc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmacc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmacc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmacc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmacc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmacc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmacc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmacc.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1547,11 +1547,11 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmacc.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmacc.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmacc.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1559,29 +1559,29 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmacc.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmacc.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmacc.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmacc.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmacc.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmacc.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmacc.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmacc.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmacc.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmacc.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1591,11 +1591,11 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1603,29 +1603,29 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmadd.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1635,11 +1635,11 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmadd.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmadd.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmadd.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1647,29 +1647,29 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmadd.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmadd.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmadd.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmadd.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmadd.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmadd.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmadd.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmadd.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmadd.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmadd.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1679,11 +1679,11 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1691,29 +1691,29 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vnmsac.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1723,11 +1723,11 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1735,29 +1735,29 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsac.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vnmsac.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1767,11 +1767,11 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1779,29 +1779,29 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vnmsub.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1811,11 +1811,11 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1823,29 +1823,29 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vnmsub.vx v8, s0, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vnmsub.vx v8, s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1853,29 +1853,29 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmaccu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1883,29 +1883,29 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmaccu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1913,29 +1913,29 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmacc.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1943,29 +1943,29 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmacc.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmacc.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1973,29 +1973,29 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmaccsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2003,29 +2003,29 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccsu.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmaccsu.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2033,29 +2033,29 @@ vfwnmsac.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmaccus.vx v8, a6, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmaccus.vx v8, a6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vfwmacc.vf v8, fa6, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
diff --git a/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-minmax.s b/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-minmax.s
index e9fa22065fd37..fef4a09fba800 100644
--- a/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-minmax.s
+++ b/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-minmax.s
@@ -394,357 +394,357 @@ vminu.vx v8, v8, x30
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VV vmax.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAX_VV vmax.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAX_VX vmax.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAX_VX vmax.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VV vmaxu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAXU_VV vmaxu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMAXU_VX vmaxu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMAXU_VX vmaxu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VV vmin.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMIN_VV vmin.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMIN_VX vmin.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMIN_VX vmin.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VV vminu.vv v8, v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMINU_VV vminu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMINU_VX vminu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMINU_VX vminu.vx v8, v8, t5
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMINU_VX vminu.vx v8, v8, t5
# CHECK: Resources:
# CHECK-NEXT: [0.0] - Andes45ALU
@@ -767,7 +767,7 @@ vminu.vx v8, v8, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
-# CHECK-NEXT: - - 176.00 - - - - - - 176.00 - - - - - - -
+# CHECK-NEXT: - - 176.00 - - - - - - 528.00 - - - - - - -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] Instructions:
@@ -780,11 +780,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmax.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmax.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmax.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -792,29 +792,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmax.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmax.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmax.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmax.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmax.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmax.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmax.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmax.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmax.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -824,11 +824,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmax.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmax.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmax.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -836,29 +836,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmax.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmax.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmax.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmax.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmax.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmax.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmax.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmax.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmax.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmax.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -868,11 +868,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -880,29 +880,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmaxu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -912,11 +912,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -924,29 +924,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmaxu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmaxu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -956,11 +956,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmin.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmin.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmin.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -968,29 +968,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmin.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmin.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmin.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmin.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmin.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmin.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmin.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmin.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmin.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1000,11 +1000,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmin.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmin.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmin.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1012,29 +1012,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmin.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmin.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmin.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmin.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmin.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmin.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmin.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmin.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmin.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmin.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1044,11 +1044,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vminu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vminu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vminu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1056,29 +1056,29 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vminu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vminu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vminu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vminu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vminu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vminu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vminu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vminu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vminu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -1088,11 +1088,11 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vminu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vminu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vminu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -1100,26 +1100,26 @@ vminu.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vminu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vminu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vminu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vminu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vminu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vminu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vminu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vminu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vminu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vminu.vx v8, v8, t5
diff --git a/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-mul-div.s b/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-mul-div.s
index 0405f8463299f..20ec9c811ef84 100644
--- a/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-mul-div.s
+++ b/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-mul-div.s
@@ -1030,889 +1030,889 @@ vsmul.vx v8, v8, x30
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VV vmul.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMUL_VV vmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMUL_VX vmul.vx v8, v8, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMUL_VX vmul.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 12 21.00 12 Andes45VDIV[21] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 12 41.00 12 Andes45VDIV[41] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 12 81.00 12 Andes45VDIV[81] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 20 37.00 20 Andes45VDIV[37] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 20 73.00 20 Andes45VDIV[73] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 20 145.00 20 Andes45VDIV[145] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 36 35.00 36 Andes45VDIV[35] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 36 35.00 36 Andes45VDIV[35] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 36 69.00 36 Andes45VDIV[69] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 36 137.00 36 Andes45VDIV[137] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 36 273.00 36 Andes45VDIV[273] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 68 67.00 68 Andes45VDIV[67] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 68 133.00 68 Andes45VDIV[133] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 68 265.00 68 Andes45VDIV[265] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VV vdiv.vv v8, v8, v8
+# CHECK-NEXT: 1 68 529.00 68 Andes45VDIV[529] VDIV_VV vdiv.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 12 21.00 12 Andes45VDIV[21] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 12 41.00 12 Andes45VDIV[41] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 12 81.00 12 Andes45VDIV[81] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 20 37.00 20 Andes45VDIV[37] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 20 73.00 20 Andes45VDIV[73] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 20 145.00 20 Andes45VDIV[145] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 36 35.00 36 Andes45VDIV[35] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 36 35.00 36 Andes45VDIV[35] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 36 69.00 36 Andes45VDIV[69] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 36 137.00 36 Andes45VDIV[137] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 36 273.00 36 Andes45VDIV[273] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 68 67.00 68 Andes45VDIV[67] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 68 133.00 68 Andes45VDIV[133] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 68 265.00 68 Andes45VDIV[265] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIV_VX vdiv.vx v8, v8, t5
+# CHECK-NEXT: 1 68 529.00 68 Andes45VDIV[529] VDIV_VX vdiv.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 12 21.00 12 Andes45VDIV[21] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 12 41.00 12 Andes45VDIV[41] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 12 81.00 12 Andes45VDIV[81] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 20 37.00 20 Andes45VDIV[37] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 20 73.00 20 Andes45VDIV[73] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 20 145.00 20 Andes45VDIV[145] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 36 35.00 36 Andes45VDIV[35] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 36 35.00 36 Andes45VDIV[35] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 36 69.00 36 Andes45VDIV[69] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 36 137.00 36 Andes45VDIV[137] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 36 273.00 36 Andes45VDIV[273] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 68 67.00 68 Andes45VDIV[67] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 68 133.00 68 Andes45VDIV[133] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 68 265.00 68 Andes45VDIV[265] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VV vdivu.vv v8, v8, v8
+# CHECK-NEXT: 1 68 529.00 68 Andes45VDIV[529] VDIVU_VV vdivu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 12 21.00 12 Andes45VDIV[21] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 12 41.00 12 Andes45VDIV[41] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 12 81.00 12 Andes45VDIV[81] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 20 37.00 20 Andes45VDIV[37] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 20 73.00 20 Andes45VDIV[73] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 20 145.00 20 Andes45VDIV[145] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 36 35.00 36 Andes45VDIV[35] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 36 35.00 36 Andes45VDIV[35] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 36 69.00 36 Andes45VDIV[69] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 36 137.00 36 Andes45VDIV[137] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 36 273.00 36 Andes45VDIV[273] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 68 67.00 68 Andes45VDIV[67] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 68 133.00 68 Andes45VDIV[133] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 68 265.00 68 Andes45VDIV[265] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VDIVU_VX vdivu.vx v8, v8, t5
+# CHECK-NEXT: 1 68 529.00 68 Andes45VDIV[529] VDIVU_VX vdivu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 12 21.00 12 Andes45VDIV[21] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 12 41.00 12 Andes45VDIV[41] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 12 81.00 12 Andes45VDIV[81] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 20 37.00 20 Andes45VDIV[37] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 20 73.00 20 Andes45VDIV[73] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 20 145.00 20 Andes45VDIV[145] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 36 35.00 36 Andes45VDIV[35] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 36 35.00 36 Andes45VDIV[35] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 36 69.00 36 Andes45VDIV[69] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 36 137.00 36 Andes45VDIV[137] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 36 273.00 36 Andes45VDIV[273] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 68 67.00 68 Andes45VDIV[67] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 68 133.00 68 Andes45VDIV[133] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 68 265.00 68 Andes45VDIV[265] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VV vrem.vv v8, v8, v8
+# CHECK-NEXT: 1 68 529.00 68 Andes45VDIV[529] VREM_VV vrem.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 12 21.00 12 Andes45VDIV[21] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 12 41.00 12 Andes45VDIV[41] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 12 81.00 12 Andes45VDIV[81] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 20 37.00 20 Andes45VDIV[37] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 20 73.00 20 Andes45VDIV[73] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 20 145.00 20 Andes45VDIV[145] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 36 35.00 36 Andes45VDIV[35] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 36 35.00 36 Andes45VDIV[35] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 36 69.00 36 Andes45VDIV[69] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 36 137.00 36 Andes45VDIV[137] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 36 273.00 36 Andes45VDIV[273] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 68 67.00 68 Andes45VDIV[67] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 68 133.00 68 Andes45VDIV[133] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 68 265.00 68 Andes45VDIV[265] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREM_VX vrem.vx v8, v8, t5
+# CHECK-NEXT: 1 68 529.00 68 Andes45VDIV[529] VREM_VX vrem.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 12 21.00 12 Andes45VDIV[21] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 12 41.00 12 Andes45VDIV[41] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 12 81.00 12 Andes45VDIV[81] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 20 37.00 20 Andes45VDIV[37] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 20 73.00 20 Andes45VDIV[73] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 20 145.00 20 Andes45VDIV[145] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 36 35.00 36 Andes45VDIV[35] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 36 35.00 36 Andes45VDIV[35] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 36 69.00 36 Andes45VDIV[69] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 36 137.00 36 Andes45VDIV[137] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 36 273.00 36 Andes45VDIV[273] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 68 67.00 68 Andes45VDIV[67] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 68 133.00 68 Andes45VDIV[133] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 68 265.00 68 Andes45VDIV[265] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VV vremu.vv v8, v8, v8
+# CHECK-NEXT: 1 68 529.00 68 Andes45VDIV[529] VREMU_VV vremu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 12 11.00 12 Andes45VDIV[11] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 12 21.00 12 Andes45VDIV[21] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 12 41.00 12 Andes45VDIV[41] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 12 81.00 12 Andes45VDIV[81] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 20 19.00 20 Andes45VDIV[19] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 20 37.00 20 Andes45VDIV[37] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 20 73.00 20 Andes45VDIV[73] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 20 145.00 20 Andes45VDIV[145] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 36 35.00 36 Andes45VDIV[35] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 36 35.00 36 Andes45VDIV[35] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 36 69.00 36 Andes45VDIV[69] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 36 137.00 36 Andes45VDIV[137] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 36 273.00 36 Andes45VDIV[273] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 68 67.00 68 Andes45VDIV[67] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 68 133.00 68 Andes45VDIV[133] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 68 265.00 68 Andes45VDIV[265] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VDIV VREMU_VX vremu.vx v8, v8, t5
+# CHECK-NEXT: 1 68 529.00 68 Andes45VDIV[529] VREMU_VX vremu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VV vmulh.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULH_VV vmulh.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULH_VX vmulh.vx v8, v8, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULH_VX vmulh.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VV vmulhu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULHU_VV vmulhu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHU_VX vmulhu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULHU_VX vmulhu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VV vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULHSU_VV vmulhsu.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VMULHSU_VX vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VMULHSU_VX vmulhsu.vx v8, v8, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VV vwmul.vv v8, v16, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMUL_VV vwmul.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMUL_VX vwmul.vx v8, v16, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMUL_VX vwmul.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VV vwmulu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMULU_VV vwmulu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULU_VX vwmulu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMULU_VX vwmulu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VV vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMULSU_VV vwmulsu.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 1.00 4 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 2.00 4 Andes45VMAC[2] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 4.00 4 Andes45VMAC[4] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VWMULSU_VX vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: 1 4 8.00 4 Andes45VMAC[8] VWMULSU_VX vwmulsu.vx v8, v16, t5
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 Andes45VMAC VSMUL_VV vsmul.vv v8, v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2023,7 +2023,7 @@ vsmul.vx v8, v8, x30
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
-# CHECK-NEXT: - - 486.00 - - - - - - - 176.00 - - - 310.00 - -
+# CHECK-NEXT: - - 486.00 - - - - - - - 16336.00 - - - 860.00 - -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] Instructions:
@@ -2036,11 +2036,11 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmul.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmul.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmul.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2048,29 +2048,29 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmul.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmul.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmul.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmul.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmul.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmul.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmul.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmul.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmul.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2080,11 +2080,11 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmul.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmul.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmul.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2092,381 +2092,381 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmul.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmul.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmul.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmul.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmul.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmul.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmul.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmul.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmul.vx v8, v8, t5
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# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
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+# CHECK-NEXT: - - - - - - - - - - 265.00 - - - - - - vrem.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vrem.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 529.00 - - - - - - vrem.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 11.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 11.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 11.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 11.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 21.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 41.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 81.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 19.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 19.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 19.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 37.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 73.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 145.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 35.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 35.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 69.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 137.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 273.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 67.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 133.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 265.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - 529.00 - - - - - - vremu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 11.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 11.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 11.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 11.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 21.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 41.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 81.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 19.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 19.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 19.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 37.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 73.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 145.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 35.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 35.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 69.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 137.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 273.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 67.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 133.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 265.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - 1.00 - - - - - - vremu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - 529.00 - - - - - - vremu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2476,11 +2476,11 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulh.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulh.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulh.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2488,29 +2488,29 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulh.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulh.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulh.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulh.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulh.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulh.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulh.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulh.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulh.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2520,11 +2520,11 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulh.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulh.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulh.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2532,29 +2532,29 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulh.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulh.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulh.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulh.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulh.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulh.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulh.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulh.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulh.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulh.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2564,11 +2564,11 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2576,29 +2576,29 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulhu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2608,11 +2608,11 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2620,29 +2620,29 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulhu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2652,11 +2652,11 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2664,29 +2664,29 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vv v8, v8, v8
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulhsu.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2696,11 +2696,11 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2708,29 +2708,29 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vmulhsu.vx v8, v8, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vmulhsu.vx v8, v8, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2738,29 +2738,29 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmul.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmul.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmul.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmul.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmul.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmul.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmul.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmul.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmul.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2768,29 +2768,29 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmul.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmul.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmul.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmul.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmul.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmul.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmul.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmul.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmul.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmul.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2798,29 +2798,29 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmulu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2828,29 +2828,29 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmulu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2858,29 +2858,29 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vv v8, v16, v24
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmulsu.vv v8, v16, v24
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2888,29 +2888,29 @@ vsmul.vx v8, v8, x30
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf8, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 2.00 - - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 4.00 - - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vwmulsu.vx v8, v16, t5
+# CHECK-NEXT: - - - - - - - - - - - - - - 8.00 - - vwmulsu.vx v8, v16, t5
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - 1.00 - - vsmul.vv v8, v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
diff --git a/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-permutation.s b/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-permutation.s
index 40ca2678c30cc..82f6c4acfd072 100644
--- a/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-permutation.s
+++ b/llvm/test/tools/llvm-mca/RISCV/Andes45/rvv-permutation.s
@@ -1206,137 +1206,137 @@ vfslide1up.vf v8, v16, ft0
# CHECK: [1] [2] [3] [4] [5] [6] [7] [8] [9] Instructions:
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_V vmv.v.v v8, v8
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_V vmv.v.v v8, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_X vmv.v.x v8, s0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_X vmv.v.x v8, s0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMV_V_I vmv.v.i v8, 12
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMV_V_I vmv.v.i v8, 12
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VMV_X_S vmv.x.s s0, v8
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
@@ -2128,137 +2128,137 @@ vfslide1up.vf v8, v16, ft0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
# CHECK-NEXT: 1 1 1.00 1 Andes45VPERMUT VRGATHEREI16_VV vrgatherei16.vv v8, v16, v24
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VIM vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VIM vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VVM vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VVM vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, mf8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, mf2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m1, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 1.00 2 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 2.00 2 Andes45VALU[2] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 4.00 2 Andes45VALU[4] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: 1 1 1.00 1 Andes45VALU VMERGE_VXM vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: 1 2 8.00 2 Andes45VALU[8] VMERGE_VXM vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: 1 1 1.00 1 Andes45VFMIS VFMERGE_VFM vfmerge.vfm v8, v8, ft0, v0
# CHECK-NEXT: 1 1 1.00 U 1 Andes45CSR VSETVLI vsetvli t3, zero, e16, mf4, tu, mu
@@ -2371,7 +2371,7 @@ vfslide1up.vf v8, v16, ft0
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15]
-# CHECK-NEXT: - - 572.00 - - - - - - 132.00 - - 15.00 - - 22.00 403.00
+# CHECK-NEXT: - - 572.00 - - - - - - 396.00 - - 15.00 - - 22.00 403.00
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0.0] [0.1] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] Instructions:
@@ -2384,11 +2384,11 @@ vfslide1up.vf v8, v16, ft0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.v v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.v v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.v v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2396,29 +2396,29 @@ vfslide1up.vf v8, v16, ft0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.v v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.v v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.v v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.v v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.v v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.v v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.v v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.v v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.v v8, v8
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.v v8, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2428,11 +2428,11 @@ vfslide1up.vf v8, v16, ft0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.x v8, s0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.x v8, s0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.x v8, s0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2440,29 +2440,29 @@ vfslide1up.vf v8, v16, ft0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.x v8, s0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.x v8, s0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.x v8, s0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.x v8, s0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.x v8, s0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.x v8, s0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.x v8, s0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.x v8, s0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.x v8, s0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.x v8, s0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -2472,11 +2472,11 @@ vfslide1up.vf v8, v16, ft0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.i v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.i v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.i v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -2484,29 +2484,29 @@ vfslide1up.vf v8, v16, ft0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.i v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.i v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.i v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.i v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.i v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.i v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmv.v.i v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmv.v.i v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmv.v.i v8, 12
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmv.v.i v8, 12
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - - - - - 1.00 vmv.x.s s0, v8
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3306,11 +3306,11 @@ vfslide1up.vf v8, v16, ft0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -3318,29 +3318,29 @@ vfslide1up.vf v8, v16, ft0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vim v8, v8, 12, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmerge.vim v8, v8, 12, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3350,11 +3350,11 @@ vfslide1up.vf v8, v16, ft0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -3362,29 +3362,29 @@ vfslide1up.vf v8, v16, ft0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmerge.vvm v8, v8, v8, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, mf4, tu, mu
@@ -3394,11 +3394,11 @@ vfslide1up.vf v8, v16, ft0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e8, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu
@@ -3406,29 +3406,29 @@ vfslide1up.vf v8, v16, ft0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e32, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m1, tu, mu
# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m2, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 2.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m4, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 4.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e64, m8, tu, mu
-# CHECK-NEXT: - - - - - - - - - 1.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
+# CHECK-NEXT: - - - - - - - - - 8.00 - - - - - - - vmerge.vxm v8, v8, t5, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf2, tu, mu
# CHECK-NEXT: - - - - - - - - - - - - 1.00 - - - - vfmerge.vfm v8, v8, ft0, v0
# CHECK-NEXT: - - 1.00 - - - - - - - - - - - - - - vsetvli t3, zero, e16, mf4, tu, mu