[llvm] [AMDGPU][GFX12.5] Add support for emitting memory operations with nv bit set (PR #179413)

[Matt Arsenault via llvm-commits]

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@@ -0,0 +1,346 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -O3 -mcpu=gfx1200 -mattr=+cumode < %s | FileCheck --check-prefixes=GFX12-CU %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -O3 -mcpu=gfx1250 < %s | FileCheck --check-prefixes=GFX1250,GFX1250-DAGISEL %s
+; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -O3 -mcpu=gfx1250 < %s | FileCheck --check-prefixes=GFX1250,GFX1250-GISEL %s
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arsenm wrote:

No -O3, and if you are mixing global isel and not-globalisel run lines, explicitly disable it for the dag run lines 

https://github.com/llvm/llvm-project/pull/179413