[lld] [lld][RISC-V] Implement Qualcomm Relocations (PR #178584)

[Owen Anderson via llvm-commits]

resistor wrote:

> Out of interest, what happens for vendor specific intrinsics and codegen, particularly when this spills outside of the RISCV target? Is there any existing guidance for contributors?

I'm not aware of a lot of precedent for RISCV vendor-specific code generation specifically, but backend of all forms do sometimes leak code regarding target-specific intrinsics into IR-level optimization passes, particularly InstCombine. I'm not aware of any specific policy beyond a generalized "please try to do it in a target-independent way first".

https://github.com/llvm/llvm-project/pull/178584