[llvm] [NewPM] Port x86-lvi-load (PR #179371)
Anshul Nigham via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 4 09:23:08 PST 2026
https://github.com/nigham updated https://github.com/llvm/llvm-project/pull/179371
>From 1f5384bc66d4d5c6bd9d3f041d0887a3e1344d24 Mon Sep 17 00:00:00 2001
From: Anshul Nigham <nigham at google.com>
Date: Mon, 2 Feb 2026 16:24:37 -0800
Subject: [PATCH 1/5] [NewPM] Port x86-lvi-load
---
llvm/lib/Target/X86/X86.h | 12 ++-
llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp | 3 +-
.../X86LoadValueInjectionLoadHardening.cpp | 92 +++++++++++++------
llvm/lib/Target/X86/X86PassRegistry.def | 2 +-
llvm/lib/Target/X86/X86TargetMachine.cpp | 4 +-
llvm/test/CodeGen/X86/llc-pipeline-npm.ll | 4 +
6 files changed, 80 insertions(+), 37 deletions(-)
diff --git a/llvm/lib/Target/X86/X86.h b/llvm/lib/Target/X86/X86.h
index 95b3116398249..89ebd59539686 100644
--- a/llvm/lib/Target/X86/X86.h
+++ b/llvm/lib/Target/X86/X86.h
@@ -361,7 +361,15 @@ InstructionSelector *createX86InstructionSelector(const X86TargetMachine &TM,
FunctionPass *createX86PostLegalizerCombiner();
FunctionPass *createX86PreLegalizerCombiner();
-FunctionPass *createX86LoadValueInjectionLoadHardeningPass();
+
+class X86LoadValueInjectionLoadHardeningPass
+ : public PassInfoMixin<X86LoadValueInjectionLoadHardeningPass> {
+public:
+ PreservedAnalyses run(MachineFunction &MF,
+ MachineFunctionAnalysisManager &MFAM);
+};
+
+FunctionPass *createX86LoadValueInjectionLoadHardeningLegacyPass();
class X86LoadValueInjectionRetHardeningPass
: public PassInfoMixin<X86LoadValueInjectionRetHardeningPass> {
@@ -421,7 +429,7 @@ void initializeX86FastPreTileConfigLegacyPass(PassRegistry &);
void initializeX86FastTileConfigLegacyPass(PassRegistry &);
void initializeX86FixupSetCCLegacyPass(PassRegistry &);
void initializeX86FlagsCopyLoweringLegacyPass(PassRegistry &);
-void initializeX86LoadValueInjectionLoadHardeningPassPass(PassRegistry &);
+void initializeX86LoadValueInjectionLoadHardeningLegacyPass(PassRegistry &);
void initializeX86LoadValueInjectionRetHardeningLegacyPass(PassRegistry &);
void initializeX86LowerAMXIntrinsicsLegacyPassPass(PassRegistry &);
void initializeX86LowerAMXTypeLegacyPassPass(PassRegistry &);
diff --git a/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp b/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
index 74256b13ecf6b..7dcac09af066f 100644
--- a/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+++ b/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
@@ -234,8 +234,7 @@ void X86CodeGenPassBuilder::addPreEmitPass2(PassManagerWrapper &PMW) const {
// ported.
}
- // TODO(boomanaiden154): Add X86LoadValueInjectionRetHardeningPass here once
- // it has been ported.
+ addMachineFunctionPass(X86LoadValueInjectionLoadHardeningPass(), PMW);
// Insert pseudo probe annotation for callsite profiling
// TODO(boomanaiden154): Add PseudoProberInserterPass here once it has been
diff --git a/llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp b/llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
index 9f797f4d6d5f3..35223ca8505f1 100644
--- a/llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
+++ b/llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
@@ -133,17 +133,27 @@ struct MachineGadgetGraph : ImmutableGraph<MachineInstr *, int> {
int NumGadgets;
};
-class X86LoadValueInjectionLoadHardeningPass : public MachineFunctionPass {
+constexpr StringRef X86LVILHPassName =
+ "X86 Load Value Injection (LVI) Load Hardening";
+
+class X86LoadValueInjectionLoadHardeningLegacy : public MachineFunctionPass {
public:
- X86LoadValueInjectionLoadHardeningPass() : MachineFunctionPass(ID) {}
+ X86LoadValueInjectionLoadHardeningLegacy() : MachineFunctionPass(ID) {}
- StringRef getPassName() const override {
- return "X86 Load Value Injection (LVI) Load Hardening";
- }
+ StringRef getPassName() const override { return X86LVILHPassName; }
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnMachineFunction(MachineFunction &MF) override;
static char ID;
+};
+
+class X86LoadValueInjectionLoadHardeningImpl {
+public:
+ X86LoadValueInjectionLoadHardeningImpl() = default;
+
+ bool run(MachineFunction &MF, const MachineLoopInfo &MLI,
+ const MachineDominatorTree &MDT,
+ const MachineDominanceFrontier &MDF);
private:
using GraphBuilder = ImmutableGraphBuilder<MachineGadgetGraph>;
@@ -227,9 +237,9 @@ struct DOTGraphTraits<MachineGadgetGraph *> : DefaultDOTGraphTraits {
} // end namespace llvm
-char X86LoadValueInjectionLoadHardeningPass::ID = 0;
+char X86LoadValueInjectionLoadHardeningLegacy::ID = 0;
-void X86LoadValueInjectionLoadHardeningPass::getAnalysisUsage(
+void X86LoadValueInjectionLoadHardeningLegacy::getAnalysisUsage(
AnalysisUsage &AU) const {
MachineFunctionPass::getAnalysisUsage(AU);
AU.addRequired<MachineLoopInfoWrapperPass>();
@@ -244,9 +254,10 @@ static void writeGadgetGraph(raw_ostream &OS, MachineFunction &MF,
"Speculative gadgets for \"" + MF.getName() + "\" function");
}
-bool X86LoadValueInjectionLoadHardeningPass::runOnMachineFunction(
- MachineFunction &MF) {
- LLVM_DEBUG(dbgs() << "***** " << getPassName() << " : " << MF.getName()
+bool X86LoadValueInjectionLoadHardeningImpl::run(
+ MachineFunction &MF, const MachineLoopInfo &MLI,
+ const MachineDominatorTree &MDT, const MachineDominanceFrontier &MDF) {
+ LLVM_DEBUG(dbgs() << "***** " << X86LVILHPassName << " : " << MF.getName()
<< " *****\n");
STI = &MF.getSubtarget<X86Subtarget>();
if (!STI->useLVILoadHardening())
@@ -256,18 +267,10 @@ bool X86LoadValueInjectionLoadHardeningPass::runOnMachineFunction(
if (!STI->is64Bit())
report_fatal_error("LVI load hardening is only supported on 64-bit", false);
- // Don't skip functions with the "optnone" attr but participate in opt-bisect.
- const Function &F = MF.getFunction();
- if (!F.hasOptNone() && skipFunction(F))
- return false;
-
++NumFunctionsConsidered;
TII = STI->getInstrInfo();
TRI = STI->getRegisterInfo();
LLVM_DEBUG(dbgs() << "Building gadget graph...\n");
- const auto &MLI = getAnalysis<MachineLoopInfoWrapperPass>().getLI();
- const auto &MDT = getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
- const auto &MDF = getAnalysis<MachineDominanceFrontierWrapperPass>().getMDF();
std::unique_ptr<MachineGadgetGraph> Graph = getGadgetGraph(MF, MLI, MDT, MDF);
LLVM_DEBUG(dbgs() << "Building gadget graph... Done\n");
if (Graph == nullptr)
@@ -319,7 +322,7 @@ bool X86LoadValueInjectionLoadHardeningPass::runOnMachineFunction(
}
std::unique_ptr<MachineGadgetGraph>
-X86LoadValueInjectionLoadHardeningPass::getGadgetGraph(
+X86LoadValueInjectionLoadHardeningImpl::getGadgetGraph(
MachineFunction &MF, const MachineLoopInfo &MLI,
const MachineDominatorTree &MDT,
const MachineDominanceFrontier &MDF) const {
@@ -532,7 +535,7 @@ X86LoadValueInjectionLoadHardeningPass::getGadgetGraph(
}
// Returns the number of remaining gadget edges that could not be eliminated
-int X86LoadValueInjectionLoadHardeningPass::elimMitigatedEdgesAndNodes(
+int X86LoadValueInjectionLoadHardeningImpl::elimMitigatedEdgesAndNodes(
MachineGadgetGraph &G, EdgeSet &ElimEdges /* in, out */,
NodeSet &ElimNodes /* in, out */) const {
if (G.NumFences > 0) {
@@ -587,7 +590,7 @@ int X86LoadValueInjectionLoadHardeningPass::elimMitigatedEdgesAndNodes(
}
std::unique_ptr<MachineGadgetGraph>
-X86LoadValueInjectionLoadHardeningPass::trimMitigatedEdges(
+X86LoadValueInjectionLoadHardeningImpl::trimMitigatedEdges(
std::unique_ptr<MachineGadgetGraph> Graph) const {
NodeSet ElimNodes{*Graph};
EdgeSet ElimEdges{*Graph};
@@ -603,7 +606,7 @@ X86LoadValueInjectionLoadHardeningPass::trimMitigatedEdges(
return Graph;
}
-int X86LoadValueInjectionLoadHardeningPass::hardenLoadsWithPlugin(
+int X86LoadValueInjectionLoadHardeningImpl::hardenLoadsWithPlugin(
MachineFunction &MF, std::unique_ptr<MachineGadgetGraph> Graph) const {
int FencesInserted = 0;
@@ -648,7 +651,7 @@ int X86LoadValueInjectionLoadHardeningPass::hardenLoadsWithPlugin(
return FencesInserted;
}
-int X86LoadValueInjectionLoadHardeningPass::hardenLoadsWithHeuristic(
+int X86LoadValueInjectionLoadHardeningImpl::hardenLoadsWithHeuristic(
MachineFunction &MF, std::unique_ptr<MachineGadgetGraph> Graph) const {
// If `MF` does not have any fences, then no gadgets would have been
// mitigated at this point.
@@ -714,7 +717,7 @@ int X86LoadValueInjectionLoadHardeningPass::hardenLoadsWithHeuristic(
return FencesInserted;
}
-int X86LoadValueInjectionLoadHardeningPass::insertFences(
+int X86LoadValueInjectionLoadHardeningImpl::insertFences(
MachineFunction &MF, MachineGadgetGraph &G,
EdgeSet &CutEdges /* in, out */) const {
int FencesInserted = 0;
@@ -758,7 +761,7 @@ int X86LoadValueInjectionLoadHardeningPass::insertFences(
return FencesInserted;
}
-bool X86LoadValueInjectionLoadHardeningPass::instrUsesRegToAccessMemory(
+bool X86LoadValueInjectionLoadHardeningImpl::instrUsesRegToAccessMemory(
const MachineInstr &MI, Register Reg) const {
if (!MI.mayLoadOrStore() || MI.getOpcode() == X86::MFENCE ||
MI.getOpcode() == X86::SFENCE || MI.getOpcode() == X86::LFENCE)
@@ -782,7 +785,7 @@ bool X86LoadValueInjectionLoadHardeningPass::instrUsesRegToAccessMemory(
TRI->regsOverlap(IndexMO.getReg(), Reg));
}
-bool X86LoadValueInjectionLoadHardeningPass::instrUsesRegToBranch(
+bool X86LoadValueInjectionLoadHardeningImpl::instrUsesRegToBranch(
const MachineInstr &MI, Register Reg) const {
if (!MI.isConditionalBranch())
return false;
@@ -792,14 +795,43 @@ bool X86LoadValueInjectionLoadHardeningPass::instrUsesRegToBranch(
return false;
}
-INITIALIZE_PASS_BEGIN(X86LoadValueInjectionLoadHardeningPass, PASS_KEY,
+bool X86LoadValueInjectionLoadHardeningLegacy::runOnMachineFunction(
+ MachineFunction &MF) {
+ // Don't skip functions with the "optnone" attr but participate in opt-bisect.
+ // Note: Not needed for new PM impl, where it is handled at the PM level.
+ const Function &F = MF.getFunction();
+ if (!F.hasOptNone() && skipFunction(F))
+ return false;
+
+ const auto &MLI = getAnalysis<MachineLoopInfoWrapperPass>().getLI();
+ const auto &MDT = getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
+ const auto &MDF = getAnalysis<MachineDominanceFrontierWrapperPass>().getMDF();
+
+ X86LoadValueInjectionLoadHardeningImpl Impl;
+ return Impl.run(MF, MLI, MDT, MDF);
+}
+
+PreservedAnalyses X86LoadValueInjectionLoadHardeningPass::run(
+ MachineFunction &MF, MachineFunctionAnalysisManager &MFAM) {
+ const auto &MLI = MFAM.getResult<MachineLoopAnalysis>(MF);
+ const auto &MDT = MFAM.getResult<MachineDominatorTreeAnalysis>(MF);
+ const auto &MDF = MFAM.getResult<MachineDominanceFrontierAnalysis>(MF);
+
+ X86LoadValueInjectionLoadHardeningImpl Impl;
+ const bool Modified = Impl.run(MF, MLI, MDT, MDF);
+ return Modified ? getMachineFunctionPassPreservedAnalyses()
+ .preserveSet<CFGAnalyses>()
+ : PreservedAnalyses::all();
+}
+
+INITIALIZE_PASS_BEGIN(X86LoadValueInjectionLoadHardeningLegacy, PASS_KEY,
"X86 LVI load hardening", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass)
INITIALIZE_PASS_DEPENDENCY(MachineDominanceFrontierWrapperPass)
-INITIALIZE_PASS_END(X86LoadValueInjectionLoadHardeningPass, PASS_KEY,
+INITIALIZE_PASS_END(X86LoadValueInjectionLoadHardeningLegacy, PASS_KEY,
"X86 LVI load hardening", false, false)
-FunctionPass *llvm::createX86LoadValueInjectionLoadHardeningPass() {
- return new X86LoadValueInjectionLoadHardeningPass();
+FunctionPass *llvm::createX86LoadValueInjectionLoadHardeningLegacyPass() {
+ return new X86LoadValueInjectionLoadHardeningLegacy();
}
diff --git a/llvm/lib/Target/X86/X86PassRegistry.def b/llvm/lib/Target/X86/X86PassRegistry.def
index 615bb16e0c595..4fb6935712818 100644
--- a/llvm/lib/Target/X86/X86PassRegistry.def
+++ b/llvm/lib/Target/X86/X86PassRegistry.def
@@ -49,6 +49,7 @@ MACHINE_FUNCTION_PASS("x86-flags-copy-lowering", X86FlagsCopyLoweringPass())
MACHINE_FUNCTION_PASS("x86-fp-stackifier", X86FPStackifierPass())
MACHINE_FUNCTION_PASS("x86-isel", X86ISelDAGToDAGPass(*this))
MACHINE_FUNCTION_PASS("x86-lower-tile-copy", X86LowerTileCopyPass())
+MACHINE_FUNCTION_PASS("x86-lvi-load", X86LoadValueInjectionLoadHardeningPass())
MACHINE_FUNCTION_PASS("x86-lvi-ret", X86LoadValueInjectionRetHardeningPass())
MACHINE_FUNCTION_PASS("x86-optimize-leas", X86OptimizeLEAsPass())
MACHINE_FUNCTION_PASS("x86-pre-tile-config", X86PreTileConfigPass())
@@ -70,6 +71,5 @@ DUMMY_MACHINE_FUNCTION_PASS("x86-indirect-branch-tracking", X86IndirectBranchTra
DUMMY_MACHINE_FUNCTION_PASS("x86-indirect-thunks", X86IndirectThunks())
DUMMY_MACHINE_FUNCTION_PASS("x86-insert-x87-wait", X86InsertX87WaitPass())
DUMMY_MACHINE_FUNCTION_PASS("x86-issue-vzero-upper", X86IssueVZeroUpperPass())
-DUMMY_MACHINE_FUNCTION_PASS("x86-lvi-load", X86LoadValueInjectionLoadHardeningPass())
DUMMY_MACHINE_FUNCTION_PASS("x86-pad-short-functions", X86PadShortFunctionsPass())
#undef DUMMY_MACHINE_FUNCTION_PASS
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index 96afcbf21c78f..81c18fecd43b0 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -94,7 +94,7 @@ extern "C" LLVM_C_ABI void LLVMInitializeX86Target() {
initializeX86SpeculativeLoadHardeningLegacyPass(PR);
initializeX86SpeculativeExecutionSideEffectSuppressionLegacyPass(PR);
initializeX86FlagsCopyLoweringLegacyPass(PR);
- initializeX86LoadValueInjectionLoadHardeningPassPass(PR);
+ initializeX86LoadValueInjectionLoadHardeningLegacyPass(PR);
initializeX86LoadValueInjectionRetHardeningLegacyPass(PR);
initializeX86OptimizeLEAsLegacyPass(PR);
initializeX86PartialReductionLegacyPass(PR);
@@ -552,7 +552,7 @@ void X86PassConfig::addPostRegAlloc() {
// mitigation. This is to prevent slow downs due to
// analyses needed by the LVIHardening pass when compiling at -O0.
if (getOptLevel() != CodeGenOptLevel::None)
- addPass(createX86LoadValueInjectionLoadHardeningPass());
+ addPass(createX86LoadValueInjectionLoadHardeningLegacyPass());
}
void X86PassConfig::addPreSched2() {
diff --git a/llvm/test/CodeGen/X86/llc-pipeline-npm.ll b/llvm/test/CodeGen/X86/llc-pipeline-npm.ll
index 3f3a992b1b23f..5752c831dcff8 100644
--- a/llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+++ b/llvm/test/CodeGen/X86/llc-pipeline-npm.ll
@@ -64,6 +64,7 @@
; O0-NEXT: stack-frame-layout
; O0-NEXT: x86-seses
; O0-NEXT: x86-return-thunks
+; O0-NEXT: x86-lvi-load
; O0-NEXT: verify)
; O0-NEXT: free-machine-function)
@@ -175,6 +176,7 @@
; O2-NEXT: stack-frame-layout
; O2-NEXT: x86-seses
; O2-NEXT: x86-return-thunks
+; O2-NEXT: x86-lvi-load
; O2-NEXT: verify)
; O2-NEXT: free-machine-function)
@@ -235,6 +237,7 @@
; O0-WINDOWS-NEXT: x86-seses
; O0-WINDOWS-NEXT: x86-return-thunks
; O0-WINDOWS-NEXT: x86-avoid-trailing-call
+; O0-WINDOWS-NEXT: x86-lvi-load
; O0-WINDOWS-NEXT: x86-wineh-unwindv2
; O0-WINDOWS-NEXT: verify)
; O0-WINDOWS-NEXT: free-machine-function)
@@ -350,6 +353,7 @@
; O3-WINDOWS-NEXT: x86-seses
; O3-WINDOWS-NEXT: x86-return-thunks
; O3-WINDOWS-NEXT: x86-avoid-trailing-call
+; O3-WINDOWS-NEXT: x86-lvi-load
; O3-WINDOWS-NEXT: x86-wineh-unwindv2
; O3-WINDOWS-NEXT: verify)
; O3-WINDOWS-NEXT: free-machine-function)
>From c5f6eea58f8677866063ab3f5978815f63393d2a Mon Sep 17 00:00:00 2001
From: Anshul Nigham <nigham at google.com>
Date: Mon, 2 Feb 2026 16:30:13 -0800
Subject: [PATCH 2/5] Update x86-lvi-load to run under optnone
---
llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp b/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
index 7dcac09af066f..5f7011c7e3adc 100644
--- a/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+++ b/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
@@ -159,6 +159,7 @@ void X86CodeGenPassBuilder::addPostRegAlloc(PassManagerWrapper &PMW) const {
// analyses needed by the LVIHardening pass when compiling at -O0.
if (getOptLevel() != CodeGenOptLevel::None) {
addMachineFunctionPass(X86LoadValueInjectionRetHardeningPass(), PMW);
+ addMachineFunctionPass(X86LoadValueInjectionLoadHardeningPass(), PMW);
}
}
@@ -234,8 +235,6 @@ void X86CodeGenPassBuilder::addPreEmitPass2(PassManagerWrapper &PMW) const {
// ported.
}
- addMachineFunctionPass(X86LoadValueInjectionLoadHardeningPass(), PMW);
-
// Insert pseudo probe annotation for callsite profiling
// TODO(boomanaiden154): Add PseudoProberInserterPass here once it has been
// ported.
>From 146d672fcdd973d81b576d05aad011f7f3d8edc3 Mon Sep 17 00:00:00 2001
From: Anshul Nigham <nigham at google.com>
Date: Mon, 2 Feb 2026 18:08:24 -0800
Subject: [PATCH 3/5] Move x86-lvi-load into addPostRegAlloc
---
llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp | 3 +++
llvm/test/CodeGen/X86/llc-pipeline-npm.ll | 6 ++----
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp b/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
index 5f7011c7e3adc..b70bbb0b4ce69 100644
--- a/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+++ b/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
@@ -235,6 +235,9 @@ void X86CodeGenPassBuilder::addPreEmitPass2(PassManagerWrapper &PMW) const {
// ported.
}
+ // TODO(boomanaiden154): Add X86LoadValueInjectionRetHardeningPass here once
+ // it has been ported.
+
// Insert pseudo probe annotation for callsite profiling
// TODO(boomanaiden154): Add PseudoProberInserterPass here once it has been
// ported.
diff --git a/llvm/test/CodeGen/X86/llc-pipeline-npm.ll b/llvm/test/CodeGen/X86/llc-pipeline-npm.ll
index 5752c831dcff8..7bedd087a11ec 100644
--- a/llvm/test/CodeGen/X86/llc-pipeline-npm.ll
+++ b/llvm/test/CodeGen/X86/llc-pipeline-npm.ll
@@ -64,7 +64,6 @@
; O0-NEXT: stack-frame-layout
; O0-NEXT: x86-seses
; O0-NEXT: x86-return-thunks
-; O0-NEXT: x86-lvi-load
; O0-NEXT: verify)
; O0-NEXT: free-machine-function)
@@ -146,6 +145,7 @@
; O2-NEXT: x86-lower-tile-copy
; O2-NEXT: x86-fp-stackifier
; O2-NEXT: x86-lvi-ret
+; O2-NEXT: x86-lvi-load
; O2-NEXT: remove-redundant-debug-values
; O2-NEXT: fixup-statepoint-caller-saved
; O2-NEXT: postra-machine-sink
@@ -176,7 +176,6 @@
; O2-NEXT: stack-frame-layout
; O2-NEXT: x86-seses
; O2-NEXT: x86-return-thunks
-; O2-NEXT: x86-lvi-load
; O2-NEXT: verify)
; O2-NEXT: free-machine-function)
@@ -237,7 +236,6 @@
; O0-WINDOWS-NEXT: x86-seses
; O0-WINDOWS-NEXT: x86-return-thunks
; O0-WINDOWS-NEXT: x86-avoid-trailing-call
-; O0-WINDOWS-NEXT: x86-lvi-load
; O0-WINDOWS-NEXT: x86-wineh-unwindv2
; O0-WINDOWS-NEXT: verify)
; O0-WINDOWS-NEXT: free-machine-function)
@@ -322,6 +320,7 @@
; O3-WINDOWS-NEXT: x86-lower-tile-copy
; O3-WINDOWS-NEXT: x86-fp-stackifier
; O3-WINDOWS-NEXT: x86-lvi-ret
+; O3-WINDOWS-NEXT: x86-lvi-load
; O3-WINDOWS-NEXT: remove-redundant-debug-values
; O3-WINDOWS-NEXT: fixup-statepoint-caller-saved
; O3-WINDOWS-NEXT: postra-machine-sink
@@ -353,7 +352,6 @@
; O3-WINDOWS-NEXT: x86-seses
; O3-WINDOWS-NEXT: x86-return-thunks
; O3-WINDOWS-NEXT: x86-avoid-trailing-call
-; O3-WINDOWS-NEXT: x86-lvi-load
; O3-WINDOWS-NEXT: x86-wineh-unwindv2
; O3-WINDOWS-NEXT: verify)
; O3-WINDOWS-NEXT: free-machine-function)
>From 13d273d2feca8dae0558fd8169f3b104d83ec04d Mon Sep 17 00:00:00 2001
From: Anshul Nigham <nigham at google.com>
Date: Mon, 2 Feb 2026 18:11:28 -0800
Subject: [PATCH 4/5] Add TODO to move x86-lvi-ret to correct location
---
llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp | 1 +
1 file changed, 1 insertion(+)
diff --git a/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp b/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
index b70bbb0b4ce69..a7c9990e3fbb6 100644
--- a/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
+++ b/llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
@@ -158,6 +158,7 @@ void X86CodeGenPassBuilder::addPostRegAlloc(PassManagerWrapper &PMW) const {
// mitigation. This is to prevent slow downs due to
// analyses needed by the LVIHardening pass when compiling at -O0.
if (getOptLevel() != CodeGenOptLevel::None) {
+ // TODO(nigham): Move LoadValueInjectionRetHardeningPass to PreEmitPass2.
addMachineFunctionPass(X86LoadValueInjectionRetHardeningPass(), PMW);
addMachineFunctionPass(X86LoadValueInjectionLoadHardeningPass(), PMW);
}
>From d1eaf5201aa391331e2e8ed246fa2dc450d4856c Mon Sep 17 00:00:00 2001
From: Anshul Nigham <nigham at google.com>
Date: Wed, 4 Feb 2026 09:22:33 -0800
Subject: [PATCH 5/5] Return w/o analyses computation if disabled
---
.../X86/X86LoadValueInjectionLoadHardening.cpp | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp b/llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
index 35223ca8505f1..871081e328724 100644
--- a/llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
+++ b/llvm/lib/Target/X86/X86LoadValueInjectionLoadHardening.cpp
@@ -260,8 +260,6 @@ bool X86LoadValueInjectionLoadHardeningImpl::run(
LLVM_DEBUG(dbgs() << "***** " << X86LVILHPassName << " : " << MF.getName()
<< " *****\n");
STI = &MF.getSubtarget<X86Subtarget>();
- if (!STI->useLVILoadHardening())
- return false;
// FIXME: support 32-bit
if (!STI->is64Bit())
@@ -803,6 +801,11 @@ bool X86LoadValueInjectionLoadHardeningLegacy::runOnMachineFunction(
if (!F.hasOptNone() && skipFunction(F))
return false;
+ // Bail early (without computing analyses) if LVI load hardening is disabled.
+ if (!MF.getSubtarget<X86Subtarget>().useLVILoadHardening()) {
+ return false;
+ }
+
const auto &MLI = getAnalysis<MachineLoopInfoWrapperPass>().getLI();
const auto &MDT = getAnalysis<MachineDominatorTreeWrapperPass>().getDomTree();
const auto &MDF = getAnalysis<MachineDominanceFrontierWrapperPass>().getMDF();
@@ -813,6 +816,11 @@ bool X86LoadValueInjectionLoadHardeningLegacy::runOnMachineFunction(
PreservedAnalyses X86LoadValueInjectionLoadHardeningPass::run(
MachineFunction &MF, MachineFunctionAnalysisManager &MFAM) {
+ // Bail early (without computing analyses) if LVI load hardening is disabled.
+ if (!MF.getSubtarget<X86Subtarget>().useLVILoadHardening()) {
+ return PreservedAnalyses::all();
+ }
+
const auto &MLI = MFAM.getResult<MachineLoopAnalysis>(MF);
const auto &MDT = MFAM.getResult<MachineDominatorTreeAnalysis>(MF);
const auto &MDF = MFAM.getResult<MachineDominanceFrontierAnalysis>(MF);
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