[llvm] [AArch64] NFC: Replace CTTZ_ELTS predicate pattern with predicate. (PR #179909)

Paul Walker via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 5 03:34:00 PST 2026


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@@ -6051,9 +6053,8 @@ static SDValue optimizeBrk(SDNode *N, SelectionDAG &DAG) {
   if (Upper.getOpcode() != AArch64ISD::CTTZ_ELTS || !VT.isScalableVector())
     return SDValue();
 
-  SDValue Mask = Upper->getOperand(0);
-  const APInt &PgPattern = Upper.getConstantOperandAPInt(1);
-  SDValue Pg = getPTrue(DAG, DL, VT, PgPattern.getZExtValue());
+  SDValue Pg = Upper->getOperand(0);
+  SDValue Mask = Upper->getOperand(1);
 
   // brk{a,b} only support .b forms, so cast to make sure all our p regs match.
   Pg = DAG.getNode(AArch64ISD::REINTERPRET_CAST, DL, MVT::nxv16i1, Pg);
----------------
paulwalker-arm wrote:

We've now lost the knowledge of how `Pg` is constructed and hence the value of the invisible lanes. This could make the `AArch64ISD::REINTERPRET_CAST` insufficient? and should be replaced by a call to `getSVEPredicateBitCast()`.  The other reinterprets should be fine because they're controlled by `Pg`.

https://github.com/llvm/llvm-project/pull/179909


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