[llvm] [X86] Lower i512 ADD/SUB using Kogge-Stone on AVX512 (PR #174761)

[Islam Imad via llvm-commits]

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@@ -54559,8 +54616,20 @@ static SDValue combineStore(SDNode *N, SelectionDAG &DAG,
   // vector type or the operation is likely to expand to a vector type
   // (legalization can scalarize back if it the op failed).
   if (VT == MVT::i256 || VT == MVT::i512) {
+    // issue : 173996 , pr : 174761 : when add/sub lowered on avx512 we hit a
+    // regression issue. my approach is to allow the combine only when the
+    // operation is done by our custome handling.
+    // X86TargetLowering::ReplaceNodeResults (ADD/SUB) cases.
+    bool IsCheapAddSub = true;
+    if ((VT == MVT::i512) && (StoredVal->getOpcode() == ISD::ADD ||
+                              StoredVal->getOpcode() == ISD::SUB)) {
+      auto LHS = StoredVal->getOperand(0);
+      auto RHS = StoredVal->getOperand(1);
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Islam-Imad wrote:

i forgot to get it back and stick to the convention. sorry for that

https://github.com/llvm/llvm-project/pull/174761