[llvm] [AArch64] Add test coverage for funnel shift with undef amount. NFC (PR #179888)

Cullen Rhodes via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 5 01:01:23 PST 2026


https://github.com/c-rhodes created https://github.com/llvm/llvm-project/pull/179888

Precommit tests for #57256 showing inconsistencies between SDAG and GISel for funnel shift with undef amount. GISel is wrong and should match SDAG.

>From 402626908b434d02f58c135adfcb92d51fbe2b07 Mon Sep 17 00:00:00 2001
From: Cullen Rhodes <cullen.rhodes at arm.com>
Date: Thu, 5 Feb 2026 08:53:54 +0000
Subject: [PATCH] [AArch64] Add test coverage for funnel shift with undef
 amount. NFC

Precommit tests for #57256 showing inconsistencies between SDAG and
GISel for funnel shift with undef amount. GISel is wrong and should
match SDAG.
---
 llvm/test/CodeGen/AArch64/funnel-shift.ll | 56 +++++++++++++++++++++++
 1 file changed, 56 insertions(+)

diff --git a/llvm/test/CodeGen/AArch64/funnel-shift.ll b/llvm/test/CodeGen/AArch64/funnel-shift.ll
index 90fb10258dffb..e0bbfc620e2f8 100644
--- a/llvm/test/CodeGen/AArch64/funnel-shift.ll
+++ b/llvm/test/CodeGen/AArch64/funnel-shift.ll
@@ -256,6 +256,34 @@ define i8 @fshl_i8_const_fold() {
   ret i8 %f
 }
 
+define i32 @fshl_scalar_undef_shift() {
+; CHECK-SD-LABEL: fshl_scalar_undef_shift:
+; CHECK-SD:       // %bb.0:
+; CHECK-SD-NEXT:    mov w0, #1 // =0x1
+; CHECK-SD-NEXT:    ret
+;
+; CHECK-GI-LABEL: fshl_scalar_undef_shift:
+; CHECK-GI:       // %bb.0:
+; CHECK-GI-NEXT:    mov w0, #-1 // =0xffffffff
+; CHECK-GI-NEXT:    ret
+  %1 = call i32 @llvm.fshl.i32(i32 1, i32 2, i32 undef)
+  ret i32 %1
+}
+
+define <2 x i32> @fshl_vector_undef_shift() {
+; CHECK-SD-LABEL: fshl_vector_undef_shift:
+; CHECK-SD:       // %bb.0:
+; CHECK-SD-NEXT:    movi v0.2s, #1
+; CHECK-SD-NEXT:    ret
+;
+; CHECK-GI-LABEL: fshl_vector_undef_shift:
+; CHECK-GI:       // %bb.0:
+; CHECK-GI-NEXT:    movi d0, #0xffffffffffffffff
+; CHECK-GI-NEXT:    ret
+  %1 = call <2 x i32> @llvm.fshl.v2i32(<2 x i32> <i32 1, i32 1>, <2 x i32> <i32 2, i32 2>, <2 x i32> undef)
+  ret <2 x i32> %1
+}
+
 ; Repeat everything for funnel shift right.
 
 ; General case - all operands can be variables.
@@ -448,6 +476,34 @@ define i8 @fshr_i8_const_fold() {
   ret i8 %f
 }
 
+define i32 @fshr_scalar_undef_shift() {
+; CHECK-SD-LABEL: fshr_scalar_undef_shift:
+; CHECK-SD:       // %bb.0:
+; CHECK-SD-NEXT:    mov w0, #2 // =0x2
+; CHECK-SD-NEXT:    ret
+;
+; CHECK-GI-LABEL: fshr_scalar_undef_shift:
+; CHECK-GI:       // %bb.0:
+; CHECK-GI-NEXT:    mov w0, #-1 // =0xffffffff
+; CHECK-GI-NEXT:    ret
+  %1 = call i32 @llvm.fshr.i32(i32 1, i32 2, i32 undef)
+  ret i32 %1
+}
+
+define <2 x i32> @fshr_vector_undef_shift() {
+; CHECK-SD-LABEL: fshr_vector_undef_shift:
+; CHECK-SD:       // %bb.0:
+; CHECK-SD-NEXT:    movi v0.2s, #2
+; CHECK-SD-NEXT:    ret
+;
+; CHECK-GI-LABEL: fshr_vector_undef_shift:
+; CHECK-GI:       // %bb.0:
+; CHECK-GI-NEXT:    movi d0, #0xffffffffffffffff
+; CHECK-GI-NEXT:    ret
+  %1 = call <2 x i32> @llvm.fshr.v2i32(<2 x i32> <i32 1, i32 1>, <2 x i32> <i32 2, i32 2>, <2 x i32> undef)
+  ret <2 x i32> %1
+}
+
 define i32 @fshl_i32_shift_by_bitwidth(i32 %x, i32 %y) {
 ; CHECK-LABEL: fshl_i32_shift_by_bitwidth:
 ; CHECK:       // %bb.0:



More information about the llvm-commits mailing list