[llvm] 569a9b4 - [SLP][NFC]Add another shl-to-add transformation test, NFC

[Alexey Bataev via llvm-commits]

Author: Alexey Bataev
Date: 2026-02-04T08:08:12-08:00
New Revision: 569a9b49253b26b1142040169ca88e0215bca475

URL: https://github.com/llvm/llvm-project/commit/569a9b49253b26b1142040169ca88e0215bca475
DIFF: https://github.com/llvm/llvm-project/commit/569a9b49253b26b1142040169ca88e0215bca475.diff

LOG: [SLP][NFC]Add another shl-to-add transformation test, NFC

Added: 
    llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation3.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation3.ll b/llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation3.ll
new file mode 100644
index 0000000000000..1134c0133d6af
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/shl-to-add-transformation3.ll
@@ -0,0 +1,56 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 6
+; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+
+define i32 @test(ptr %img, i32 %0, i32 %1) {
+; CHECK-LABEL: define i32 @test(
+; CHECK-SAME: ptr [[IMG:%.*]], i32 [[TMP0:%.*]], i32 [[TMP1:%.*]]) {
+; CHECK-NEXT:  [[ENTRY:.*:]]
+; CHECK-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[IMG]], align 8
+; CHECK-NEXT:    [[GEP1053_2:%.*]] = getelementptr i8, ptr [[TMP2]], i64 13312
+; CHECK-NEXT:    [[GEP1053_3:%.*]] = getelementptr i8, ptr [[TMP2]], i64 13316
+; CHECK-NEXT:    [[ADD118_1:%.*]] = add i32 [[TMP1]], 1
+; CHECK-NEXT:    [[TMP3:%.*]] = load i32, ptr [[GEP1053_3]], align 4
+; CHECK-NEXT:    [[ADD118:%.*]] = add i32 [[TMP3]], [[TMP0]]
+; CHECK-NEXT:    [[ADD139:%.*]] = add i32 [[ADD118_1]], [[ADD118]]
+; CHECK-NEXT:    [[M71:%.*]] = getelementptr i8, ptr [[TMP2]], i64 13112
+; CHECK-NEXT:    store i32 [[ADD139]], ptr [[M71]], align 8
+; CHECK-NEXT:    [[SUB146:%.*]] = sub i32 [[ADD118]], [[ADD118_1]]
+; CHECK-NEXT:    [[ARRAYIDX150:%.*]] = getelementptr i8, ptr [[TMP2]], i64 13120
+; CHECK-NEXT:    store i32 [[SUB146]], ptr [[ARRAYIDX150]], align 8
+; CHECK-NEXT:    [[SUB131:%.*]] = sub i32 0, [[TMP0]]
+; CHECK-NEXT:    [[MUL152:%.*]] = shl i32 [[SUB131]], 1
+; CHECK-NEXT:    [[TMP4:%.*]] = load i32, ptr [[GEP1053_2]], align 4
+; CHECK-NEXT:    [[SUB131_1:%.*]] = sub i32 1, [[TMP4]]
+; CHECK-NEXT:    [[ADD154:%.*]] = add i32 [[MUL152]], [[SUB131_1]]
+; CHECK-NEXT:    [[ARRAYIDX158:%.*]] = getelementptr i8, ptr [[TMP2]], i64 13116
+; CHECK-NEXT:    store i32 [[ADD154]], ptr [[ARRAYIDX158]], align 4
+; CHECK-NEXT:    [[SUB162:%.*]] = sub i32 [[SUB131]], [[SUB131_1]]
+; CHECK-NEXT:    [[ARRAYIDX166:%.*]] = getelementptr i8, ptr [[TMP2]], i64 13124
+; CHECK-NEXT:    store i32 [[SUB162]], ptr [[ARRAYIDX166]], align 4
+; CHECK-NEXT:    ret i32 0
+;
+entry:
+  %2 = load ptr, ptr %img, align 8
+  %gep1053.2 = getelementptr i8, ptr %2, i64 13312
+  %gep1053.3 = getelementptr i8, ptr %2, i64 13316
+  %add118.1 = add i32 %1, 1
+  %3 = load i32, ptr %gep1053.3, align 4
+  %add118 = add i32 %3, %0
+  %add139 = add i32 %add118.1, %add118
+  %m71 = getelementptr i8, ptr %2, i64 13112
+  store i32 %add139, ptr %m71, align 8
+  %sub146 = sub i32 %add118, %add118.1
+  %arrayidx150 = getelementptr i8, ptr %2, i64 13120
+  store i32 %sub146, ptr %arrayidx150, align 8
+  %sub131 = sub i32 0, %0
+  %mul152 = shl i32 %sub131, 1
+  %4 = load i32, ptr %gep1053.2, align 4
+  %sub131.1 = sub i32 1, %4
+  %add154 = add i32 %mul152, %sub131.1
+  %arrayidx158 = getelementptr i8, ptr %2, i64 13116
+  store i32 %add154, ptr %arrayidx158, align 4
+  %sub162 = sub i32 %sub131, %sub131.1
+  %arrayidx166 = getelementptr i8, ptr %2, i64 13124
+  store i32 %sub162, ptr %arrayidx166, align 4
+  ret i32 0
+}