[llvm] bfbbed1 - [RISCV] Call updateCZceFeatureImplications from RISCVAsmParser::setFeatureBits. (#179870)

[via llvm-commits]

Author: Craig Topper
Date: 2026-02-05T07:03:26-08:00
New Revision: bfbbed1327842c2375081663de93515559dcd0e8

URL: https://github.com/llvm/llvm-project/commit/bfbbed1327842c2375081663de93515559dcd0e8
DIFF: https://github.com/llvm/llvm-project/commit/bfbbed1327842c2375081663de93515559dcd0e8.diff

LOG: [RISCV] Call updateCZceFeatureImplications from RISCVAsmParser::setFeatureBits. (#179870)

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
    llvm/test/MC/RISCV/option-arch.s

Removed: 
    


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diff  --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index 19d6fb3b95c4a..ea5713159fe48 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -246,8 +246,12 @@ class RISCVAsmParser : public MCTargetAsmParser {
   void setFeatureBits(uint64_t Feature, StringRef FeatureString) {
     if (!(getSTI().hasFeature(Feature))) {
       MCSubtargetInfo &STI = copySTI();
-      setAvailableFeatures(
-          ComputeAvailableFeatures(STI.ToggleFeature(FeatureString)));
+      STI.ToggleFeature(FeatureString);
+
+      // Update the C and Zce implications.
+      RISCV::updateCZceFeatureImplications(STI);
+
+      setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
     }
   }
 

diff  --git a/llvm/test/MC/RISCV/option-arch.s b/llvm/test/MC/RISCV/option-arch.s
index 7926fa453845f..0367ef317e71a 100644
--- a/llvm/test/MC/RISCV/option-arch.s
+++ b/llvm/test/MC/RISCV/option-arch.s
@@ -127,8 +127,7 @@ addi a0, a1, 0
 # CHECK: .option arch, +zve32x
 
 .option arch, rv32i
-# FIXME: This shouldn't require +zcf.
-.option arch, +zce, +f, +zcf
+.option arch, +zce, +f
 # CHECK-INST: flw fa0, 0x0(a0)
 # CHECK: # encoding: [0x08,0x61]
 c.flw fa0, 0(a0)