[llvm] fad32ff - [X86] Optimized ADC + ADD to ADC (#176713)

[via llvm-commits]

Author: JaydeepChauhan14
Date: 2026-02-09T11:43:56+05:30
New Revision: fad32ff3eaf09c140bf441600f7907e8e20af2a2

URL: https://github.com/llvm/llvm-project/commit/fad32ff3eaf09c140bf441600f7907e8e20af2a2
DIFF: https://github.com/llvm/llvm-project/commit/fad32ff3eaf09c140bf441600f7907e8e20af2a2.diff

LOG: [X86] Optimized ADC + ADD to ADC (#176713)

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86ISelLowering.cpp
    llvm/test/CodeGen/X86/combine-adc.ll

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 8d9359b6fc3d2..b11d9fb3c7eb1 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -58483,7 +58483,11 @@ static SDValue combineFunnelShift(SDNode *N, SelectionDAG &DAG,
 static bool needCarryOrOverflowFlag(SDValue Flags) {
   assert(Flags.getValueType() == MVT::i32 && "Unexpected VT!");
 
-  for (const SDNode *User : Flags->users()) {
+  for (const SDUse &Use : Flags->uses()) {
+    // Only check things that use the flags.
+    if (Use.getResNo() != Flags.getResNo())
+      continue;
+    const SDNode *User = Use.getUser();
     X86::CondCode CC;
     switch (User->getOpcode()) {
     default:
@@ -58827,7 +58831,7 @@ static SDValue combineADC(SDNode *N, SelectionDAG &DAG,
   // Fold ADC(ADD(X,Y),0,Carry) -> ADC(X,Y,Carry)
   // iff the flag result is dead.
   if (LHS.getOpcode() == ISD::ADD && RHSC && RHSC->isZero() &&
-      !N->hasAnyUseOfValue(1))
+      !needCarryOrOverflowFlag(SDValue(N, 1)))
     return DAG.getNode(X86ISD::ADC, SDLoc(N), N->getVTList(), LHS.getOperand(0),
                        LHS.getOperand(1), CarryIn);
 

diff  --git a/llvm/test/CodeGen/X86/combine-adc.ll b/llvm/test/CodeGen/X86/combine-adc.ll
index 4c864f9b77b68..cb934c8664e45 100644
--- a/llvm/test/CodeGen/X86/combine-adc.ll
+++ b/llvm/test/CodeGen/X86/combine-adc.ll
@@ -140,12 +140,11 @@ define i32 @adc_merge_sub(i32 %a0) nounwind {
 define i32 @adc_add(i32 %0, i32 %1, i32 %2, i32 %3) nounwind {
 ; X86-LABEL: adc_add:
 ; X86:       # %bb.0:
+; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %ecx
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT:    movl {{[0-9]+}}(%esp), %edx
-; X86-NEXT:    addl {{[0-9]+}}(%esp), %edx
 ; X86-NEXT:    cmpl %ecx, %eax
-; X86-NEXT:    adcl $0, %edx
+; X86-NEXT:    adcl {{[0-9]+}}(%esp), %edx
 ; X86-NEXT:    js .LBB4_2
 ; X86-NEXT:  # %bb.1:
 ; X86-NEXT:    movl %ecx, %eax
@@ -155,9 +154,8 @@ define i32 @adc_add(i32 %0, i32 %1, i32 %2, i32 %3) nounwind {
 ; X64-LABEL: adc_add:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movl %esi, %eax
-; X64-NEXT:    addl %ecx, %edx
 ; X64-NEXT:    cmpl %esi, %edi
-; X64-NEXT:    adcl $0, %edx
+; X64-NEXT:    adcl %ecx, %edx
 ; X64-NEXT:    cmovsl %edi, %eax
 ; X64-NEXT:    retq
   %5 = icmp ult i32 %0, %1