[llvm] [AMDGPU] Add DPP16 Row Share optimization for llvm.amdgcn.wave.shuffle (PR #177470)

Domenic Nutile via llvm-commits llvm-commits at lists.llvm.org
Thu Feb 5 07:28:32 PST 2026

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saxlungs wrote:

@arsenm @jayfoad Do we think this PR is in good shape now, or do either of you have any further feedback?

https://github.com/llvm/llvm-project/pull/177470

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