[llvm] [AArch64] Codegen for AArch64 Return Address Signing Hardening (PR #176187)

[Victor Campos via llvm-commits]

vhscampos wrote:

> > To that extent, the RegScavenger class is used to find one available register and perform register spilling if none is available.
> 
> Spill where? You can't use the emergency spill slot, even if we allocated one, because it's already deallocated at this point in the epilogue.

Good point, thanks for catching it. I believe that at this point in the compilation, and given that we need a register right before the return instruction, it's highly unlikely that no register is available. I am modifying the code to look for a register and, in the odd case none is available, that specific return block is skipped.

https://github.com/llvm/llvm-project/pull/176187