The Week Of Monday 1 January 2018 Archives by thread
Starting: Mon Jan 1 00:47:51 PST 2018
Ending: Sun Jan 7 23:51:48 PST 2018
Messages: 1132
- [llvm] r321618 - [X86] Regenerate test checks in sse2-intrinsics-x86-upgrade with update-llc
Uriel Korach via llvm-commits
- [llvm] r321619 - [X86] Regenerate test checks in sse-intrinsics-x86-upgrade with update-llc
Uriel Korach via llvm-commits
- [PATCH] D41599: [X86] Lowering X86 avx512 sqrt intrinsics to IR - LLVM
Uriel Korach via Phabricator via llvm-commits
- [PATCH] D41654: [PowerPC] Add an ISD::TRUNCATE to the legalization for ppc_is_decremented_ctr_nonzero
Craig Topper via Phabricator via llvm-commits
- [PATCH] D41649: [scudo] Touch memory to count as RSS
Jonas Hahnfeld via Phabricator via llvm-commits
- [PATCH] D41128: [scudo] Adding a public Scudo interface
Jonas Hahnfeld via Phabricator via llvm-commits
- [PATCH] D41643: [DAG] Fix for Bug PR34620 - Allow SimplifyDemandedBits to look through bitcasted constants
Simon Pilgrim via Phabricator via llvm-commits
- [llvm] r321620 - [X86][SSE] Add test case from PR32160
Simon Pilgrim via llvm-commits
- [llvm] r321624 - [x86] add runs for more vector variants; NFC
Sanjay Patel via llvm-commits
- [PATCH] D41618: [x86] allow pairs of PCMPEQ for vector-sized integer equality comparisons (PR33325)
Sanjay Patel via Phabricator via llvm-commits
- [compiler-rt] r321627 - [scudo] Touch memory to count as RSS
Jonas Hahnfeld via llvm-commits
- [llvm] r321629 - [SelectionDAG][X86][AArch64] Require targets to specify the promotion type when using setOperationAction Promote for INT_TO_FP and FP_TO_INT
Craig Topper via llvm-commits
- [PATCH] D40664: [SelectionDAG][X86][AArch64] Require targets to specify the promotion type when using setOperationAction Promote for INT_TO_FP and FP_TO_INT
Phabricator via Phabricator via llvm-commits
- [llvm] r321630 - [X86] Replace custom lowering of vXi1 SINT_TO_FP/UINT_TO_FP with promotion.
Craig Topper via llvm-commits
- [PATCH] D41652: [InstCombine] Add an option to disable addrspacecast folding into GEP
Marek Olšák via Phabricator via llvm-commits
- [PATCH] D41651: AMDGPU: Add 32-bit constant address space
Marek Olšák via Phabricator via llvm-commits
- [llvm] r321631 - [X86] Add test cases for vXi1 fptosi/fptoui.
Craig Topper via llvm-commits
- [llvm] r321632 - [X86] Promote vXi1 fp_to_uint/fp_to_sint to vXi32 to avoid scalarization.
Craig Topper via llvm-commits
- [PATCH] D41657: Do not look up symbol names when n_strx == 0
Michael Trent via Phabricator via llvm-commits
- [llvm] r321633 - [InstCombine] Regenerate udiv tests.
Simon Pilgrim via llvm-commits
- [PATCH] D41635: Align SHT_NOBITS sections is they are the first on a PT_LOAD
Dimitry Andric via Phabricator via llvm-commits
- [llvm] r321634 - [ValueTracking] Don't assume shift values are in range
Simon Pilgrim via llvm-commits
- [llvm] r321309 - [ModRefInfo] Add must alias info to ModRefInfo.
Nuno Lopes via llvm-commits
- [PATCH] D41560: [X86] Make v2i1 and v4i1 legal types without VLX
Simon Pilgrim via Phabricator via llvm-commits
- [PATCH] D41235: [DAGCOmbine] Ensure that (brcond (setcc ...)) is handled in a canonical manner.
Amaury SECHET via Phabricator via llvm-commits
- [llvm] r321635 - [SelectionDAG] Remove ifs on getTypeAction being TypeWidenVector from some of the WideVecOp handlers.
Craig Topper via llvm-commits
- [llvm] r321636 - Test commit
Dmitry Venikov via llvm-commits
- [PATCH] D41221: [RISCV] writeNopData support generate c.nop
Shiva Chen via Phabricator via llvm-commits
- [llvm] r321637 - [InstCombine] Missed optimization in math expression: squashing sqrt functions
Dmitry Venikov via llvm-commits
- [PATCH] D41658: [RISCV] Encode RISCV specific ELF e_flags to RISCV Binary by RISCVTargetStreamer
Shiva Chen via Phabricator via llvm-commits
- [llvm] r321638 - [SelectionDAG] Teach WidenVecOp_Convert to widen the operation if a widened result type would still be legal.
Craig Topper via llvm-commits
- [PATCH] D41349: Thread MCSubtargetInfo through Target::createMCAsmBackend
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D41659: Implementing missing trigonometric optimizations
ADIL ARUN DANGUI via Phabricator via llvm-commits
- [PATCH] D41493: [zorg] Set up a buildslave to build the experimental RISCV target
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D41314: [cmake] Use symlinks for Windows-hosted toolchains built on Unix
Shoaib Meenai via Phabricator via llvm-commits
- [PATCH] D41362: [AArch64][GlobalISel] Enable GlobalISel at -O0 by default
Gerolf Hoflehner via Phabricator via llvm-commits
- [PATCH] D41300: [ARM] Fix PR35379 - incorrect unwind information when compiling with -Oz
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D40961: [ARM] Fix PR35481
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D39910: [ARM] Issue an eror when non-general-purpose registers used in address operands (alternative)
Momchil Velikov via Phabricator via llvm-commits
- [PATCH] D39909: [ARM] Issue an eror when non-general-purpose registers used in address operands
Momchil Velikov via Phabricator via llvm-commits
- [llvm] r321640 - [X86] Codegen test for pr35765
Sam Parker via llvm-commits
- [llvm] r321641 - [DAGCombine] Fix for PR35765
Sam Parker via llvm-commits
- [PATCH] D41625: [DAGCombine] Fix for PR35765
Phabricator via Phabricator via llvm-commits
- [PATCH] D41278: [MachineCombiner] Improve debug output (NFC)
Gerolf Hoflehner via Phabricator via llvm-commits
- [PATCH] D41441: [AArch64][SVE] Asm: Add restricted register classes for SVE predicate vectors.
Javed Absar via Phabricator via llvm-commits
- [PATCH] D41662: [mips] Correct the definition of m(f|t)c(0|2)
Simon Dardis via Phabricator via llvm-commits
- [PATCH] D40418: [CodeGen] Print noreg as '_' in both MIR and debug output
Francis Visoiu Mistrih via Phabricator via llvm-commits
- [PATCH] D41597: CMAKE: disable -mbig-obj for mingw clang asm
Martell Malone via Phabricator via llvm-commits
- [PATCH] D41447: [AArch64][SVE] Asm: Negative tests for predicated ADD/SUB register constraints
Florian Hahn via Phabricator via llvm-commits
- [llvm] r321642 - [RISCV][NFC] Resolve unused variable warning in RISCVISelLowering
Alex Bradbury via llvm-commits
- [PATCH] D41381: [InstSimplify] Missed optimization in math expression: squashing exp(log), log(exp)
Dmitry Venikov via Phabricator via llvm-commits
- [llvm] r321643 - [RISCV] Add Defs Uses information for c.jal and c.addi4spn
Alex Bradbury via llvm-commits
- [PATCH] D41339: [RISCV] Add Defs Uses information for c.jal and c.addi4spn
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D41442: [AArch64][SVE] Asm: Add parsing of merging/zeroing suffix for SVE predicate vector operands
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D41342: [InstCombine] Missed optimization in math expression: simplify calls exp functions
Dmitry Venikov via Phabricator via llvm-commits
- [PATCH] D41628: [DAGCombine] Fix for PR35763
Simon Pilgrim via Phabricator via llvm-commits
- [llvm] r321644 - Strip trailing whitespace. NFCI
Simon Pilgrim via llvm-commits
- [PATCH] D41515: [AArch64] Improve code generation of vector build
Sander de Smalen via Phabricator via llvm-commits
- [llvm] r321646 - [AArch64][AsmParser] Add isScalarReg() and repurpose isReg()
Sander de Smalen via llvm-commits
- [PATCH] D40892: Add early out to O(n^2) switch analysis in switch-to-select conversion
Andrew Scheidecker via Phabricator via llvm-commits
- [PATCH] D41664: Remove test which assumed array cookies can't be poisoned when using an operator new defined in a class
Filipe Cabecinhas via Phabricator via llvm-commits
- [PATCH] D41609: NFC. Add description comments to Function header
Dmitry Venikov via Phabricator via llvm-commits
- [PATCH] D41665: [Docs] Add Contributing page.
Florian Hahn via Phabricator via llvm-commits
- [llvm] r321648 - NFC. Add description comments to Function header
Dmitry Venikov via llvm-commits
- [PATCH] D41519: [BasicBlockUtils] Check for unreachable preds before updating LI in UpdateAnalysisInformation
Anna Thomas via Phabricator via llvm-commits
- [llvm] r321649 - Revert r321089: "[DAG] Elide overlapping store" (and subsequent fix in r321204)
Daniel Jasper via llvm-commits
- [llvm] r320962 - [DAGCombine] Move AND nodes to multiple load leaves
Davide Italiano via llvm-commits
- [PATCH] D33196: [AArch64] Explicitly enable FeatureFuseLiterals on Cortex-A72 (NFC).
Florian Hahn via Phabricator via llvm-commits
- [llvm] r321650 - [Hexagon] Fix generation of vector sign extensions
Krzysztof Parzyszek via llvm-commits
- [PATCH] D41373: [GISel][RFC]: GlobalISel Combiner prototype
Gerolf Hoflehner via llvm-commits
- [PATCH] D41667: [DAGCombine] Fix for PR35761
Sam Parker via Phabricator via llvm-commits
- [llvm] r321515 - [InstCombine] Check for isa<Instruction> before using cast<>
David Blaikie via llvm-commits
- [llvm] r321545 - Avoid modifying DbgInfo while looping in salvageDebuginfo
David Blaikie via llvm-commits
- [PATCH] D41615: [DebugInfo] Don't crash when given invalid DWARFv5 line table prologue.
David Blaikie via llvm-commits
- [llvm] r321653 - [BasicBlockUtils] Check for unreachable preds before updating LI in UpdateAnalysisInformation
Anna Thomas via llvm-commits
- [llvm] r321655 - [AArch64][GlobalISel] Enable GlobalISel at -O0 by default
Amara Emerson via llvm-commits
- [llvm] r316525 - Implement salavageDebugInfo functionality for SelectionDAG.
Adrian Prantl via llvm-commits
- [llvm] r321656 - [x86] allow pairs of PCMPEQ for vector-sized integer equality comparisons (PR33325)
Sanjay Patel via llvm-commits
- [lld] r321657 - Align SHT_NOBITS sections is they are the first on a PT_LOAD.
Rafael Espindola via llvm-commits
- [PATCH] D41644: Rename --icf-data and add a corresponding flag for functions
Rafael Avila de Espindola via Phabricator via llvm-commits
- [PATCH] D41334: [CodeExtractor] Use function attributes from original function.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D41446: [TableGen][AsmMatcherEmitter] Generate assembler checks for tied operands
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D27293: [WIP] Cleanup SplitCSR implementation
Philip Reames via Phabricator via llvm-commits
- [PATCH] D41605: StructurizeCFG: Fix broken backedge detection
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D41611: [opt-viewer] Check for pygments.lexer.c_cpp
Adam Nemet via Phabricator via llvm-commits
- [PATCH] D41264: Fix faulty assertion for void type in debug info
David Blaikie via llvm-commits
- [llvm] r318743 - SLPVectorizer.cpp: Avoid std::stable_sort(properlyDominates()).
Philip Reames via llvm-commits
- [PATCH] D41531: [DebugInfo/DWARF] generate aranges for CU even if it has .debug_aranges entry
Adrian Prantl via Phabricator via llvm-commits
- [llvm] r321178 - [NVPTX] Initial adaptation of MCAsmStreamer/MCTargetStreamer for debug info in Cuda.
David Blaikie via llvm-commits
- [PATCH] D40524: Handle the case of live 16-bit subregisters in X86FixupBWInsts
Andy Kaylor via Phabricator via llvm-commits
- [llvm] r321659 - [opt-viewer] Check for pygments.lexer.c_cpp
Jonas Hahnfeld via llvm-commits
- [PATCH] D41402: [cmake] Fix DESTDIR support in compiler-rt build
Francis Ricci via Phabricator via llvm-commits
- [PATCH] D40684: Use size_t, instead of unsigned, to represnt StringMapEntry length and alignment.
Matt Davis via Phabricator via llvm-commits
- [PATCH] D41669: Use ODR debug type uniquing when enabled during function cloning
Teresa Johnson via Phabricator via llvm-commits
- [PATCH] D41633: [InstCombine] Remove unneeded VarArg casts.
Reid Kleckner via Phabricator via llvm-commits
- [PATCH] D41617: [AMDGPU] Add HW_REG_SH_MEM_BASES symbolic name for s_getreg_b32
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [llvm] r321662 - [AArch64][GlobalISel] Fix assert fail with unknown intrinsic.
Amara Emerson via llvm-commits
- [llvm] r321125 - Revert "Fix faulty assertion in debug info"
Adrian McCarthy via llvm-commits
- [PATCH] D41670: [docs] Update Scudo documentation
Kostya Kortchinsky via Phabricator via llvm-commits
- [PATCH] D41671: [X86] Remove useless custom inserter for 64-bit TAILJMP and TCRETURN opcodes
Craig Topper via Phabricator via llvm-commits
- [PATCH] D41672: support phi ranges for machine-level IR
Bob Wilson via Phabricator via llvm-commits
- [PATCH] D19080: allow SSAUpdater to be used for Swift
Bob Wilson via Phabricator via llvm-commits
- [PATCH] D41673: [CMake] Install resource files into a share/ directory
Petr Hosek via Phabricator via llvm-commits
- [PATCH] D41619: [llvm-objcopy] Use physical instead of virtual address when aligning and placing sections in binary
Jake Ehrlich via Phabricator via llvm-commits
- [PATCH] D41674: [Support] CommandLine API -- Allow creating custom parsers for fundamental types
Christoph Kindl via Phabricator via llvm-commits
- [PATCH] D41675: Change memcpy/memove/memset to have dest and source alignment attributes.
Daniel Neilson via Phabricator via llvm-commits
- [PATCH] D41678: [CMake] Support for cross-compilation when build runtimes
Petr Hosek via Phabricator via llvm-commits
- [llvm] r321668 - [AArch64] add tests for min/max of min/max (PR35717); NFC
Sanjay Patel via llvm-commits
- [PATCH] D41403: [ELF] Fix incorrect physical address on self-referencing AT command
Erick Reyes via Phabricator via llvm-commits
- [llvm] r321672 - [ValueTracking] recognize min/max of min/max patterns
Sanjay Patel via llvm-commits
- [llvm] r321673 - [AArch64] fix typos in comments; NFC
Sanjay Patel via llvm-commits
- [llvm] r321674 - Handle the case of live 16-bit subregisters in X86FixupBWInsts
Andrew Kaylor via llvm-commits
- [PATCH] D41679: [asan] Restore asan_device_setup compatibility with older libraries.
Evgenii Stepanov via Phabricator via llvm-commits
- [compiler-rt] r321677 - [asan] Restore asan_device_setup compatibility with older libraries.
Evgeniy Stepanov via llvm-commits
- [PATCH] D41681: Centralize Config->IsRela handling
Rafael Avila de Espindola via Phabricator via llvm-commits
- [PATCH] D41682: [llvm-objcopy] Add support for visibility
Jake Ehrlich via Phabricator via llvm-commits
- [PATCH] D41683: [test-suite, CUDA] Improve handling of GPUs not supported by particular CUDA version.
Artem Belevich via Phabricator via llvm-commits
- [PATCH] D37467: Add a new pass to speculate around PHI nodes with constant (integer) operands when profitable.
Philip Reames via Phabricator via llvm-commits
- [PATCH] D41227: [CGP] Fix Complex addressing mode for offset
Philip Reames via Phabricator via llvm-commits
- [PATCH] D41098: [InlineSpiller] Fix a crash due to lack of forward progress from remat
Philip Reames via Phabricator via llvm-commits
- [PATCH] D41684: [llvm-objcopy] Add --localize-hidden option
Jake Ehrlich via Phabricator via llvm-commits
- [llvm] r321402 - [SCCP] Manually fold branches on undef.
Davide Italiano via llvm-commits
- [PATCH] D35267: Pass Divergence Analysis data to selection DAG to drive divergence dependent instruction selection
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D41685: [test-suite, CUDA] Make sure we use the thrust library from test external dir.
Artem Belevich via Phabricator via llvm-commits
- [llvm] r321681 - [llvm-objcopy] Add support for visibility
Jake Ehrlich via llvm-commits
- [PATCH] D41686: Simplify mips gprel handling
Rafael Avila de Espindola via Phabricator via llvm-commits
- [PATCH] D41687: [llvm-objcopy] Add support for input types and the -I and -B flags
Jake Ehrlich via Phabricator via llvm-commits
- [lld] r321684 - Produce relocations with weak undef if the section is RW.
Rafael Espindola via llvm-commits
- [PATCH] D41616: [hwasan] Add heap tag randomization.
Evgenii Stepanov via Phabricator via llvm-commits
- [PATCH] D41689: [SCEVAA] Don't crash on pointers with no dominance relationship.
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D41620: [msan] Intercept sendmmsg, recvmmsg.
Vitaly Buka via Phabricator via llvm-commits
- [llvm] r319691 - [globalisel][tablegen] Split atomic load/store into separate opcode and enable for AArch64.
Philip Reames via llvm-commits
- [lld] r321688 - Don't assume that size relocations are always constant.
Rafael Espindola via llvm-commits
- [PATCH] D41690: Simplify handling of size relocations
Rafael Avila de Espindola via Phabricator via llvm-commits
- [PATCH] D41062: [X86] Legalize v2i32 via widening rather than promoting
Craig Topper via Phabricator via llvm-commits
- [PATCH] ldd::COFF: initalize ErrorHandler with CanExitEarly value
Andrew Kelley via llvm-commits
- [llvm] r321690 - [GlobalISel][Legalizer] Fix legalization of llvm.smul.with.overflow
Amara Emerson via llvm-commits
- [PATCH] D41214: [cmake] Fix typo in test/asan/CMakeLists.txt
Shoaib Meenai via Phabricator via llvm-commits
- [PATCH] D41691: [X86] Use ANY_EXTEND instead of SIGN_EXTEND in lowerMasksToReg
Craig Topper via Phabricator via llvm-commits
- [PATCH] D41330: [X86] Reduce Store Forward Block issues in HW
Lama via Phabricator via llvm-commits
- [llvm] r321692 - Thread MCSubtargetInfo through Target::createMCAsmBackend
Alex Bradbury via llvm-commits
- [llvm] r321694 - Fix incorrect documentation comment left after r321692
Alex Bradbury via llvm-commits
- [llvm] r321696 - Fix build of WebAssembly and AVR backends after r321692
Alex Bradbury via llvm-commits
- [llvm] r321699 - [AArch64][SVE] Asm: Add restricted register classes for SVE predicate vectors.
Sander de Smalen via llvm-commits
- [PATCH] D41693: [ARM][NFC] Avoid recreating MCSubtargetInfo in ARMAsmBackend
Alex Bradbury via Phabricator via llvm-commits
- [PATCH] D41692: [Polly][WIP] Remove immediate dominator heuristic for error block detection.
Michael Kruse via Phabricator via llvm-commits
- [PATCH] D41694: [Polly][ScopInfo] Remove RunTimeChecksMaxAccessDisjuncts bail-out condition.
Michael Kruse via Phabricator via llvm-commits
- [PATCH] D41695: [Metadata] Extend 'count' field of DISubrange to take a metadata node
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D41696: [DebugInfo] Emit DWARF reference for DIVariable 'count' in DISubrange
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D41697: [DebugInfo][Metadata] Add support for a DIExpression as 'count' field of DISubrange.
Sander de Smalen via Phabricator via llvm-commits
- [PATCH] D40610: Flush gcda files before unlocking them
Marco Castelluccio via Phabricator via llvm-commits
- [compiler-rt] r321702 - Flush gcda files before unlocking them
Marco Castelluccio via llvm-commits
- [compiler-rt] r321703 - Hide some symbols to avoid a crash on shutdown when using code coverage
Marco Castelluccio via llvm-commits
- [PATCH] D38124: Hide some symbols to avoid a crash on shutdown when using code coverage
Marco Romano via Phabricator via llvm-commits
- [llvm] r321704 - [TableGen] Add support of Intrinsics with multiple returns
Hal Finkel via llvm-commits
- [PATCH] D32888: TableGen: Add support of Intrinsics with multiple returns
Hal Finkel via Phabricator via llvm-commits
- [PATCH] D41420: [LV][VPlan] NFC patch to move LoopVectorizationPlanner class out of LoopVectorize.cpp
Hal Finkel via Phabricator via llvm-commits
- [PATCH] D41700: [RISCV] Refactory the existing CC_RISCV32 function to conform to the CCAssignFn type
Leslie Zhai via Phabricator via llvm-commits
- [llvm] r321706 - [InstCombine] Add test to remove VarArg casts (NFC)
Florian Hahn via llvm-commits
- [llvm] r321707 - [ARM][NFC] Avoid recreating MCSubtargetInfo in ARMAsmBackend
Alex Bradbury via llvm-commits
- [llvm] r321710 - [InstSimplify] Missed optimization in math expression: squashing exp(log), log(exp)
Dmitry Venikov via llvm-commits
- [llvm] r321711 - Remove left-over debug printout from r321692
Hans Wennborg via llvm-commits
- [llvm] r321712 - The trunk version is now 7.0.0svn
Hans Wennborg via llvm-commits
- [test-suite] r321715 - Creating release_60 branch off revision 321711
Hans Wennborg via llvm-commits
- [lld] r321722 - Creating release_60 branch off revision 321711
Hans Wennborg via llvm-commits
- [llvm] r321727 - Clear release notes for 7.0.0
Hans Wennborg via llvm-commits
- [PATCH] D41701: [DAG] Teach BaseIndexOffset to correctly handle with indexed operations
Nirav Dave via Phabricator via llvm-commits
- [lld] r321729 - Docs, release notes: update version to 7.0.0
Hans Wennborg via llvm-commits
- [PATCH] D41505: [DAG] Teach findBaseOffset to interpret indexes of indexed memory operations
Nirav Dave via Phabricator via llvm-commits
- [polly] r321731 - Docs, release notes: update version to 7.0.0
Hans Wennborg via llvm-commits
- [lld] r321733 - Simplify mips gprel handling.
Rafael Espindola via llvm-commits
- [llvm] r321556 - AMDGPU: Remove mayLoad/hasSideEffects from MIMG stores
Michel Dänzer via llvm-commits
- [lld] r321734 - Use a swtich. NFC.
Rafael Espindola via llvm-commits
- [PATCH] D41637: Add MSan interceptor for fstat(2)
Kamil Rytarowski via Phabricator via llvm-commits
- [llvm] r321735 - [lit] Bump version number
Tom Stellard via llvm-commits
- [lld] r321736 - Refactor duplicated expression.
Rafael Espindola via llvm-commits
- [PATCH] D41588: Add NetBSD syscall hooks in sanitizers
Kamil Rytarowski via Phabricator via llvm-commits
- [PATCH] D31025: [Docs] Add tablegen backend for target opcode documentatio
Tanya Lattner via llvm-commits
- [lld] r321737 - Use a switch. NFC.
Rafael Espindola via llvm-commits
- [PATCH] D40876: AArch64: Fix emergency spillslot being out of reach for large callframes
Geoff Berry via Phabricator via llvm-commits
- [lld] r321738 - Update code as this also handles GOT relocations.
Rafael Espindola via llvm-commits
- [PATCH] D41703: [X86] Remove side-effects from determineCalleeSaves
Francis Visoiu Mistrih via Phabricator via llvm-commits
- [PATCH] D40146: [JumpThreading] Preservation of DT and LVI across the pass
Brian Rzycki via Phabricator via llvm-commits
- [PATCH] D41463: [CodeGen] Add a new pass to sink Copy instructions after RA
Jun Bum Lim via Phabricator via llvm-commits
- [PATCH] D41338: [CodeGen] lower math intrinsics to finite version of libcalls when possible (PR35672)
Sanjay Patel via Phabricator via llvm-commits
- [llvm] r321746 - [X86] Use ANY_EXTEND instead of SIGN_EXTEND in lowerMasksToReg
Craig Topper via llvm-commits
- [PATCH] D41634: Branch relaxation - non invertible condition
Matt Arsenault via Phabricator via llvm-commits
- [PATCH] D40455: Teach InlineCost about address spaces
Matt Arsenault via Phabricator via llvm-commits
- [llvm] r321747 - [X86] Remove useless custom inserter for 64-bit TAILJMP and TCRETURN opcodes
Craig Topper via llvm-commits
- [PATCH] D41704: [scudo] s/unsigned long/size_t/ for __scudo_set_rss_limit
Kostya Kortchinsky via Phabricator via llvm-commits
- [PATCH] D41293: [DAG] Improve Dependency analysis when doing multi-node Instruction Selection
Nirav Dave via Phabricator via llvm-commits
- [PATCH] D41705: Place undefined globals in .bss instead of .data
varkor via Phabricator via llvm-commits
- [llvm] r321748 - [InstCombine] Check for out of range shift values using APInt before calling getZExtValue
Simon Pilgrim via llvm-commits
- [PATCH] D40482: [X86] Instrument Control Flow For Indirect Branch Tracking
Craig Topper via Phabricator via llvm-commits
- [llvm] r321751 - StructurizeCFG: Fix broken backedge detection
Matt Arsenault via llvm-commits
- [llvm] r321752 - AMDGPU: Remove dead file
Matt Arsenault via llvm-commits
- [llvm] r321753 - Fix missing release metabug in merge-request.sh
Matt Arsenault via llvm-commits
- [llvm] r321755 - [X86] Remove 'else' after 'return' I forgot to cleanup before committing D41691.
Craig Topper via llvm-commits
- [PATCH] D41707: [scudo] Attempt to re-enable the valloc test on armhf
Kostya Kortchinsky via Phabricator via llvm-commits
- [llvm] r321756 - [ExpandMemcmp] rename variables and add hook to override pref for number of loads per block; NFC
Sanjay Patel via llvm-commits
- [PATCH] D41206: [llvm-cov] Multi-threaded implementation of prepareFileReports method.
Max Moroz via Phabricator via llvm-commits
- one-off patch for CMake issue
Andy Bauer via llvm-commits
- [llvm] r321758 - [CodeGen][NFC] Remove unused function declaration
Francis Visoiu Mistrih via llvm-commits
- [PATCH] D41710: [LLD] [docs] Add preliminary release notes for LLD 6.0 for COFF
Martin Storsjö via Phabricator via llvm-commits
- [compiler-rt] r321760 - [cmake] Fix typo in test/asan/CMakeLists.txt
Azharuddin Mohammed via llvm-commits
- [PATCH] D41712: [docs] Mention SjLj fixes in the release notes
Martin Storsjö via Phabricator via llvm-commits
- [PATCH] D41714: [x86, MemCmpExpansion] allow 2 pairs of loads per block (PR33325)
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D41715: AMDGPU: Process amdgpu.uniform on loads
Marek Olšák via Phabricator via llvm-commits
- [compiler-rt] r321761 - [hwasan] Add heap tag randomization.
Evgeniy Stepanov via llvm-commits
- [PATCH] D41604: Add a pass to generate synthetic function entry counts.
David Li via Phabricator via llvm-commits
- [llvm] r321764 - [PRE] Add a bunch of test cases for LICM-like PRE patterns
Philip Reames via llvm-commits
- [compiler-rt] r321765 - Add MSan interceptor for fstat(2)
Kamil Rytarowski via llvm-commits
- [www] r321766 - Add dev meeting slides for LTO + Linker Scripts talk
Tobias Edler von Koch via llvm-commits
- [PATCH] D41603: [InstCombine] fold min/max tree with common operand (PR35717)
Sanjay Patel via Phabricator via llvm-commits
- [PATCH] D41630: [LLD] [COFF] Add a testcase for dllexported symbols via embedded directives
Reid Kleckner via Phabricator via llvm-commits
- [PATCH] D41718: [lld] Correctly link S_FILESTATIC records
Zachary Turner via Phabricator via llvm-commits
- [PATCH] D41719: [InlineCost] Prevent infinite recursion on function pointers
Jessica Paquette via Phabricator via llvm-commits
- [llvm] r321767 - [DAGCombine] Handle out of range EXTRACT_VECTOR_ELT indices
Simon Pilgrim via llvm-commits
- [lld] r321768 - Use getLocation to improve error message.
Rafael Espindola via llvm-commits
- [lld] r321769 - Mention symbol name in error message.
Rafael Espindola via llvm-commits
- [PATCH] D40727: Syndicate duplicate code between CallInst and InvokeInst
Vedant Kumar via Phabricator via llvm-commits
- [lld] r321772 - Use references for a few arguments that are never null.
Rafael Espindola via llvm-commits
- [llvm] r321773 - Do not look up symbol names when n_strx == 0
Michael Trent via llvm-commits
- [compiler-rt] r321774 - [msan] Intercept sendmmsg, recvmmsg.
Evgeniy Stepanov via llvm-commits
- [PATCH] D41640: [ELF] - Do not ignore discarding of .rela.plt/.rela.dyn
Rafael Avila de Espindola via llvm-commits
- [PATCH] D41600: [llvm-cov] Refactor "export" command implementation and add support for SOURCES.
Vedant Kumar via Phabricator via llvm-commits
- [PATCH] D41639: [ELF] Drop unnecessary VersionId setting in scanShlibUndefined
Rafael Avila de Espindola via llvm-commits
- [PATCH] D22792: VecClone Pass
Matt via Phabricator via llvm-commits
- [PATCH] D41341: [X86] WIP disable 512-bit vectors during type legalization for prefer-vector-width
Craig Topper via Phabricator via llvm-commits
- [PATCH] D41453: [GVNHoist] Fix: PR35222 gvn-hoist incorrectly erases load in case of a loop
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D41645: Move scanReloc to an auxiliary function
Rafael Avila de Espindola via Phabricator via llvm-commits
- [lld] r321780 - Inline a function that is only called once. NFC.
Rafael Espindola via llvm-commits
- [PATCH] D41721: [X86] Move HasNOPL to a subtarget feature bit. Plumb MCSubtargetInfo through the MCAsmBackend constructor
Craig Topper via Phabricator via llvm-commits
- [compiler-rt] r321782 - [tsan] Separate the constants in libignore and bump the maximum for instrumented libraries
Kuba Mracek via llvm-commits
- [PATCH] D41190: [tsan] Separate the constants in libignore and bump the maximum for instrumented libraries
Phabricator via Phabricator via llvm-commits
- [llvm] r321783 - support phi ranges for machine-level IR
Bob Wilson via llvm-commits
- [PATCH] D40805: [RISCV] Support for varargs
Leslie Zhai via Phabricator via llvm-commits
- [llvm] r321784 - Remove the unit test from r321783.
Bob Wilson via llvm-commits
- [llvm] r321785 - Changes in the branch relaxation algorithm.
Elena Demikhovsky via llvm-commits
- [lld] r321787 - [docs] Add preliminary release notes for LLD 6.0 for COFF
Martin Storsjo via llvm-commits
- [llvm] r321789 - [GVNHoist] Fix: PR35222 gvn-hoist incorrectly erases load in case of a loop
Aditya Kumar via llvm-commits
- [lld] r321790 - [COFF] Add a testcase for dllexported symbols via embedded directives
Martin Storsjo via llvm-commits
- [PATCH] D41286: [InstCombine] Missed optimization in math expression: sin(x) / cos(x) => tan(x)
Dmitry Venikov via Phabricator via llvm-commits
- [PATCH] D41283: [WIP][InstCombine] Missed optimization in math expression: tan(a) * cos(a) == sin(a)
Dmitry Venikov via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Eric Christopher via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Tom Stellard via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Roger via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
David Majnemer via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Reid Kleckner via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
David Majnemer via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Zach Riggle via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
James Y Knight via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Ed Maste via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Eric Christopher via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Sanjoy Das via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
James Y Knight via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Rui Ueyama via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Andrei via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Sanjoy Das via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Reid Kleckner via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Duncan P. N. Exon Smith via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
David Li via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Rui Ueyama via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Ahmed Bougacha via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Rafael Avila de Espindola via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Rui Ueyama via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Roger via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Dibyendu Das via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Shoaib Meenai via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Philip Reames via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Paul Robinson via Phabricator via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to Spectre..
Chandler Carruth via Phabricator via llvm-commits
- [PATCH] D41185: [ARM] Fix endianness of Thumb .inst.w directive
Oliver Stannard via Phabricator via llvm-commits
- [llvm] r321791 - [X86] Codegen test for PR37563
Sam Parker via llvm-commits
- [llvm] r321792 - [ValueTracking] Adding missed lit-test for commit r316208
Nikolai Bozhenov via llvm-commits
- [llvm] r321793 - [ARM GlobalISel] Fix selection of pointer constants
Diana Picus via llvm-commits
- [PATCH] D38978: [OpenMP] Enable the lowering of implicitly shared variables in OpenMP GPU-offloaded target regions to the GPU shared memory
Gheorghe-Teodor Bercea via Phabricator via llvm-commits
- [llvm] r321795 - [ARM GlobalISel] Legalize scalar G_PHI
Diana Picus via llvm-commits
- [llvm] r321796 - [ARM GlobalISel] Add RegBankSelect tests for G_PHI
Diana Picus via llvm-commits
- [llvm] r321797 - [ARM GlobalISel] Select G_PHI
Diana Picus via llvm-commits
- [llvm] r321798 - [Hexagon] Replace INSERTRP/EXTRACTRP with INSERT/EXTRACT in HexagonISD
Krzysztof Parzyszek via llvm-commits
- [llvm] r321799 - [ARM] Fix endianness of Thumb .inst.w directive
Oliver Stannard via llvm-commits
- [llvm] r321801 - [InstCombine] safely create a constant of the right type (PR35794)
Sanjay Patel via llvm-commits
- [PATCH] D41334: [CodeExtractor] Use subset of function attributes for extracted function.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D41727: [libcxx] Disable tautological-type-limit-compare warning
Brian Cain via Phabricator via llvm-commits
- [compiler-rt] r321803 - [scudo] s/unsigned long/size_t/ for __scudo_set_rss_limit
Kostya Kortchinsky via llvm-commits
- [PATCH] D41728: [TableGen][AsmMatcherEmitter] Remove boolean 'Hack' parameter
Sander de Smalen via Phabricator via llvm-commits
- [llvm] r321804 - [Docs] Add Contributing page.
Florian Hahn via llvm-commits
- [PATCH] D41337: [PartialInliner] Set attributes for new call instruction.
Florian Hahn via Phabricator via llvm-commits
- [llvm] r321805 - Add assertion on DT availability during LI update in UpdateAnalysisInformation
Anna Thomas via llvm-commits
- [llvm] r321806 - StructurizeCFG: xfail one of the testcases from r321751
Matt Arsenault via llvm-commits
- [PATCH] D41731: [llvm-objcopy] Add --add-gnu-debuglink
Jake Ehrlich via Phabricator via llvm-commits
- [PATCH] D40511: [AArch64] Fix scheduling resources for post indexed loads and stores
Evandro Menezes via Phabricator via llvm-commits
- [PATCH] D39976: [AArch64] Consider the cost model when folding loads and stores
Evandro Menezes via Phabricator via llvm-commits
- [PATCH] D41732: [Option] Add 'findNearest' method to catch typos
Brian Gesiak via Phabricator via llvm-commits
- [llvm] r321807 - [X86] Show missed combine for X/X for SDIV/UDIV and X%X for SREM/UREM
Simon Pilgrim via llvm-commits
- [llvm] r321808 - Regenerate broadcast constant comment
Simon Pilgrim via llvm-commits
- [llvm] r321809 - Teach InlineCost about address spaces
Bjorn Pettersson via llvm-commits
- [llvm] r321810 - [X86] Add common CHECK prefix for tests without SSE/AVX codegen
Simon Pilgrim via llvm-commits
- [PATCH] D40425: Extending CFGPrinter and CallPrinter with Heat Colors
Sean Fertile via Phabricator via llvm-commits
- [llvm] r321811 - [docs] Update Scudo documentation
Kostya Kortchinsky via llvm-commits
- [PATCH] D1251: Teach InlineCost about address spaces
Bjorn Pettersson via Phabricator via llvm-commits
- [compiler-rt] r321812 - [scudo] Attempt to re-enable the valloc test on armhf
Kostya Kortchinsky via llvm-commits
- [PATCH] D41734: [DebugInfo][PDB] Fix too many FPM blocks being written in some cases
Colden Cullen via Phabricator via llvm-commits
- [llvm] r321813 - [DAGCombine] Ensure SDNode use iterator is incremented properly.
Amara Emerson via llvm-commits
- [llvm] r321814 - [X86] Regenerate test
Simon Pilgrim via llvm-commits
- [PATCH] D41735: Use uint64_t to store the ELF sh_entsize field.
Matt Davis via Phabricator via llvm-commits
- [PATCH] D41292: [AMDGPU] Fixed incorrect uniform branch condition
Tim Renouf via Phabricator via llvm-commits
- [PATCH] D41126: [SelectionDAG] Fixed f16-from-vector promotion problem
Tim Renouf via Phabricator via llvm-commits
- [llvm] r321815 - [llvm-cov] Refactor "export" command implementation and add support for SOURCES.
Max Moroz via llvm-commits
- [compiler-rt] r321817 - [asan] Fix build with Android NDK < 14.
Evgeniy Stepanov via llvm-commits
- [lld] r320817 - Handle a VersymIndex of 0 as an error.
Simon Atanasyan via llvm-commits
- [PATCH] D41737: [PowerPC] Try to move the stack pointer update instruction later in the prologue and earlier in the epilogue
Stefan Pintilie via Phabricator via llvm-commits
- [llvm] r321819 - Revert "[X86] Regenerate test"
Amara Emerson via llvm-commits
- [PATCH] D41738: [GISel]: Don't create G_MUL with 1 during translation of GetElementPtr
Aditya Nandakumar via Phabricator via llvm-commits
- [llvm] r321821 - [X86] Correct the execution domain for AVX1 VBROADCASTF128 to be FP instead of integer.
Craig Topper via llvm-commits
- [llvm] r321822 - [DEBUG] Add initial tests for debug info for NVPTX target, NFC.
Alexey Bataev via llvm-commits
- [PATCH] D41739: Debug Info: Support DW_AT_calling_convention on composite types
Adrian Prantl via Phabricator via llvm-commits
- [llvm] r321823 - [X86] Add scalar undef sdiv/srem/udiv/urem combine tests
Simon Pilgrim via llvm-commits
- [llvm] r321824 - [AArch64] Improve code generation of vector build
Evandro Menezes via llvm-commits
- [llvm] r321825 - [JumpThreading] Preservation of DT and LVI across the pass
Brian M. Rzycki via llvm-commits
- [llvm] r321826 - [X86] Add srem/udiv/urem by one combine tests
Simon Pilgrim via llvm-commits
- [PATCH] D41741: LowerTypeTests: Add limited support for aliases
Vlad Tsyrklevich via Phabricator via llvm-commits
- [PATCH] D41742: [MSF] Fix FPM interval calculation
Zachary Turner via Phabricator via llvm-commits
- [llvm] r321829 - [DEBUG] Fix the test for NVPTX, NFC.
Alexey Bataev via llvm-commits
- [PATCH] D38906: AMDGPU/SI: Implement d16 support for buffer intrinsics
Changpeng Fang via Phabricator via llvm-commits
- [PATCH] D41315: [WebAssembly] Output functions individually
Sam Clegg via Phabricator via llvm-commits
- [llvm] r321832 - Revert "[JumpThreading] Preservation of DT and LVI across the pass"
Reid Kleckner via llvm-commits
- [PATCH] D41467: PR35710: Nary reassociation falls into infinite loop
Evgeny Stupachenko via Phabricator via llvm-commits
- [llvm] r321835 - [DEBUG] Fix debug info test for NVPTX, NFC.
Alexey Bataev via llvm-commits
- [llvm] r321836 - [ORC] Add dereference operator to SymbolStringPtr.
Lang Hames via llvm-commits
- [llvm] r321837 - [ORC] Actually compare pointer values as advertised (rather than comparing ref
Lang Hames via llvm-commits
- [llvm] r321838 - [ORC] Add new core ORC APIs (Core.h/Core.cpp): VSO, AsynchronousSymbolQuery and
Lang Hames via llvm-commits
- [llvm] r321839 - fix invalid footnote syntax
Tim Hammerquist via llvm-commits
- [llvm] r321840 - remove unreferenced footnotes
Tim Hammerquist via llvm-commits
- [llvm] r321841 - WholeProgramDevirt: Simplify ORE getter mechanism for old PM. NFCI.
Peter Collingbourne via llvm-commits
- [llvm] r321842 - Revert r321838 -- It broke some of the builders.
Lang Hames via llvm-commits
- [PATCH] D39339: [CallGraph] Refine call graph for indirect calls with !callees metadata
Matthew Simpson via Phabricator via llvm-commits
- [PATCH] D39869: [Inliner] Inline through indirect call sites having !callees metadata
Matthew Simpson via Phabricator via llvm-commits
- [www] r321843 - Updating the EuroLLVM 2018 dev meeting page with call for papers information
Phillip Power via llvm-commits
- [llvm] r321844 - Debug Info: Support DW_AT_calling_convention on composite types.
Adrian Prantl via llvm-commits
- [PATCH] D41752: [CMake] Collect target names in the global LLVM_RUNTIMES property
Petr Hosek via Phabricator via llvm-commits
- [PATCH] D41753: [libunwind][CMake] Collect target names in the global LLVM_RUNTIMES property
Petr Hosek via Phabricator via llvm-commits
- [PATCH] D41754: [CMake] Collect target names in the global LLVM_RUNTIMES property
Petr Hosek via Phabricator via llvm-commits
- [llvm] r321853 - [ORC] Re-apply r321838 - Addition of new ORC core APIs.
Lang Hames via llvm-commits
- [llvm] r321857 - [GISel]: Don't create G_MUL with 1 during translation of GEP
Aditya Nandakumar via llvm-commits
- [llvm] r321858 - [ORC] Re-revert r321838: Tests are still failing.
Lang Hames via llvm-commits
- [PATCH] D41757: [Docs] Add a configuration note about building with CCACHE support.
Matt Davis via Phabricator via llvm-commits
- [PATCH] D41758: [PowerPC] Fix assertion due to assuming a type is simple.
Sean Fertile via Phabricator via llvm-commits
- [compiler-rt] r321860 - o -fsanitize=function warning when calling noexcept function through non-noexcept pointer in C++17
Stephan Bergmann via llvm-commits
- [llvm] r321862 - [DAGCombine] Fix for PR37563
Sam Parker via llvm-commits
- [llvm] r321863 - [DebugInfo] Don't crash when given invalid DWARFv5 line table prologue.
Jonas Devlieghere via llvm-commits
- [PATCH] D41761: Introduce llvm.nospeculateload intrinsic
Kristof Beyls via Phabricator via llvm-commits
- [llvm] r321865 - [AArch64] Fix -mcpu option in aarch64-combine-fmul-fsub.mir (NFC)
Florian Hahn via llvm-commits
- [PATCH] D40134: [asan] Add support for AArch64 ILP32
Adhemerval Zanella via Phabricator via llvm-commits
- [PATCH] D41762: [DWARF] Incorrect prologue end line record.
Carlos Alberto Enciso via Phabricator via llvm-commits
- [PATCH] D41763: [DebugInfo] Align comments in debug_loc section
Bjorn Pettersson via Phabricator via llvm-commits
- [llvm] r321866 - [ARM] Issue an erorr when non-general-purpose registers are used in address operands
Momchil Velikov via llvm-commits
- [llvm] r321868 - [X86] Regenerate illegal move test
Simon Pilgrim via llvm-commits
- [llvm] r321869 - [SLP] Update tests checks, NFC.
Alexey Bataev via llvm-commits
- [llvm] r321870 - [SLP] Update test checks, NFC.
Alexey Bataev via llvm-commits
- [PATCH] D41765: [CodeGen] Provide an advanced shrink-wrapping interface
Francis Visoiu Mistrih via Phabricator via llvm-commits
- [PATCH] D41296: Limit size of non-GlobalValue name
Hal Finkel via Phabricator via llvm-commits
- [llvm] r321871 - [llvm-cov] Multi-threaded implementation of prepareFileReports method.
Max Moroz via llvm-commits
- [llvm] r321872 - [SLP] Update more test checks, NFC.
Alexey Bataev via llvm-commits
- [llvm] r321873 - [BasicAA] Fix linearization of shifts beyond the bitwidth.
Davide Italiano via llvm-commits
- [llvm] r321874 - remove unnecessary target triple from generic test
Adrian Prantl via llvm-commits
- [llvm] r321875 - add 'REQUIRES: object-emission' to test
Adrian Prantl via llvm-commits
- [PATCH] D37528: [JumpThreading] Preserve DT and LVI across the pass.
Brian Rzycki via Phabricator via llvm-commits
- [PATCH] D41626: [LiveDebugValues]Change condition for block termination recognition
Adrian Prantl via Phabricator via llvm-commits
- [PATCH] D41766: [MachineCombiner] Add check for optimal pattern order.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D41767: [SLP] Fix PR35777: Incorrect handling of aggregate values.
Alexey Bataev via Phabricator via llvm-commits
- [llvm] r321876 - [llvm-cov] Temporarily disable multithreaded-report.test on Windows.
Max Moroz via llvm-commits
- [PATCH] D39912: AMDGPU/SI: Implement d16 support for image intrinsics
Changpeng Fang via Phabricator via llvm-commits
- [PATCH] D41769: [mips] Remove duplicated R6 EVA instructions
Aleksandar Beserminji via Phabricator via llvm-commits
- [PATCH] D41335: [InlineFunction] Inline vararg functions that do not access varargs.
Florian Hahn via Phabricator via llvm-commits
- [PATCH] D41770: Rewrite our relocation processing
Rafael Avila de Espindola via Phabricator via llvm-commits
- [llvm] r321877 - [Option] Add 'findNearest' method to catch typos
Brian Gesiak via llvm-commits
- [PATCH] D41771: [mips] Include EVA instructions in the Std2MicroMips mapping tables
Aleksandar Beserminji via Phabricator via llvm-commits
- [PATCH] D41772: [AArch64] optimise v4f16 FCMPs to utilise vector instructions
Carey Williams via Phabricator via llvm-commits
- [PATCH] D41773: [ELF] Compress debug sections after assignAddresses and support custom layout
James Henderson via Phabricator via llvm-commits
- [PATCH] D41774: [GlobalISel] Refactory CallLowering handleAssignments for custom <Target>CCState
Leslie Zhai via Phabricator via llvm-commits
- [PATCH] D41775: [ARM] Add codegen for SMMULR, SMMLAR and SMMLSR
Andre Vieira via Phabricator via llvm-commits
- [PATCH] D41776: [lit] Implement "-r" option for builtin "diff" command + a test using that.
Max Moroz via Phabricator via llvm-commits
- [llvm] r321878 - RegionInfo: Use report_fatal_error instead of llvm_unreachable
Matt Arsenault via llvm-commits
- [PATCH] D41777: [TSan][MIPS] Expand mips sanitizer memory space to include shadow mappings of low addresses
Miloš Stojanović via Phabricator via llvm-commits
- [llvm] r321880 - [MSF] Fix FPM interval calcluation
Zachary Turner via llvm-commits
- [PATCH] D41778: Improve diagnostics for instruction mapping
Aleksandar Beserminji via Phabricator via llvm-commits
- [llvm] r321881 - [llvm-mt] Remove platform-specific path in test
Brian Gesiak via llvm-commits
- [llvm] r321882 - [InstCombine] add folds for min(~a, b) --> ~max(a, b)
Sanjay Patel via llvm-commits
- [lld] r321883 - [PDB] Correctly link S_FILESTATIC records.
Zachary Turner via llvm-commits
- [llvm] r321883 - [PDB] Correctly link S_FILESTATIC records.
Zachary Turner via llvm-commits
- [llvm] r321884 - [llvm-objcopy] Add --localize-hidden option
Jake Ehrlich via llvm-commits
- [lld] r321885 - Fix unhandled switch values.
Zachary Turner via llvm-commits
- [llvm] r321886 - Limit size of non-GlobalValue name
Serge Guelton via llvm-commits
- [PATCH] D41782: [CallSiteSplitting]use constrained argument from single predecessors
Jun Bum Lim via Phabricator via llvm-commits
- [llvm] r321887 - Fix -Wsign-compare warnings on Windows
Reid Kleckner via llvm-commits
- [llvm] r321888 - [llvm-cov] Change test to use FileCheck instead of grep.
Douglas Yung via llvm-commits
- [lld] r321889 - Centralize Config->IsRela handling.
Rafael Espindola via llvm-commits
- [llvm] r321891 - [Hexagon] Set boolean contents in HexagonISelLowering
Krzysztof Parzyszek via llvm-commits
- [llvm] r321892 - [Hexagon] Add pattern for vsplat to v8i8
Krzysztof Parzyszek via llvm-commits
- [lld] r316731 - De-template EhFrameSection. NFC.
Galina Kistanova via llvm-commits
- [llvm] r321893 - [Hexagon] Add a bitcast to required type in LowerHvxMul
Krzysztof Parzyszek via llvm-commits
- [llvm] r321894 - [Hexagon] Add patterns for sext_inreg of HVX vector types
Krzysztof Parzyszek via llvm-commits
- [llvm] r321895 - [Hexagon] Add patterns for truncating HVX vector types
Krzysztof Parzyszek via llvm-commits
- [llvm] r321897 - [Hexagon] Even simpler patterns for sign- and zero-extending HVX vectors
Krzysztof Parzyszek via llvm-commits
- [PATCH] D41783: [AMDGPU] Copy impdefs from pseudo to real instructions
Stanislav Mekhanoshin via Phabricator via llvm-commits
- [llvm] r321898 - [X86] Stop printing moves between VR64 and GR64 with 'movd' mnemonic. Use 'movq' instead.
Craig Topper via llvm-commits
- [PATCH] D41784: Fix some issues with opt-viewer tests, plus disable them on Windows
Zachary Turner via Phabricator via llvm-commits
- [PATCH] D41272: Don't try to run MCJIT/OrcJIT EH tests when C++ library is statically linked
Chris Bieneman via Phabricator via llvm-commits
- [lld] r321900 - Simplify handling of size relocations.
Rafael Espindola via llvm-commits
- [llvm] r321901 - dwarfdump: Match the --uuid output with that of Darwin dwarfdump.
Adrian Prantl via llvm-commits
- [llvm] r321902 - Revert r321897: affected testcases were not updated
Krzysztof Parzyszek via llvm-commits
- [llvm] r321903 - [X86] Add InstAliases for 'vmovd' with GR64 registers to select EVEX encoded instructions as well.
Craig Topper via llvm-commits
- [llvm] r321904 - Revert r321894: it requires a part of another commit that is not ready yet
Krzysztof Parzyszek via llvm-commits
- [llvm] r321905 - Fix some opt-viewer test issues and disable on Windows.
Zachary Turner via llvm-commits
- [PATCH] D41786: [SLP] Fix PR35628: Count external uses on extra reduction arguments.
Alexey Bataev via Phabricator via llvm-commits
- [llvm] r321907 - [DebugInfo] Align comments in debug_loc section
Bjorn Pettersson via llvm-commits
- [llvm] r321908 - [Hexagon] Even simpler patterns for sign- and zero-extending HVX vectors
Krzysztof Parzyszek via llvm-commits
- [llvm] r321910 - [ORC] Re-apply just the AsynchronousSymbolLookup class from r321838 while I
Lang Hames via llvm-commits
- [PATCH] D41787: [Utils] Simplify salvageDebugInfo, NFCI
Vedant Kumar via Phabricator via llvm-commits
- [PATCH] D35192: [ARM] Use ADDCARRY / SUBCARRY
Eli Friedman via Phabricator via llvm-commits
- [llvm] r321911 - Re-land "Fix faulty assertion in debug info"
Adrian McCarthy via llvm-commits
- [llvm] r321912 - [X86] Add vcvtsd2sil/vcvtsd2siq etc. InstAliases to the EVEX-encoded instructions.
Craig Topper via llvm-commits
- [PATCH] D40077: [lit][test-suite] - Allow 1 test to report multiple individual test results
Brian Homerding via Phabricator via llvm-commits
- [PATCH] D41496: [EarlyCSE] Salvage debug info during DCE
Vedant Kumar via Phabricator via llvm-commits
- [llvm] r321915 - [Utils] Simplify salvageDebugInfo, NFCI
Vedant Kumar via llvm-commits
- [PATCH] D41791: [DAG Legalization] Zero-extend the value compared in cmpxchg
Nemanja Ivanovic via Phabricator via llvm-commits
- [llvm] r321918 - [Debugify] Handled unsized types
Vedant Kumar via llvm-commits
- [PATCH] D41793: [Debugify] Add an env var to enable faster testing
Vedant Kumar via Phabricator via llvm-commits
- [PATCH] D41794: [X86] Improve AVX1 shuffle lowering for v8f32 shuffles where the low half comes from V1 and the high half comes from V2 and the halves do the same operation
Craig Topper via Phabricator via llvm-commits
- [llvm] r321919 - [ORC] Fix a think-o in the current AsynchronousSymbolQuery test.
Lang Hames via llvm-commits
- [llvm] r321920 - [ORC] Temporarily adding some redundant asserts / debug output to aid in
Lang Hames via llvm-commits
- [PATCH] D41798: [LegalizeDAG] Fix ATOMIC_CMP_SWAP_WITH_SUCCESS legalization.
Eli Friedman via Phabricator via llvm-commits
- [PATCH] D41801: Fix pretty printing the unspecified param of a variadic function
Aaron Smith via Phabricator via llvm-commits
- [llvm] r321925 - [ORC] More debugging output to track down tester failures.
Lang Hames via llvm-commits
- [llvm] r321926 - [ORC] Fix the counter type on SymbolStringPool entries.
Lang Hames via llvm-commits
- [llvm] r321927 - [ORC] Yet more debugging output to diagnose test failures.
Lang Hames via llvm-commits
- [llvm] r321928 - [X86] Run dos2unix on a test file. NFC
Craig Topper via llvm-commits
- [llvm] r321929 - [X86] Call lowerShuffleAsRepeatedMaskAndLanePermute from lowerV4I64VectorShuffle.
Craig Topper via llvm-commits
- [llvm] r321930 - [X86] When parsing rounding mode operands, provide a proper end location so we don't crash when trying to print an error message using it.
Craig Topper via llvm-commits
- [llvm] r321931 - [X86] Rename the EVEX encoded GFNI instructions to start with a 'V'. NFC
Craig Topper via llvm-commits
- [PATCH] D38313: [InstCombine] Introducing Aggressive Instruction Combine pass
Amjad Aboud via Phabricator via llvm-commits
- [PATCH] D40147: [MIPS] Handle cross-mode (regular <-> microMIPS) jumps
Simon Atanasyan via Phabricator via llvm-commits
- [PATCH] D36311: [ThinLTO] Add GraphTraits for FunctionSummaries
Charles Saternos via Phabricator via llvm-commits
- [PATCH] D41802: Allow users of the GCOV API to extend the FileInfo class to implement custom output formats
Marco Castelluccio via Phabricator via llvm-commits
- [llvm] r321934 - [x86, MemCmpExpansion] allow 2 pairs of loads per block (PR33325)
Sanjay Patel via llvm-commits
- [llvm] r321935 - [InstCombine] add more tests for max(~a, ~b) and PR35834; NFC
Sanjay Patel via llvm-commits
- [llvm] r321936 - [InstCombine] relax use constraint for min/max (~a, ~b) --> ~min/max(a, b)
Sanjay Patel via llvm-commits
- [PATCH] D41803: ldd::COFF: initalize ErrorHandler with CanExitEarly value
Shoaib Meenai via Phabricator via llvm-commits
- [PATCH] D36850: [ThinLTO] Add norecurse function attribute propagation
Charles Saternos via Phabricator via llvm-commits
- [llvm] r321938 - [TableGen] Make the ambiguous match debug messages from the AsmMatcherEmitter slightly more useful.
Craig Topper via llvm-commits
- [llvm] r321939 - [X86] Remove memory forms of EVEX encoded vcvtsd2si/vcvtss2si from the assembler matcher table
Craig Topper via llvm-commits
- [PATCH] D41226: LiveDebugValues spill recognition expasnsion
Adrian Prantl via Phabricator via llvm-commits
- [llvm] r321940 - [InlineFunction] Inline vararg functions that do not access varargs.
Florian Hahn via llvm-commits
- [llvm] r321941 - [ORC] Remove AsynchronousSymbolQuery while I debug an issue on one of the
Lang Hames via llvm-commits
- [PATCH] D41555: [InlineFunction] Preserve attributes when forwarding VarArgs.
Florian Hahn via Phabricator via llvm-commits
- [llvm] r321942 - [InlineFunction] Preserve attributes when forwarding VarArgs.
Florian Hahn via llvm-commits
- [llvm] r321943 - [InlineFunction] Preserve calling convention when forwarding VarArgs.
Florian Hahn via llvm-commits
- [PATCH] D41556: [InlineFunction] Preserve calling convention when forwarding VarArgs.
Florian Hahn via Phabricator via llvm-commits
- [llvm] r321944 - [X86] Remove an unnecessary VCVTTSD2SIrrb/VCVTSS2SIrrb instruction with no isel pattern that only existed for the assembler. Use VCVTTSD2SIrrb_Int instead.
Craig Topper via llvm-commits
- [PATCH] D41804: [cmake] Fix typo in LLVM_UTILS_INSTALL_DIR definition.
Don Hinton via Phabricator via llvm-commits
- [llvm] r321945 - [X86] Add load folding pattern to EVEX vcvttss2si/vcvtsd2si.
Craig Topper via llvm-commits
- [llvm] r321946 - [X86] Remove memory forms of EVEX encoded vcvttss2si/vcvttsd2si from asm matcher table.
Craig Topper via llvm-commits
- [llvm] r321947 - [X86] Remove assembler predicates from all AVX512 related feature flags.
Craig Topper via llvm-commits
- [PATCH] D41723: Introduce the "retpoline" x86 mitigation technique for variant #2 of the speculative execution vulnerabilities disclosed today, specifically identified by CVE-2017-5715, "Branch Target Injection", and is one of the two halves to ...
Giancarlo Maiano via llvm-commits
- [PATCH] D41806: [cmake] Remove unused NATIVE LLVM_CONFIG_EXE logic.
Don Hinton via Phabricator via llvm-commits
- [PATCH] D41371: Remove redundant #define's from llvm/config.h
Don Hinton via Phabricator via llvm-commits
- [PATCH] D41580: CMAKE: Add flags to skip building NATIVE tools
Don Hinton via Phabricator via llvm-commits
- [llvm] r321949 - [X86] Add CMP8ri8 to load folding tables.
Craig Topper via llvm-commits
- [llvm] r321950 - [X86] Remove cvtps2ph xmm->xmm from store folding tables. Add the evex versions of cvtps2ph to the store folding tables.
Craig Topper via llvm-commits
- [llvm] r321951 - [X86] Add EVEX vcvtph2ps to the load folding tables.
Craig Topper via llvm-commits
- [llvm] r321952 - [X86] Add some 8 and 16-bit instructions to the load folding tables.
Craig Topper via llvm-commits
- [llvm] r321953 - [X86] Add 128 and 256-bit VPOPCNTD/Q instructions to load folding tables.
Craig Topper via llvm-commits
- [llvm] r321954 - [X86] Don't put any EVEX_B instructions in the tablegen generated load folding tables.
Craig Topper via llvm-commits
- [llvm] r321955 - [X86] Add TB_NO_REVERSE to some scalar intrinsic instructions in the load folding table.
Craig Topper via llvm-commits
- [llvm] r321956 - [X86] Correct the load folding flags for xmm fp->mmx conversion instructions.
Craig Topper via llvm-commits
- [llvm] r321958 - [X86] Add the 16 and 8-bit CRC32 instructions to the load folding tables.
Craig Topper via llvm-commits
- [llvm] r321959 - [PowerPC] Add an ISD::TRUNCATE to the legalization for ppc_is_decremented_ctr_nonzero
Craig Topper via llvm-commits
- [PATCH] D41585: [Greedy RegAlloc] Take into account the cost of local intervals when selecting split candidate.
Marina Yatsina via Phabricator via llvm-commits
- [PATCH] D40333: Separate LoopTraversal and BreakFalseDeps out of ExecutionDomainFix into their own files
Marina Yatsina via Phabricator via llvm-commits
- [llvm] r321961 - [CodeExtractor] Use subset of function attributes for extracted function.
Florian Hahn via llvm-commits
- [llvm] r321962 - [LV][VPlan] NFC patch to move LoopVectorizationPlanner class out of LoopVectorize.cpp
Hal Finkel via llvm-commits
- [zorg] r321965 - Remove openmp-ompt builders
Jonas Hahnfeld via llvm-commits
- [PATCH] D41608: [WIP][InstCombine] Missed optimization in math expression: aggressive optimization with pow
Dmitry Venikov via Phabricator via llvm-commits
- [llvm] r321967 - [X86] Make v2i1 and v4i1 legal types without VLX
Craig Topper via llvm-commits
- [PATCH] D38799: [mips] Add MIPS ABI enumeration and getter function to the Triple class
Simon Atanasyan via Phabricator via llvm-commits
- [llvm] r321968 - [X86] Remove unneeded code from combineGatherScatter that used to delte SIGN_EXTEND_INREG nodes created during legalization of v2i1/v4i1 masks on KNL.
Craig Topper via llvm-commits
- [llvm] r321969 - [DAG] Fix for Bug PR34620 - Allow SimplifyDemandedBits to look through bitcasts
Simon Pilgrim via llvm-commits
- [PATCH] D41436: [X86][AVX512] Enable variable shuffle combining by default on AVX512 targets
Zvi Rackover via Phabricator via llvm-commits
- [PATCH] D41810: test case for Aggressive FMA on AArch64
Stefan Teleman via Phabricator via llvm-commits
- [PATCH] D40696: Enable aggressive FMA on T99 and provide AArch64 option for other micro-arch's
Stefan Teleman via Phabricator via llvm-commits
- [llvm] r321970 - X86 Tests: Add Tests for PMADDWD selection. NFC.
Zvi Rackover via llvm-commits
- [PATCH] D41811: X86: Add pattern matching for PMADDWD
Zvi Rackover via Phabricator via llvm-commits
- [llvm] r321971 - [X86] Revert accidental change to CMakeLists.txt in r321952
Craig Topper via llvm-commits
- [PATCH] D41812: [CVP] Replace incoming values from unreachable blocks with undef
Davide Italiano via Phabricator via llvm-commits
- [llvm] r321974 - [SLPVectorizer] Reintroduce std::stable_sort(properlyDominates()).
Davide Italiano via llvm-commits
- [llvm] r321975 - Revert "[SCCP] Manually fold branches on undef."
Davide Italiano via llvm-commits
- [llvm] r321978 - [X86] Add VSHUFF32X4 and similar instructions to load folding tables.
Craig Topper via llvm-commits
- [llvm] r321979 - [X86] Simplify some code in lower1BitVectorShuffle by relying on getNode's ability to constant fold vector SIGN_EXTEND.
Craig Topper via llvm-commits
- [PATCH] D36215: [IRCE] Return "Identify loops with latch comparison against current IV value"
Max Kazantsev via Phabricator via llvm-commits
- [PATCH] D41813: [builtins] Enable CRT_HAS_128BIT for MSVC
Loo Rong Jie via Phabricator via llvm-commits
- [llvm] r321980 - [llvm-readobj] Support -needed-libs option for Mach-O files
Petr Hosek via llvm-commits
- [PATCH] D41527: [llvm-readobj] Support -needed-libs option for Mach-O files
Petr Hosek via Phabricator via llvm-commits
- [llvm] r321981 - Don't try to run MCJIT/OrcJIT EH tests when C++ library is statically linked
Petr Hosek via llvm-commits
- [lld] r321982 - [ELF] Drop unnecessary VersionId setting in scanShlibUndefined
Shoaib Meenai via llvm-commits
- [lld] r321983 - [COFF] Initalize ErrorHandler with CanExitEarly value
Shoaib Meenai via llvm-commits
- [PATCH] D41814: [COFF] Delete CanExitEarly
Shoaib Meenai via Phabricator via llvm-commits
- [llvm] r321984 - [X86] Add patterns to allow 512-bit BWI compare instructions to be used for 128/256-bit compares when VLX is not available.
Craig Topper via llvm-commits
- [llvm] r321985 - [X86] Replace CVT2MASK ISD opcode with PCMPGTM compared to zero.
Craig Topper via llvm-commits
Last message date:
Sun Jan 7 23:51:48 PST 2018
Archived on: Sun Jan 7 23:50:45 PST 2018
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