[PATCH] D41651: AMDGPU: Add 32-bit constant address space

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 2 20:30:19 PST 2018

arsenm added inline comments.

Comment at: lib/Target/AMDGPU/SIISelLowering.cpp:153
+  // TODO: This breaks unaligned loads, so don't do it on AmdHsa.
+  if (!Subtarget->isAmdHsaOS())
+    setOperationAction(ISD::LOAD, MVT::i32, Custom);
t-tye wrote:
> Would it be better to add a query for whether unaligned accesses were supported? Currently it would only be for AmdHsaOS but would allow it to be easily changed in the future.
We already have that. The problem is working around a variety of issues derived from operation legality not being specified per address space of 


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