[PATCH] D41341: [X86] WIP disable 512-bit vectors during type legalization for prefer-vector-width

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 128583.
craig.topper added a comment.

Added test cases for all places where I had to prevent extending to 512-bit to legalize an operation.

Fixed a bug in zext and sext lowering that created a v8i8 node and forced scalarization.


https://reviews.llvm.org/D41341

Files:
  lib/Target/X86/CMakeLists.txt
  lib/Target/X86/X86.h
  lib/Target/X86/X86.td
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86Subtarget.cpp
  lib/Target/X86/X86Subtarget.h
  lib/Target/X86/X86TargetMachine.cpp
  lib/Target/X86/X86TargetTransformInfo.cpp
  lib/Target/X86/X86VectorWidthInfer.cpp
  test/CodeGen/X86/prefer-avx256-lzcnt.ll
  test/CodeGen/X86/prefer-avx256-mask-extend.ll
  test/CodeGen/X86/prefer-avx256-mask-shuffle.ll
  test/CodeGen/X86/prefer-avx256-popcnt.ll
  test/CodeGen/X86/prefer-avx256-shift.ll
  test/CodeGen/X86/prefer-avx256-trunc.ll
  test/CodeGen/X86/prefer-avx256-wide-mul.ll

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