[PATCH] D41775: [ARM] Add codegen for SMMULR, SMMLAR and SMMLSR

[Andre Vieira via Phabricator via llvm-commits]

avieira created this revision.
avieira added reviewers: rengolin, t.p.northover.
Herald added subscribers: kristof.beyls, javed.absar, aemerson.

This patch teaches the Arm back-end to generate the SMMULR, SMMLAR and SMMLSR instructions from equivalent IR patterns.

I forbid generation of these if '-arm-use-mulops=false' is passed to the command-line since t2SMMLAR and t2SMMLSR have UseMulOps as a predicate.
Adding bob.wilson to make sure this is intended behavior.

This patch also fixes an issue where SMMLS was being generated for Armv7-M, where it should only be generated for Armv7E-M (aka Armv7-M with DSP extensions).


https://reviews.llvm.org/D41775

Files:
  lib/Target/ARM/ARMISelDAGToDAG.cpp
  lib/Target/ARM/ARMISelLowering.cpp
  lib/Target/ARM/ARMISelLowering.h
  lib/Target/ARM/ARMInstrInfo.td
  lib/Target/ARM/ARMInstrThumb2.td
  test/CodeGen/ARM/dsp-mlal.ll
  test/CodeGen/ARM/smml.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D41775.128765.patch
Type: text/x-patch
Size: 16459 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180105/771b5a99/attachment.bin>