[PATCH] D41625: [DAGCombine] Fix for PR35765

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This revision was automatically updated to reflect the committed changes.
Closed by commit rL321641: [DAGCombine] Fix for PR35765 (authored by sam_parker, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D41625?vs=128336&id=128401#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D41625

Files:
  llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/trunk/test/CodeGen/X86/pr35765.ll


Index: llvm/trunk/test/CodeGen/X86/pr35765.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/pr35765.ll
+++ llvm/trunk/test/CodeGen/X86/pr35765.ll
@@ -17,8 +17,9 @@
 ; CHECK-NEXT:    movzwl {{.*}}(%rip), %ecx
 ; CHECK-NEXT:    movzwl {{.*}}(%rip), %edx
 ; CHECK-NEXT:    notl %edx
+; CHECK-NEXT:    orl $63488, %edx # imm = 0xF800
+; CHECK-NEXT:    movzwl %dx, %edx
 ; CHECK-NEXT:    orl %ecx, %edx
-; CHECK-NEXT:    orl $-2048, %edx # imm = 0xF800
 ; CHECK-NEXT:    xorl %eax, %edx
 ; CHECK-NEXT:    movslq %edx, %rax
 ; CHECK-NEXT:    movq %rax, {{.*}}(%rip)
Index: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -3850,7 +3850,6 @@
       return false;
     }
     case ISD::ZERO_EXTEND:
-    case ISD::ANY_EXTEND:
     case ISD::AssertZext: {
       unsigned ActiveBits = Mask->getAPIntValue().countTrailingOnes();
       EVT ExtVT = EVT::getIntegerVT(*DAG.getContext(), ActiveBits);


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