[llvm] r321945 - [X86] Add load folding pattern to EVEX vcvttss2si/vcvtsd2si.

Craig Topper via llvm-commits llvm-commits at lists.llvm.org
Sat Jan 6 13:02:26 PST 2018


Author: ctopper
Date: Sat Jan  6 13:02:26 2018
New Revision: 321945

URL: http://llvm.org/viewvc/llvm-project?rev=321945&view=rev
Log:
[X86] Add load folding pattern to EVEX vcvttss2si/vcvtsd2si.

Modified:
    llvm/trunk/lib/Target/X86/X86InstrAVX512.td
    llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll

Modified: llvm/trunk/lib/Target/X86/X86InstrAVX512.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86InstrAVX512.td?rev=321945&r1=321944&r2=321945&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86InstrAVX512.td (original)
+++ llvm/trunk/lib/Target/X86/X86InstrAVX512.td Sat Jan  6 13:02:26 2018
@@ -6616,12 +6616,13 @@ let Predicates = [HasAVX512] in {
             [(set _DstRC.RC:$dst, (OpNodeRnd (_SrcRC.VT _SrcRC.RC:$src),
                                   (i32 FROUND_NO_EXC)))], itins.rr>,
                                   EVEX,VEX_LIG , EVEX_B, Sched<[itins.Sched]>;
-  let mayLoad = 1, hasSideEffects = 0 in
-    def rm_Int : AVX512<opc, MRMSrcMem, (outs _DstRC.RC:$dst),
-                (ins _SrcRC.IntScalarMemOp:$src),
-                !strconcat(asm,"\t{$src, $dst|$dst, $src}"),
-                [], itins.rm>, EVEX, VEX_LIG,
-                Sched<[itins.Sched.Folded, ReadAfterLd]>;
+  def rm_Int : AVX512<opc, MRMSrcMem, (outs _DstRC.RC:$dst),
+              (ins _SrcRC.IntScalarMemOp:$src),
+              !strconcat(asm,"\t{$src, $dst|$dst, $src}"),
+              [(set _DstRC.RC:$dst, (OpNodeRnd
+                                     (_SrcRC.VT _SrcRC.ScalarIntMemCPat:$src),
+                                     (i32 FROUND_CURRENT)))], itins.rm>,
+              EVEX, VEX_LIG, Sched<[itins.Sched.Folded, ReadAfterLd]>;
 
   def : InstAlias<asm # aliasStr # "\t{$src, $dst|$dst, $src}",
           (!cast<Instruction>(NAME # "rr_Int") _DstRC.RC:$dst, _SrcRC.RC:$src), 0>;

Modified: llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll?rev=321945&r1=321944&r2=321945&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll (original)
+++ llvm/trunk/test/CodeGen/X86/avx512-intrinsics.ll Sat Jan  6 13:02:26 2018
@@ -503,6 +503,16 @@ define i32 @test_x86_avx512_cvttss2si(<4
 }
 declare i32 @llvm.x86.avx512.cvttss2si(<4 x float>, i32) nounwind readnone
 
+define i32 @test_x86_avx512_cvttss2si_load(<4 x float>* %a0) {
+; CHECK-LABEL: test_x86_avx512_cvttss2si_load:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vcvttss2si (%rdi), %eax
+; CHECK-NEXT:    retq
+  %a1 = load <4 x float>, <4 x float>* %a0
+  %res = call i32 @llvm.x86.avx512.cvttss2si(<4 x float> %a1, i32 4) ;
+  ret i32 %res
+}
+
 define i64 @test_x86_avx512_cvttss2si64(<4 x float> %a0) {
 ; CHECK-LABEL: test_x86_avx512_cvttss2si64:
 ; CHECK:       ## %bb.0:




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