[PATCH] D41675: Change memcpy/memove/memset to have dest and source alignment attributes.

Daniel Neilson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jan 2 11:58:28 PST 2018 

dneilson created this revision.
dneilson added reviewers: pete, hfinkel, lhames.
Herald added subscribers: sabuasal, apazos, jordy.potman.lists, simoncook, johnrusso, rbar, asb, JDevlieghere, kbarton, aheejin, eraman, jgravelle-google, sbc100, javed.absar, nhaehnle, david2050, nemanjai, sdardis, mehdi_amini, dylanmckay, dschuff, arsenm, sanjoy, jfb, qcolombet, jholewinski.

This is a resurrection of work first proposed and discussed in Aug 2015:
 http://lists.llvm.org/pipermail/llvm-dev/2015-August/089384.html
and initially landed (but then backed out) in Nov 2015:
 http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20151109/312083.html

The @llvm.memcpy/memmove/memset intrinsics currently have an explicit argument
which is required to be a constant integer. It represents the alignment of the
dest (and source), and so must be the minimum of the actual alignment of the
two.

This change allows source and dest to each have their own alignments by
using the alignment attribute on their arguments. The alignment argument
is removed.

For example, code which used to read:
 call void @llvm.memcpy.p0i8.p0i8.i32(i8* %dest, i8* %src, i32 100, i32 4, i1 false)
will now read
 call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 4 %dest, i8* align 4 %src, i32 100, i1 false)

There are a few places in the code for which the code needs to be
checked by an expert as to whether using only src/dest alignment is
safe. For those places, they currently take the minimum of the src/dest
alignments; which matches the current behaviour.

The API for creating a memcpy/memmove call via IRBuilder has been changed;
downstream users will be unable to compile until they are updated. The IRBuilder
for creating memset calls remains unchanged.

Downstream users may also have to update their lit tests that check for
@llvm.memcpy/memmove/memset call/declaration patterns. The following extended sed script
may help with updating the majority of your tests, but it does not catch all possible
patterns so some manual checking and updating will be required.

s~declare void @llvm\.mem(set|cpy|move)\.p([^(]*)\((.*), i32, i1\)~declare void @llvm.mem\1.p\2(\3, i1)~g
s~call void @llvm\.memset\.p([^(]*)i8\(i8([^*]*)\* (.*), i8 (.*), i8 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i8(i8\2* \3, i8 \4, i8 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i16\(i8([^*]*)\* (.*), i8 (.*), i16 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i16(i8\2* \3, i8 \4, i16 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i32\(i8([^*]*)\* (.*), i8 (.*), i32 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i32(i8\2* \3, i8 \4, i32 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i64\(i8([^*]*)\* (.*), i8 (.*), i64 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i64(i8\2* \3, i8 \4, i64 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i128\(i8([^*]*)\* (.*), i8 (.*), i128 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.memset.p\1i128(i8\2* \3, i8 \4, i128 \5, i1 \6)~g
s~call void @llvm\.memset\.p([^(]*)i8\(i8([^*]*)\* (.*), i8 (.*), i8 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i8(i8\2* align \6 \3, i8 \4, i8 \5, i1 \7)~g
s~call void @llvm\.memset\.p([^(]*)i16\(i8([^*]*)\* (.*), i8 (.*), i16 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i16(i8\2* align \6 \3, i8 \4, i16 \5, i1 \7)~g
s~call void @llvm\.memset\.p([^(]*)i32\(i8([^*]*)\* (.*), i8 (.*), i32 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i32(i8\2* align \6 \3, i8 \4, i32 \5, i1 \7)~g
s~call void @llvm\.memset\.p([^(]*)i64\(i8([^*]*)\* (.*), i8 (.*), i64 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i64(i8\2* align \6 \3, i8 \4, i64 \5, i1 \7)~g
s~call void @llvm\.memset\.p([^(]*)i128\(i8([^*]*)\* (.*), i8 (.*), i128 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.memset.p\1i128(i8\2* align \6 \3, i8 \4, i128 \5, i1 \7)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i8\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i8 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i8(i8\3* \4, i8\5* \6, i8 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i16\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i16 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i16(i8\3* \4, i8\5* \6, i16 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i32\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i32 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i32(i8\3* \4, i8\5* \6, i32 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i64\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i64 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i64(i8\3* \4, i8\5* \6, i64 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i128\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i128 (.*), i32 [01], i1 ([^)]*)\)~call void @llvm.mem\1.p\2i128(i8\3* \4, i8\5* \6, i128 \7, i1 \8)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i8\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i8 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i8(i8\3* align \8 \4, i8\5* align \8 \6, i8 \7, i1 \9)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i16\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i16 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i16(i8\3* align \8 \4, i8\5* align \8 \6, i16 \7, i1 \9)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i32\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i32 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i32(i8\3* align \8 \4, i8\5* align \8 \6, i32 \7, i1 \9)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i64\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i64 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i64(i8\3* align \8 \4, i8\5* align \8 \6, i64 \7, i1 \9)~g
s~call void @llvm\.mem(cpy|move)\.p([^(]*)i128\(i8([^*]*)\* (.*), i8([^*]*)\* (.*), i128 (.*), i32 ([0-9]*), i1 ([^)]*)\)~call void @llvm.mem\1.p\2i128(i8\3* align \8 \4, i8\5* align \8 \6, i128 \7, i1 \9)~g


https://reviews.llvm.org/D41675

Files:
  docs/LangRef.rst
  include/llvm/IR/IRBuilder.h
  include/llvm/IR/IntrinsicInst.h
  include/llvm/IR/Intrinsics.td
  lib/Analysis/Lint.cpp
  lib/CodeGen/CodeGenPrepare.cpp
  lib/CodeGen/SafeStack.cpp
  lib/CodeGen/SafeStackLayout.cpp
  lib/CodeGen/SafeStackLayout.h
  lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
  lib/IR/Attributes.cpp
  lib/IR/AutoUpgrade.cpp
  lib/IR/IRBuilder.cpp
  lib/IR/Verifier.cpp
  lib/Target/AArch64/AArch64FastISel.cpp
  lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
  lib/Target/ARM/ARMFastISel.cpp
  lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
  lib/Target/Mips/MipsFastISel.cpp
  lib/Target/X86/X86FastISel.cpp
  lib/Transforms/InstCombine/InstCombineCalls.cpp
  lib/Transforms/InstCombine/InstCombineInternal.h
  lib/Transforms/Instrumentation/AddressSanitizer.cpp
  lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
  lib/Transforms/Instrumentation/MemorySanitizer.cpp
  lib/Transforms/Scalar/AlignmentFromAssumptions.cpp
  lib/Transforms/Scalar/DeadStoreElimination.cpp
  lib/Transforms/Scalar/InferAddressSpaces.cpp
  lib/Transforms/Scalar/LoopIdiomRecognize.cpp
  lib/Transforms/Scalar/MemCpyOptimizer.cpp
  lib/Transforms/Scalar/SROA.cpp
  lib/Transforms/Utils/InlineFunction.cpp
  lib/Transforms/Utils/LowerMemIntrinsics.cpp
  lib/Transforms/Utils/SimplifyLibCalls.cpp
  test/Analysis/AliasSet/memtransfer.ll
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  test/CodeGen/ARM/2009-03-07-SpillerBug.ll
  test/CodeGen/ARM/2011-03-10-DAGCombineCrash.ll
  test/CodeGen/ARM/2011-10-26-memset-inline.ll
  test/CodeGen/ARM/2011-10-26-memset-with-neon.ll
  test/CodeGen/ARM/2012-04-24-SplitEHCriticalEdge.ll
  test/CodeGen/ARM/Windows/memset.ll
  test/CodeGen/ARM/Windows/no-aeabi.ll
  test/CodeGen/ARM/arm-eabi.ll
  test/CodeGen/ARM/constantpool-promote-ldrh.ll
  test/CodeGen/ARM/constantpool-promote.ll
  test/CodeGen/ARM/crash-O0.ll
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  test/CodeGen/ARM/ldm-stm-base-materialization.ll
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  test/CodeGen/ARM/memset-inline.ll
  test/CodeGen/ARM/stack-protector-bmovpcb_call.ll
  test/CodeGen/ARM/struct-byval-frame-index.ll
  test/CodeGen/ARM/tailcall-mem-intrinsics.ll
  test/CodeGen/AVR/std-ldd-immediate-overflow.ll
  test/CodeGen/BPF/byval.ll
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  test/CodeGen/Generic/ForceStackAlign.ll
  test/CodeGen/Generic/invalid-memcpy.ll
  test/CodeGen/Hexagon/adjust-latency-stackST.ll
  test/CodeGen/Hexagon/branchfolder-keep-impdef.ll
  test/CodeGen/Hexagon/early-if-conversion-bug1.ll
  test/CodeGen/Hexagon/mem-fi-add.ll
  test/CodeGen/Hexagon/memcpy-likely-aligned.ll
  test/CodeGen/Hexagon/rdf-filter-defs.ll
  test/CodeGen/Hexagon/store-imm-stack-object.ll
  test/CodeGen/Hexagon/tail-call-mem-intrinsics.ll
  test/CodeGen/MSP430/memset.ll
  test/CodeGen/Mips/2012-12-12-ExpandMemcpy.ll
  test/CodeGen/Mips/Fast-ISel/memtest1.ll
  test/CodeGen/Mips/biggot.ll
  test/CodeGen/Mips/cconv/arguments-small-structures-bigger-than-32bits.ll
  test/CodeGen/Mips/cconv/arguments-varargs-small-structs-byte.ll
  test/CodeGen/Mips/cconv/arguments-varargs-small-structs-combinations.ll
  test/CodeGen/Mips/cconv/return-struct.ll
  test/CodeGen/Mips/largeimmprinting.ll
  test/CodeGen/Mips/long-calls.ll
  test/CodeGen/Mips/memcpy.ll
  test/CodeGen/Mips/pr33978.ll
  test/CodeGen/Mips/tailcall/tailcall.ll
  test/CodeGen/NVPTX/lower-aggr-copies.ll
  test/CodeGen/PowerPC/2011-12-05-NoSpillDupCR.ll
  test/CodeGen/PowerPC/2011-12-06-SpillAndRestoreCR.ll
  test/CodeGen/PowerPC/MMO-flags-assertion.ll
  test/CodeGen/PowerPC/aantidep-inline-asm-use.ll
  test/CodeGen/PowerPC/ctrloop-reg.ll
  test/CodeGen/PowerPC/emptystruct.ll
  test/CodeGen/PowerPC/fsl-e500mc.ll
  test/CodeGen/PowerPC/fsl-e5500.ll
  test/CodeGen/PowerPC/glob-comp-aa-crash.ll
  test/CodeGen/PowerPC/isel-rc-nox0.ll
  test/CodeGen/PowerPC/licm-remat.ll
  test/CodeGen/PowerPC/lxv-aligned-stack-slots.ll
  test/CodeGen/PowerPC/memcpy-vec.ll
  test/CodeGen/PowerPC/memcpy_dereferenceable.ll
  test/CodeGen/PowerPC/memset-nc-le.ll
  test/CodeGen/PowerPC/memset-nc.ll
  test/CodeGen/PowerPC/merge-st-chain-op.ll
  test/CodeGen/PowerPC/ppc-empty-fs.ll
  test/CodeGen/PowerPC/pr27350.ll
  test/CodeGen/PowerPC/resolvefi-basereg.ll
  test/CodeGen/PowerPC/resolvefi-disp.ll
  test/CodeGen/PowerPC/structsinmem.ll
  test/CodeGen/PowerPC/structsinregs.ll
  test/CodeGen/PowerPC/stwu8.ll
  test/CodeGen/PowerPC/tailcall-string-rvo.ll
  test/CodeGen/PowerPC/toc-load-sched-bug.ll
  test/CodeGen/RISCV/frame.ll
  test/CodeGen/SystemZ/dag-combine-02.ll
  test/CodeGen/SystemZ/loop-01.ll
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  test/CodeGen/SystemZ/memcpy-01.ll
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  test/CodeGen/Thumb/2011-05-11-DAGLegalizer.ll
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  test/CodeGen/Thumb/ldm-stm-base-materialization-thumb2.ll
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  (231 more files...)

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