[PATCH] D41662: [mips] Correct the definition of m(f|t)c(0|2)
Simon Dardis via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 2 02:28:20 PST 2018
sdardis created this revision.
sdardis added a reviewer: atanasyan.
Herald added a subscriber: arichardson.
These instructions are defined as taking a GPR register and a
coprocessor register for ISAs up to MIPS32. MIPS32 extended the
definition to allow a selector--a value from 0 to 32--to access
These instructions are now internally defined as being MIPS-I
instructions, but are rejected for pre-MIPS32 ISA's if they have
an explicit selector which is non-zero. This deviates slightly from
GAS's behaviour which rejects assembly instructions with an
explicit selector for pre-MIPS32 ISAs.
mfc0 $4, $5, 0
is rejected by GAS for MIPS-I to MIPS-V but will be accepted
with this patch for MIPS-I to MIPS-V.
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