[PATCH] D41721: [X86] Move HasNOPL to a subtarget feature bit. Plumb MCSubtargetInfo through the MCAsmBackend constructor

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

Nice, I was half way through doing this myself....

PR22965 needs addressing as well - instead of driving off the silvermont feature bit - do we need a 'PreferNop15' feature bit for AMD (fam15/fam16/ryzen) and possibly recent Intel (???) targets and otherwise use 11 byte NOPs?


https://reviews.llvm.org/D41721