The Week Of Monday 31 March 2025 Archives by author
Starting: Mon Mar 31 00:05:07 PDT 2025
Ending: Wed Apr 2 19:44:32 PDT 2025
Messages: 2081
- [clang] [llvm] Enable unnecessary-virtual-specifier by default (PR #133265)
Aaron Ballman via llvm-commits
- [llvm] [mlir] [mlir][x86vector] Simplify intrinsic generation (PR #133692)
Adam Siemieniuk via llvm-commits
- [llvm] [AMDGPU] Added hot-block-rematerialize pass (PR #126331)
Adam Yang via llvm-commits
- [libc] [llvm] [libc] Implemented utimes #133953 (PR #134167)
Aditya Tejpaul via llvm-commits
- [libc] [llvm] [libc] Implemented utimes [#133953](https://github.com/llvm/llvm-project/issues/133953) (PR #134167)
Aditya Tejpaul via llvm-commits
- [libc] [llvm] [libc] Implemented utimes (Issue #133953) (PR #134167)
Aditya Tejpaul via llvm-commits
- [libc] [llvm] [libc] Implemented utimes (Issue #133953) (PR #134167)
Aditya Tejpaul via llvm-commits
- [libc] [llvm] [libc] Implemented utimes (Issue #133953) (PR #134167)
Aditya Tejpaul via llvm-commits
- [libc] [llvm] [libc] Implemented utimes (Issue #133953) (PR #134167)
Aditya Tejpaul via llvm-commits
- [libc] [llvm] [libc] Implemented utimes (Issue #133953) (PR #134167)
Aditya Tejpaul via llvm-commits
- [llvm] [EarlyIfConverter] Fix reg killed twice after early-if-predicator and ifcvt (PR #133554)
Afanasyev Ivan via llvm-commits
- [llvm] [EarlyIfConverter] Fix reg killed twice after early-if-predicator and ifcvt (PR #133554)
Afanasyev Ivan via llvm-commits
- [llvm] [EarlyIfConverter] Fix reg killed twice after early-if-predicator and ifcvt (PR #133554)
Afanasyev Ivan via llvm-commits
- [llvm] [AArch64] Lower ptrauth.sign of constant as PtrAuthGlobalAddress. (PR #133788)
Ahmed Bougacha via llvm-commits
- [llvm] [AArch64][PAC] Combine signing with address materialization (PR #130809)
Ahmed Bougacha via llvm-commits
- [llvm] [llvm-exegesis] Error Out If Perf Counter is Not Fully Enabled (PR #132892)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis] Error Out If Perf Counter is Not Fully Enabled (PR #132892)
Aiden Grossman via llvm-commits
- [llvm] [llvm-exegesis] Error Out If Perf Counter is Not Fully Enabled (PR #132892)
Aiden Grossman via llvm-commits
- [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #134033)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #134033)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #134033)
Akshat Oke via llvm-commits
- [llvm] Stitch up loop passes in codegen pipeline (PR #133050)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #134033)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #134033)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NPM] Port AMDGPUSetWavePriority to NPM (PR #130064)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NPM] Port AMDGPUSetWavePriority to NPM (PR #130064)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NPM] Port SIPreEmitPeephole to NPM (PR #130065)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NPM] Port SIPreEmitPeephole to NPM (PR #130065)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU][NPM] Port AMDGPUSetWavePriority to NPM (PR #130064)
Akshat Oke via llvm-commits
- [llvm] Fix unused variable (PR #134069)
Akshat Oke via llvm-commits
- [llvm] Fix unused variable (PR #134069)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU] Fix unused variable NFC. (PR #134069)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU] Fix unused variable NFC. (PR #134069)
Akshat Oke via llvm-commits
- [llvm] [AMDGPU] Fix unused variable NFC. (PR #134069)
Akshat Oke via llvm-commits
- [llvm] [NVPTX] Cleanup and refactor atomic lowering (PR #133781)
Akshay Deodhar via llvm-commits
- [llvm] [NVPTX] Cleanup and refactor atomic lowering (PR #133781)
Akshay Deodhar via llvm-commits
- [clang] [llvm] [NVPTX] Auto-Upgrade llvm.nvvm.atomic.load.{inc,dec}.32 (PR #134111)
Akshay Deodhar via llvm-commits
- [llvm] [AMDGPU] Add buffer.fat.ptr.load.lds intrinsic wrapping raw rsrc version (PR #133015)
Alan Li via llvm-commits
- [llvm] [AMDGPU] Add buffer.fat.ptr.load.lds intrinsic wrapping raw rsrc version (PR #133015)
Alan Li via llvm-commits
- [llvm] Add __attribute__((retain)) to LLVM_DUMP_METHOD (PR #133025)
Aleksandr Popov via llvm-commits
- [llvm] [RISCV] Just reporting an error shouldn't generate a crash diagnostic (PR #134040)
Alex Bradbury via llvm-commits
- [llvm] [WebAssembly] Add more lowerings for wide-arithmetic (PR #132430)
Alex Crichton via llvm-commits
- [llvm] [WebAssembly] Add more lowerings for wide-arithmetic (PR #132430)
Alex Crichton via llvm-commits
- [llvm] [WebAssembly] Add more lowerings for wide-arithmetic (PR #132430)
Alex Crichton via llvm-commits
- [llvm] [WebAssembly] Add a missing `break` statement (PR #133783)
Alex Crichton via llvm-commits
- [llvm] [WebAssembly] Add more lowerings for wide-arithmetic (PR #132430)
Alex Crichton via llvm-commits
- [llvm] [NVPTX] Cleanup and refactor atomic lowering (PR #133781)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Cleanup and refactor atomic lowering (PR #133781)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Cleanup and refactor atomic lowering (PR #133781)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Cleanup and refactor atomic lowering (PR #133781)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Cleanup and refactor atomic lowering (PR #133781)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Cleanup and refactor atomic lowering (PR #133781)
Alex MacLean via llvm-commits
- [llvm] [NVPTX] Cleanup and refactor atomic lowering (PR #133781)
Alex MacLean via llvm-commits
- [llvm] [InferAS] Support getAssumedAddrSpace for Arguments for NVPTX (PR #133991)
Alex MacLean via llvm-commits
- [llvm] [InferAS] Support getAssumedAddrSpace for Arguments for NVPTX (PR #133991)
Alex MacLean via llvm-commits
- [llvm] [InferAS] Support getAssumedAddrSpace for Arguments for NVPTX (PR #133991)
Alex MacLean via llvm-commits
- [llvm] [InferAS] Support getAssumedAddrSpace for Arguments for NVPTX (PR #133991)
Alex MacLean via llvm-commits
- [llvm] [InferAS] Support getAssumedAddrSpace for Arguments for NVPTX (PR #133991)
Alex MacLean via llvm-commits
- [llvm] [InferAS] Support getAssumedAddrSpace for Arguments for NVPTX (PR #133991)
Alex MacLean via llvm-commits
- [llvm] [DAGCombiner] Attempt to fold 'add' nodes to funnel-shift or rotate (PR #125612)
Alex MacLean via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
Alex Voicu via llvm-commits
- [llvm] [X86] Prefer `lock or` over mfence (PR #106555)
Alexander Kornienko via llvm-commits
- [llvm] [NFC][SPIRV] Misc code cleanup in SPIRV Target (PR #133764)
Alexey Bader via llvm-commits
- [llvm] [NFC][SPIRV] Misc code cleanup in SPIRV Target (PR #133764)
Alexey Bader via llvm-commits
- [llvm] [SLP]Support revectorization of the previously vectorized scalars (PR #133091)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Initial support for (masked)loads + compress and (masked)interleaved (PR #132099)
Alexey Bataev via llvm-commits
- [llvm] [LV]Split store-load forward distance analysis from other checks, NFC (PR #121156)
Alexey Bataev via llvm-commits
- [llvm] [LV] Use original trip-count as the vector-trip-count if use predicated EVL instructions for tail-folding. (PR #132675)
Alexey Bataev via llvm-commits
- [llvm] [LV] Use original trip-count as the vector-trip-count if use predicated EVL instructions for tail-folding. (PR #132675)
Alexey Bataev via llvm-commits
- [llvm] bfd8cc0 - [SLP]Fix a check for the whole register use
Alexey Bataev via llvm-commits
- [llvm] [SLP]Fix same/alternate analysis in split node analysis for compares (PR #133769)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Support revectorization of the previously vectorized scalars (PR #133091)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Support revectorization of the previously vectorized scalars (PR #133091)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Support revectorization of the previously vectorized scalars (PR #133091)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Fix same/alternate analysis in split node analysis for compares (PR #133769)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Fix same/alternate analysis in split node analysis for compares (PR #133769)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Support revectorization of the previously vectorized scalars (PR #133091)
Alexey Bataev via llvm-commits
- [llvm] [SLP]Support revectorization of the previously vectorized scalars (PR #133091)
Alexey Bataev via llvm-commits
- [llvm] [LV] Support strided load with a stride of -1 (PR #128718)
Alexey Bataev via llvm-commits
- [llvm] [LV] Support strided load with a stride of -1 (PR #128718)
Alexey Bataev via llvm-commits
- [llvm] [LV] Support strided load with a stride of -1 (PR #128718)
Alexey Bataev via llvm-commits
- [llvm] [SLP][REVEC] getNumElements should not be used as VF when REVEC is enabled. (PR #134031)
Alexey Bataev via llvm-commits
- [llvm] 48a4b14 - [SLP]Fix whole vector registers calculations for compares
Alexey Bataev via llvm-commits
- [llvm] [bolt][aarch64] Adding test with unsupported indirect branches (PR #127655)
Alexey Moksyakov via llvm-commits
- [llvm] Add getter/setter for jump table entry size fields (PR #134050)
Alexey Moksyakov via llvm-commits
- [llvm] Add getter/setter for jump table entry size fields (PR #134050)
Alexey Moksyakov via llvm-commits
- [llvm] Add getter/setter for jump table entry size fields (PR #134050)
Alexey Moksyakov via llvm-commits
- [libc] [llvm] [libc] Stop depending on .cpp files libcxx_shared_headers library. (PR #133999)
Alexey Samsonov via llvm-commits
- [libc] [llvm] [libc] Stop depending on .cpp files libcxx_shared_headers library. (PR #133999)
Alexey Samsonov via llvm-commits
- [llvm] [GlobalISel] An optimizing MIR builder (PR #132282)
Amara Emerson via llvm-commits
- [llvm] GlobalISel: neg (and x, 1) --> SIGN_EXTEND_INREG x, 1 (PR #131367)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] An optimizing MIR builder (PR #132282)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] An optimizing MIR builder (PR #132282)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] An optimizing MIR builder (PR #132282)
Amara Emerson via llvm-commits
- [llvm] [GlobalISel] An optimizing MIR builder (PR #132282)
Amara Emerson via llvm-commits
- [llvm] [BOLT][X86] Fix getTargetSymbol() (PR #133834)
Amir Ayupov via llvm-commits
- [llvm] [WebAssembly] Add a missing `break` statement (PR #133783)
Amy Huang via llvm-commits
- [llvm] Fix to the libc BUILD.bazel file after changing atan_utils.h deps. (PR #134128)
Amy Huang via llvm-commits
- [clang] [llvm] [PowerPC] Enable indiviual crbits tracking at -O2 (PR #133617)
Amy Kwan via llvm-commits
- [clang] [llvm] [PowerPC] Enable indiviual crbits tracking at -O2 (PR #133617)
Amy Kwan via llvm-commits
- [llvm] [AMDGPU] (xor (cmp_eq x, 1), -1) -> cmp_neq x, 1 (PR #133698)
Ana Mihajlovic via llvm-commits
- [llvm] [AMDGPU] (xor (cmp_eq x, 1), -1) -> cmp_neq x, 1 (PR #133698)
Ana Mihajlovic via llvm-commits
- [llvm] [AMDGPU] (xor (cmp_eq x, 1), -1) -> cmp_neq x, 1 (PR #133698)
Ana Mihajlovic via llvm-commits
- [llvm] Select (xor i1 (divergent trunc:i32 x), -1) -> cmp_neq x, 1 (PR #133698)
Ana Mihajlovic via llvm-commits
- [llvm] [BOLT] Gadget scanner: detect non-protected indirect calls (PR #131899)
Anatoly Trosinenko via llvm-commits
- [llvm] [BOLT] Gadget scanner: detect non-protected indirect calls (PR #131899)
Anatoly Trosinenko via llvm-commits
- [llvm] [BOLT] Gadget scanner: detect non-protected indirect calls (PR #131899)
Anatoly Trosinenko via llvm-commits
- [llvm] [mlir] scan lowering changes (PR #133149)
Anchu Rajendran S via llvm-commits
- [flang] [llvm] [flang][intrinsics] Implement the time intrinsic (PR #133823)
Andre Kuhlenschmidt via llvm-commits
- [flang] [llvm] [flang][intrinsic] add nonstandard intrinsic unlink (PR #134162)
Andre Kuhlenschmidt via llvm-commits
- [flang] [llvm] [flang][intrinsic] add nonstandard intrinsic unlink (PR #134162)
Andre Kuhlenschmidt via llvm-commits
- [flang] [llvm] [flang][intrinsic] add nonstandard intrinsic unlink (PR #134162)
Andre Kuhlenschmidt via llvm-commits
- [llvm] Xtensa] Implement windowed call ABI. (PR #130001)
Andrei Safronov via llvm-commits
- [llvm] [Xtensa] Implement SEXT, NSA, MINMAX and Loop Xtensa Options. (PR #133818)
Andrei Safronov via llvm-commits
- [llvm] [docs][GitHub] Document alternative approach to stacked PRs (PR #132424)
Andrzej Warzyński via llvm-commits
- [llvm] [docs][GitHub] Document alternative approach to stacked PRs (PR #132424)
Andrzej Warzyński via llvm-commits
- [llvm] Document some of the regular admin tasks (PR #133825)
Anton Korobeynikov via llvm-commits
- [llvm] [RFC][BPF] Support Jump Table (PR #133856)
Anton Protopopov via llvm-commits
- [llvm] [RFC][BPF] Support Jump Table (PR #133856)
Anton Protopopov via llvm-commits
- [llvm] [RFC][BPF] Support Jump Table (PR #133856)
Anton Protopopov via llvm-commits
- [llvm] [RFC][BPF] Support Jump Table (PR #133856)
Anton Protopopov via llvm-commits
- [llvm] [RFC][BPF] Support Jump Table (PR #133856)
Anton Protopopov via llvm-commits
- [llvm] [GVN] MemorySSA for GVN: embed the memory state in symbolic expressions (PR #123218)
Antonio Frighetto via llvm-commits
- [llvm] [NVPTX] cleanup & canonicalize `mov` (PR #129344)
Artem Belevich via llvm-commits
- [llvm] [SDAG][NVPTX] Add TLI check for preferring custom FP_TO_SINT operations to FP_TO_UINT (PR #132470)
Artem Belevich via llvm-commits
- [llvm] [SDAG][NVPTX] Add TLI check for preferring custom FP_TO_SINT operations to FP_TO_UINT (PR #132470)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] cleanup & canonicalize `mov` (PR #129344)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Cleanup and refactor atomic lowering (PR #133781)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Cleanup and refactor atomic lowering (PR #133781)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Cleanup and refactor atomic lowering (PR #133781)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Cleanup and refactor atomic lowering (PR #133781)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Cleanup and refactor atomic lowering (PR #133781)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Cleanup and refactor atomic lowering (PR #133781)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] cleanup & canonicalize `mov` (PR #129344)
Artem Belevich via llvm-commits
- [llvm] [NVPTX] Cleanup and refactor atomic lowering (PR #133781)
Artem Belevich via llvm-commits
- [llvm] [InferAS] Support getAssumedAddrSpace for Arguments for NVPTX (PR #133991)
Artem Belevich via llvm-commits
- [llvm] [InferAS] Support getAssumedAddrSpace for Arguments for NVPTX (PR #133991)
Artem Belevich via llvm-commits
- [llvm] [InferAS] Support getAssumedAddrSpace for Arguments for NVPTX (PR #133991)
Artem Belevich via llvm-commits
- [llvm] [InferAS] Support getAssumedAddrSpace for Arguments for NVPTX (PR #133991)
Artem Belevich via llvm-commits
- [llvm] [SCEV] Remove EqCacheSCEV (PR #133186)
Arthur Eubanks via llvm-commits
- [llvm] llvm-reduce: Try to preserve instruction metadata as argument attributes (PR #133557)
Arthur Eubanks via llvm-commits
- [llvm] [SCEV] Remove EqCacheSCEV (PR #133186)
Arthur Eubanks via llvm-commits
- [llvm] llvm-reduce: Change exit code for uninteresting inputs (PR #134021)
Arthur Eubanks via llvm-commits
- [llvm] [NFC][HLSL] Rename ResourceBinding Types (PR #134165)
Ashley Coleman via llvm-commits
- [llvm] [NFC][HLSL] Rename ResourceBinding Types (PR #134165)
Ashley Coleman via llvm-commits
- [llvm] [NFC][HLSL] Rename ResourceBinding Types (PR #134165)
Ashley Coleman via llvm-commits
- [llvm] [SLP] Use named structs in vectorizeStores() (NFC) (PR #132781)
Benjamin Maxwell via llvm-commits
- [llvm] [SLP] Use named structs in vectorizeStores() (NFC) (PR #132781)
Benjamin Maxwell via llvm-commits
- [llvm] (WIP) [AArch64] Make use of byte FPR stores for bytes extracted from vectors (PR #134117)
Benjamin Maxwell via llvm-commits
- [llvm] (WIP) [AArch64] Make use of byte FPR stores for bytes extracted from vectors (PR #134117)
Benjamin Maxwell via llvm-commits
- [clang] [llvm] Remove Native Client support (PR #133661)
Brad Smith via llvm-commits
- [llvm] [AMDGPU][True16][CodeGen] srl pattern for true16 mode (PR #132987)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][CodeGen] srl pattern for true16 mode (PR #132987)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][CodeGen] srl pattern for true16 mode (PR #132987)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][CodeGen] srl pattern for true16 mode (PR #132987)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][CodeGen] Skip combineDpp with t16 instructions (PR #128918)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][CodeGen] fold clamp update for true16 (PR #128919)
Brox Chen via llvm-commits
- [llvm] AMDGPU][True16][CodeGen] FP_Round f64 to f16 in true16 (PR #128911)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][CodeGen] fold clamp update for true16 (PR #128919)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][CodeGen] fold clamp update for true16 (PR #128919)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][CodeGen] fold clamp update for true16 (PR #128919)
Brox Chen via llvm-commits
- [llvm] [AMDGPU][True16][CodeGen] fold clamp update for true16 (PR #128919)
Brox Chen via llvm-commits
- [llvm] [Offload] Implement the remaining initial Offload API (PR #122106)
Callum Fare via llvm-commits
- [llvm] [AMDGPU] Add option to bias SGPR allocation to reduce read hazards (PR #129869)
Carl Ritson via llvm-commits
- [llvm] [AMDGPU] Add option to bias SGPR allocation to reduce read hazards (PR #129869)
Carl Ritson via llvm-commits
- [llvm] [AMDGPU] Avoid crashes for non-byte-sized types in PromoteAlloca (PR #134042)
Carl Ritson via llvm-commits
- [lld] [lld-macho] Fix code section ordering in output binary (PR #134010)
Carlo Cabrera via llvm-commits
- [llvm] AMDGPU: Add round-to-odd rounding during f64 to bf16 conversion (PR #133995)
Changpeng Fang via llvm-commits
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Changpeng Fang via llvm-commits
- [llvm] AMDGPU: Add round-to-odd rounding during f64 to bf16 conversion (PR #133995)
Changpeng Fang via llvm-commits
- [llvm] Add RISC-V support information to readme (PR #132699)
Craig Topper via llvm-commits
- [llvm] [RISCV] For RV32C, disassembly of c.slli should fail when immediate > 31 (PR #133713)
Craig Topper via llvm-commits
- [llvm] [RISCV] For RV32C, disassembly of c.slli should fail when immediate > 31 (PR #133713)
Craig Topper via llvm-commits
- [llvm] Introducing a new ISD::POISON SDNode to represent the poison value in the IR. (PR #125883)
Craig Topper via llvm-commits
- [llvm] [TableGen] Use size returned by encodeULEB128 to simplify some code. NFC (PR #133750)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use decodeUImmLog2XLenNonZeroOperand in decodeRVCInstrRdRs1UImm. NFC (PR #133759)
Craig Topper via llvm-commits
- [llvm] [RISCV] For RV32C, disassembly of c.slli should fail when immediate > 31 (PR #133713)
Craig Topper via llvm-commits
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Craig Topper via llvm-commits
- [llvm] [RISCV] Use decodeCLUIImmOperand when disassembling C_LUI_HINT. (PR #133789)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use decodeCLUIImmOperand when disassembling C_LUI_HINT. (PR #133789)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use decodeCLUIImmOperand when disassembling C_LUI_HINT. (PR #133789)
Craig Topper via llvm-commits
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Craig Topper via llvm-commits
- [llvm] [RISCV] Use decodeUImmLog2XLenNonZeroOperand in decodeRVCInstrRdRs1UImm. NFC (PR #133759)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use decodeUImmLog2XLenNonZeroOperand in decodeRVCInstrRdRs1UImm. NFC (PR #133759)
Craig Topper via llvm-commits
- [llvm] [RISCV] Prevent disassembling RVC hint instructions with x16-x31 for RVE. (PR #133805)
Craig Topper via llvm-commits
- [llvm] [RISCV] Prevent disassembling RVC hint instructions with x16-x31 for RVE. (PR #133805)
Craig Topper via llvm-commits
- [llvm] [TableGen] Use size returned by encodeULEB128 to simplify some code. NFC (PR #133750)
Craig Topper via llvm-commits
- [llvm] [RISCV] Correct disassembly of cm.push/pop for RVE. (PR #133816)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add exhaustive diassember tests for c.slli64. NFC (PR #133820)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add exhaustive diassember tests for c.slli64. NFC (PR #133820)
Craig Topper via llvm-commits
- [llvm] [RISCV] Correct disassembly of cm.push/pop for RVE. (PR #133816)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use decodeUImmLog2XLenNonZeroOperand in decodeRVCInstrRdRs1UImm. NFC (PR #133759)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use decodeUImmLog2XLenNonZeroOperand in decodeRVCInstrRdRs1UImm. NFC (PR #133759)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use decodeUImmLog2XLenNonZeroOperand in decodeRVCInstrRdRs1UImm. NFC (PR #133759)
Craig Topper via llvm-commits
- [llvm] [RISCV] Use decodeUImmLog2XLenNonZeroOperand in decodeRVCInstrRdRs1UImm. NFC (PR #133759)
Craig Topper via llvm-commits
- [llvm] [RISCV] Add exhaustive diassember tests for c.slli64. NFC (PR #133820)
Craig Topper via llvm-commits
- [llvm] [RISCV] Prevent disassembling RVC hint instructions with x16-x31 for RVE. (PR #133805)
Craig Topper via llvm-commits
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Craig Topper via llvm-commits
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Craig Topper via llvm-commits
- [llvm] [RISCV] Use decodeCLUIImmOperand when disassembling C_LUI_HINT. (PR #133789)
Craig Topper via llvm-commits
- [llvm] eb2aba4 - [RISCV] Remove extra call to MatchRegisterName in parseRegListCommon. NFC
Craig Topper via llvm-commits
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Craig Topper via llvm-commits
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Craig Topper via llvm-commits
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Craig Topper via llvm-commits
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Craig Topper via llvm-commits
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Craig Topper via llvm-commits
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Craig Topper via llvm-commits
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Craig Topper via llvm-commits
- [llvm] [CodeGenPrepare][RISCV] Combine (X ^ Y) and (X == Y) where appropriate (PR #130922)
Craig Topper via llvm-commits
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Craig Topper via llvm-commits
- [llvm] [TableGen] Directly use SDNode functions to implement HasOneUse and HasNoUse. NFC (PR #133976)
Craig Topper via llvm-commits
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Craig Topper via llvm-commits
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Craig Topper via llvm-commits
- [llvm] 1edb6b0 - [RISCV] Fix crash in parseZcmpStackAdj if token is not an integer.
Craig Topper via llvm-commits
- [llvm] 40a0e34 - [RISCV] Use location of negative sign if present for error in parseZcmpStackAdj
Craig Topper via llvm-commits
- [llvm] [DSE] Add predicated vector length store support for masked store elimination (PR #134175)
Craig Topper via llvm-commits
- [llvm] [DSE] Add predicated vector length store support for masked store elimination (PR #134175)
Craig Topper via llvm-commits
- [llvm] ffed176 - [RISCV] Correct the error location for the X26 check in parseRegListCommon.
Craig Topper via llvm-commits
- [llvm] [RISCV] Check S0 register list check for qc.cm.pushfp to after we parsed the whole register list. (PR #134180)
Craig Topper via llvm-commits
- [llvm] [RISCV] Don't allow '-' after 'ra' in Zcmp/Xqccmp register list. (PR #134182)
Craig Topper via llvm-commits
- [lld] [LLD][ELF] Allow merging XO and RX sections, and add `--[no-]xosegment` flag (PR #132412)
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- [llvm] [AArch64] Bugfix when using execute-only and memtag sanitizer together (PR #133084)
Csanád Hajdú via llvm-commits
- [clang] [flang] [llvm] [flang-rt] Pass the whole path of libflang_rt.runtime.a to linker on AIX (PR #131041)
Daniel Chen via llvm-commits
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Daniel Chen via llvm-commits
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Daniel Chen via llvm-commits
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Daniel Chen via llvm-commits
- [clang] [flang] [llvm] [flang-rt] Pass the whole path of libflang_rt.runtime.a to linker on AIX (PR #131041)
Daniel Chen via llvm-commits
- [lld] [LLD][ELF] Allow memory region in OVERLAY (PR #133540)
Daniel Thornburgh via llvm-commits
- [lld] [LLD][ELF] Allow memory region in OVERLAY (PR #133540)
Daniel Thornburgh via llvm-commits
- [lld] [LLD][ELF] Allow memory region in OVERLAY (PR #133540)
Daniel Thornburgh via llvm-commits
- [lld] [LLD][ELF] Allow memory region in OVERLAY (PR #133540)
Daniel Thornburgh via llvm-commits
- [lld] [LLD][ELF] Allow memory region in OVERLAY (PR #133540)
Daniel Thornburgh via llvm-commits
- [lld] [LLD][ELF] Allow memory region in OVERLAY (PR #133540)
Daniel Thornburgh via llvm-commits
- [lld] [LLD][ELF] Support OVERLAY NOCROSSREFS (PR #133807)
Daniel Thornburgh via llvm-commits
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- [llvm] llvm-reduce: Remove unsupported from bitcode uselistorder test (PR #134185)
Danila Malyutin via llvm-commits
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Danila Malyutin via llvm-commits
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- [clang] [llvm] [clang][DebugInfo] Add symbol for debugger with VTable information. (PR #130255)
David Blaikie via llvm-commits
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David Blaikie via llvm-commits
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David Blaikie via llvm-commits
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David Blaikie via llvm-commits
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David CARLIER via llvm-commits
- [llvm] [lit] Fix lit hang on pool join when exception is thrown (PR #131881)
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David Green via llvm-commits
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David Green via llvm-commits
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David Green via llvm-commits
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David Green via llvm-commits
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David Green via llvm-commits
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David Green via llvm-commits
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David Green via llvm-commits
- [llvm] [Analysis]: Allow inlining recursive call IF recursion depth is 1. (PR #119677)
David Green via llvm-commits
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David Green via llvm-commits
- [llvm] 2e54b4f - [ARM] Silence signed comparison warning. NFC
David Green via llvm-commits
- [llvm] b9b9add - [AArch64] Add bitcast + extend tests. NFC
David Green via llvm-commits
- [llvm] [SelectionDAG] Use SimplifyDemandedBits from SimplifyDemandedVectorElts Bitcast. (PR #133717)
David Green via llvm-commits
- [llvm] 9cdab16 - [AArch64] Remove CODE llc run lines from costmodel tests. NFC
David Green via llvm-commits
- [llvm] 668edb4 - [AArch64] Update more costmodel tests with -cost-kind=all. NFC
David Green via llvm-commits
- [llvm] 2653eb5 - [AArch64] Add -cost-kind=all coverage for sve cost tests. NFC
David Green via llvm-commits
- [llvm] [SelectionDAG] Use SimplifyDemandedBits from SimplifyDemandedVectorElts Bitcast. (PR #133717)
David Green via llvm-commits
- [llvm] d8bf039 - [AArch64] Use tablegen HasOneUse. NFC
David Green via llvm-commits
- [llvm] 7d91c4f - [ARM] Use tablegen HasOneUse. NFC
David Green via llvm-commits
- [llvm] c51b24c - [AArch64] Use getVectorInstrCost in div cost
David Green via llvm-commits
- [llvm] [AArch64][LV] Reduce cost of scaled reduction extends (PR #134074)
David Green via llvm-commits
- [llvm] [LV][NFC] Regenerate some SVE tests using --filter-out-after option (PR #132174)
David Sherwood via llvm-commits
- [llvm] [LV][NFC] Regenerate some SVE tests using --filter-out-after option (PR #132174)
David Sherwood via llvm-commits
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David Sherwood via llvm-commits
- [llvm] [AArch64] Add flag to control unrolling for small multi-exit loops (PR #131998)
David Sherwood via llvm-commits
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David Sherwood via llvm-commits
- [llvm] [AArch64] Add flag to control unrolling for small multi-exit loops (PR #131998)
David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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David Sherwood via llvm-commits
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Deric C. via llvm-commits
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Deric C. via llvm-commits
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Diana Picus via llvm-commits
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Diana Picus via llvm-commits
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Diana Picus via llvm-commits
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Diana Picus via llvm-commits
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Diana Picus via llvm-commits
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Diana Picus via llvm-commits
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Diana Picus via llvm-commits
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Diana Picus via llvm-commits
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Diana Picus via llvm-commits
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Diana Picus via llvm-commits
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Diana Picus via llvm-commits
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Diana Picus via llvm-commits
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Diana Picus via llvm-commits
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Djordje Todorovic via llvm-commits
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Eli Friedman via llvm-commits
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Eli Friedman via llvm-commits
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Eli Friedman via llvm-commits
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Luke Lau via llvm-commits
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- [clang] [llvm] Vectorize: Support fminimumnum and fmaximumnum (PR #131781)
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- [clang] [llvm] Vectorize: Support fminimumnum and fmaximumnum (PR #131781)
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- [clang] [llvm] Vectorize: Support fminimumnum and fmaximumnum (PR #131781)
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- [clang] [llvm] Vectorize: Support fminimumnum and fmaximumnum (PR #131781)
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- [llvm] llvm-reduce: Use 80 dashes for section separator in status printing (PR #133686)
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
- [llvm] Introducing a new ISD::POISON SDNode to represent the poison value in the IR. (PR #125883)
Matt Arsenault via llvm-commits
- [llvm] Introducing a new ISD::POISON SDNode to represent the poison value in the IR. (PR #125883)
Matt Arsenault via llvm-commits
- [llvm] Introducing a new ISD::POISON SDNode to represent the poison value in the IR. (PR #125883)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add subtarget feature for v_lshl_add_u64. NFC. (PR #133723)
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
- [llvm] LLVM/Test: Add vectorizing testcases for fminimumnum and fminimumnum (PR #133690)
Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Increase operands-to-args test coverage (PR #133853)
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Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Increase operands-to-args test coverage (PR #133853)
Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Fix invalid reduction on tokens in operands-to-args (PR #133855)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Do not delete convergencectrl in operand-bundles (PR #133858)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Do not delete convergencectrl in operand-bundles (PR #133858)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Do not delete convergencectrl in operand-bundles (PR #133858)
Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Reduce externally_initialized (PR #133859)
Matt Arsenault via llvm-commits
- [llvm] [Analysis] Avoid repeated hash lookups (NFC) (PR #133045)
Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
- [llvm] LLVM/Test: Add vectorizing testcases for fminimumnum and fminimumnum (PR #133843)
Matt Arsenault via llvm-commits
- [llvm] LLVM/Test: Add vectorizing testcases for fminimumnum and fminimumnum (PR #133843)
Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Add option to bias SGPR allocation to reduce read hazards (PR #129869)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Add round-to-odd rounding during f64 to bf16 conversion (PR #133995)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Add round-to-odd rounding during f64 to bf16 conversion (PR #133995)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Add round-to-odd rounding during f64 to bf16 conversion (PR #133995)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Add round-to-odd rounding during f64 to bf16 conversion (PR #133995)
Matt Arsenault via llvm-commits
- [llvm] [llvm][CodeGen] avoid repeated interval calculation in window scheduler (PR #132352)
Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
- [llvm] [llvm][CodeGen] avoid repeated interval calculation in window scheduler (PR #132352)
Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
- [llvm] Re apply 130577 narrow math for and operand (PR #133896)
Matt Arsenault via llvm-commits
- [llvm] Re apply 130577 narrow math for and operand (PR #133896)
Matt Arsenault via llvm-commits
- [llvm] Re apply 130577 narrow math for and operand (PR #133896)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Skip setting br conditions on already constant branches (PR #133841)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Fix introducing unreachable code in simplify conditionals (PR #133842)
Matt Arsenault via llvm-commits
- [llvm] 23d894e - llvm-reduce: Fix comment typo
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Directly use SDNode functions to implement HasOneUse and HasNoUse. NFC (PR #133976)
Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Matt Arsenault via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Matt Arsenault via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Matt Arsenault via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Matt Arsenault via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Matt Arsenault via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Matt Arsenault via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Matt Arsenault via llvm-commits
- [llvm] Introducing a new ISD::POISON SDNode to represent the poison value in the IR. (PR #125883)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Add values to return reduction (PR #132686)
Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
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Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Do not reduce alloca array sizes to 0 (PR #132864)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Do not reduce alloca array sizes to 0 (PR #132864)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #134033)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Do not reduce alloca array sizes to 0 (PR #132864)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Defer a shouldKeep call in operand reduction (PR #133387)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Defer a shouldKeep call in operand reduction (PR #133387)
Matt Arsenault via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Defer a shouldKeep call in operand reduction (PR #133387)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Add values to return reduction (PR #132686)
Matt Arsenault via llvm-commits
- [clang] [llvm] [Clang][AMDGPU] Add __builtin_amdgcn_cvt_off_f32_i4 (PR #133741)
Matt Arsenault via llvm-commits
- [clang] [llvm] [Clang][AMDGPU] Add __builtin_amdgcn_cvt_off_f32_i4 (PR #133741)
Matt Arsenault via llvm-commits
- [clang] [llvm] [Clang][AMDGPU] Add __builtin_amdgcn_cvt_off_f32_i4 (PR #133741)
Matt Arsenault via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Defer a shouldKeep call in operand reduction (PR #133387)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Defer a shouldKeep call in operand reduction (PR #133387)
Matt Arsenault via llvm-commits
- [llvm] [TTI] Make isLegalMasked{Load, Store} take an address space (PR #134006)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Emit `llvm::is_contained` when CheckOpcode accepts a large list (PR #134057)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Emit `llvm::is_contained` when CheckOpcode accepts a large list (PR #134057)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Emit `llvm::is_contained` when CheckOpcode accepts a large list (PR #134057)
Matt Arsenault via llvm-commits
- [llvm] AMDGPU: Add round-to-odd rounding during f64 to bf16 conversion (PR #133995)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Increase operands-to-args test coverage (PR #133853)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Increase operands-to-args test coverage (PR #133853)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Fix overly conservative operands-to-args user restriction (PR #133854)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Fix overly conservative operands-to-args user restriction (PR #133854)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Emit `llvm::is_contained` for `CheckOpcode` predicate (PR #134057)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU][NPM] Port AMDGPUSetWavePriority to NPM (PR #130064)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Avoid worklist in simplify-instruction (PR #134066)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Avoid worklist in simplify-instruction (PR #134066)
Matt Arsenault via llvm-commits
- [llvm] llvm-reduce: Avoid worklist in simplify-instruction (PR #134066)
Matt Arsenault via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Matt Arsenault via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Matt Arsenault via llvm-commits
- [llvm] [DAGCombiner] Attempt to fold 'add' nodes to funnel-shift or rotate (PR #125612)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Avoid crashes for non-byte-sized types in PromoteAlloca (PR #134042)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Avoid crashes for non-byte-sized types in PromoteAlloca (PR #134042)
Matt Arsenault via llvm-commits
- [llvm] [AMDGPU] Avoid crashes for non-byte-sized types in PromoteAlloca (PR #134042)
Matt Arsenault via llvm-commits
- [clang] [llvm] [EquivalenceClasses] Use SmallVector for deterministic iteration order. (PR #134075)
Matt Arsenault via llvm-commits
- [llvm] [TableGen] Emit `llvm::is_contained` for `CheckOpcode` predicate (PR #134057)
Matt Arsenault via llvm-commits
- [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)
Matt Arsenault via llvm-commits
- [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)
Matt Arsenault via llvm-commits
- [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)
Matt Arsenault via llvm-commits
- [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)
Matt Arsenault via llvm-commits
- [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)
Matt Arsenault via llvm-commits
- [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)
Matt Arsenault via llvm-commits
- [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)
Matt Arsenault via llvm-commits
- [llvm] [TargetVerifier][AMDGPU] Add TargetVerifier. (PR #123609)
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- [llvm] Revert CMake changes from #133265 (PR #134104)
Nikolas Klauser via llvm-commits
- [llvm] Revert CMake changes from #133265 (PR #134104)
Nikolas Klauser via llvm-commits
- [clang] [llvm] Revert "Enable unnecessary-virtual-specifier by default" (PR #134105)
Nikolas Klauser via llvm-commits
- [clang] [llvm] Revert "Enable unnecessary-virtual-specifier by default" (PR #134105)
Nikolas Klauser via llvm-commits
- [clang] [llvm] Revert "Enable unnecessary-virtual-specifier by default" (PR #134105)
Nikolas Klauser via llvm-commits
- [clang] [llvm] Revert "Enable unnecessary-virtual-specifier by default" (PR #134105)
Nikolas Klauser via llvm-commits
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Nikolay Panchenko via llvm-commits
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Ningning Shi 史宁宁 via llvm-commits
- [llvm] [mlir][bazel] add alwayslink=True to mlir-runner utils (PR #133787)
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- [llvm] [mlir] [MLIR][IRDL] Added IRDL to C++ Translation (PR #133982)
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- [llvm] [mlir] [MLIR][IRDL] Added IRDL to C++ Translation (PR #133982)
Oleksandr Alex Zinenko via llvm-commits
- [llvm] [mlir] [MLIR][IRDL] Added IRDL to C++ Translation (PR #133982)
Oleksandr Alex Zinenko via llvm-commits
- [llvm] [mlir] [MLIR][IRDL] Added IRDL to C++ Translation (PR #133982)
Oleksandr Alex Zinenko via llvm-commits
- [llvm] [mlir] [MLIR][IRDL] Added IRDL to C++ Translation (PR #133982)
Oleksandr Alex Zinenko via llvm-commits
- [llvm] [DebugInfo][RemoveDIs] Eliminate another debug-info variation flag (PR #133917)
Orlando Cazalet-Hyams via llvm-commits
- [llvm] [DebugInfo][RemoveDIs] Eliminate another debug-info variation flag (PR #133917)
Orlando Cazalet-Hyams via llvm-commits
- [llvm] [DebugInfo][RemoveDIs] Eliminate another debug-info variation flag (PR #133917)
Orlando Cazalet-Hyams via llvm-commits
- [llvm] [DebugInfo][RemoveDIs] Eliminate another debug-info variation flag (PR #133917)
Orlando Cazalet-Hyams via llvm-commits
- [llvm] [WIP][AMDGPU] Enable "amdgpu-uniform-intrinsic-combine" pass in pipeline. (PR #128687)
Pankaj Dwivedi via llvm-commits
- [llvm] [RISCV] For RV32C, disassembly of c.slli should fail when immediate > 31 (PR #133713)
Paul Bowen-Huggett via llvm-commits
- [llvm] [RISCV] For RV32C, disassembly of c.slli should fail when immediate > 31 (PR #133713)
Paul Bowen-Huggett via llvm-commits
- [llvm] [RISCV] For RV32C, disassembly of c.slli should fail when immediate > 31 (PR #133713)
Paul Bowen-Huggett via llvm-commits
- [llvm] [RISCV] For RV32C, disassembly of c.slli should fail when immediate > 31 (PR #133713)
Paul Bowen-Huggett via llvm-commits
- [llvm] [RISCV] Just reporting an error shouldn't generate a crash diagnostic (PR #134040)
Paul Bowen-Huggett via llvm-commits
- [llvm] [RISCV] Just reporting an error shouldn't generate a crash diagnostic (PR #134040)
Paul Bowen-Huggett via llvm-commits
- [llvm] [RISCV] Just reporting an error shouldn't generate a crash diagnostic (PR #134040)
Paul Bowen-Huggett via llvm-commits
- [llvm] [RISCV] Just reporting an error shouldn't generate a crash diagnostic (PR #134040)
Paul Bowen-Huggett via llvm-commits
- [llvm] [AArch64] Bugfix when using execute-only and memtag sanitizer together (PR #133084)
Paul Walker via llvm-commits
- [llvm] [AArch64][SVE] Lower unpredicated loads/stores as fixed LDR/STR with -msve-vector-bits=128. (PR #127500)
Paul Walker via llvm-commits
- [llvm] [AArch64] Bugfix when using execute-only and memtag sanitizer together (PR #133084)
Paul Walker via llvm-commits
- [llvm] [AArch64] Bugfix when using execute-only and memtag sanitizer together (PR #133084)
Paul Walker via llvm-commits
- [llvm] [Clang][AArch64] Model ZT0 table using inaccessible memory (PR #133727)
Paul Walker via llvm-commits
- [llvm] [Clang][AArch64] Model ZT0 table using inaccessible memory (PR #133727)
Paul Walker via llvm-commits
- [llvm] [LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (PR #133929)
Paul Walker via llvm-commits
- [llvm] [LLVM][AArch64][SVE] Mark DUP immediate instructions with isAsCheapAsAMove. (PR #133945)
Paul Walker via llvm-commits
- [llvm] [AArch64] Make use of byte FPR stores for bytes extracted from vectors (PR #131793)
Paul Walker via llvm-commits
- [llvm] [AArch64] Add flag to control unrolling for small multi-exit loops (PR #131998)
Paul Walker via llvm-commits
- [lldb] [llvm] [lldb] Remove lldb-server min and max gdbserver port options (PR #133275)
Pavel Labath via llvm-commits
- [clang] [llvm] Vectorize: Support fminimumnum and fmaximumnum (PR #131781)
Pengcheng Wang via llvm-commits
- [clang] [llvm] Vectorize: Support fminimumnum and fmaximumnum (PR #131781)
Pengcheng Wang via llvm-commits
- [clang] [llvm] Vectorize: Support fminimumnum and fmaximumnum (PR #131781)
Pengcheng Wang via llvm-commits
- [llvm] LLVM/Test: Add vectorizing testcases for fminimumnum and fminimumnum (PR #133690)
Pengcheng Wang via llvm-commits
- [llvm] LLVM/Test: Add vectorizing testcases for fminimumnum and fminimumnum (PR #133843)
Pengcheng Wang via llvm-commits
- [llvm] LLVM/Test: Add vectorizing testcases for fminimumnum and fminimumnum (PR #133843)
Pengcheng Wang via llvm-commits
- [llvm] [TableGen] Emit `llvm::is_contained` when CheckOpcode accepts a large list (PR #134057)
Pengcheng Wang via llvm-commits
- [llvm] [TableGen] Emit `llvm::is_contained` when CheckOpcode accepts a large list (PR #134057)
Pengcheng Wang via llvm-commits
- [llvm] [TableGen] Emit `llvm::is_contained` when CheckOpcode accepts a large list (PR #134057)
Pengcheng Wang via llvm-commits
- [llvm] [TableGen] Emit `llvm::is_contained` for `CheckOpcode` predicate (PR #134057)
Pengcheng Wang via llvm-commits
- [llvm] [TableGen] Emit `llvm::is_contained` for `CheckOpcode` predicate (PR #134057)
Pengcheng Wang via llvm-commits
- [llvm] [TableGen] Emit `llvm::is_contained` for `CheckOpcode` predicate (PR #134057)
Pengcheng Wang via llvm-commits
- [llvm] [TableGen] Emit `llvm::is_contained` for `CheckOpcode` predicate (PR #134057)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Mark subvector extracts from index 0 as cheap (PR #134101)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Mark subvector extracts from index 0 as cheap (PR #134101)
Pengcheng Wang via llvm-commits
- [llvm] [RISCV] Mark subvector extracts from index 0 as cheap (PR #134101)
Pengcheng Wang via llvm-commits
- [llvm] AsmPrinter: Remove ELF's special lowerRelativeReference for unnamed_addr function (PR #132684)
Peter Collingbourne via llvm-commits
- [flang] [llvm] [flang] Remove runtime dependence on C++ support for types (PR #134164)
Peter Klausler via llvm-commits
- [llvm] [flang][runtime] Remove bad runtime assertion (PR #134176)
Peter Klausler via llvm-commits
- [lld] [LLD][AArch64] Increase alignment of AArch64AbsLongThunk to 8 (PR #133738)
Peter Smith via llvm-commits
- [lld] [LLD][ELF] Allow merging XO and RX sections, and add `--[no-]xosegment` flag (PR #132412)
Peter Smith via llvm-commits
- [lld] [lld] Merge GOT entries for symbols (PR #131630)
Peter Smith via llvm-commits
- [lld] [LLD][AArch64] Increase alignment of AArch64AbsLongThunk to 8 (PR #133738)
Peter Smith via llvm-commits
- [lld] [LLD][AArch64] Increase alignment of AArch64AbsLongThunk to 8 (PR #133738)
Peter Smith via llvm-commits
- [lld] lld: Target-specific section-folding logic for ICF (PR #133990)
Peter Smith via llvm-commits
- [flang] [llvm] [CMake] Fix using precompiled headers with ccache (PR #131397)
Petr Hosek via llvm-commits
- [flang] [llvm] [CMake] Fix using precompiled headers with ccache (PR #131397)
Petr Hosek via llvm-commits
- [compiler-rt] [compiler-rt] Propagate sysroot from CMake to msan tests (PR #132299)
Petr Hosek via llvm-commits
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Petr Hosek via llvm-commits
- [compiler-rt] [compiler-rt] Propagate sysroot from CMake to msan tests (PR #132299)
Petr Hosek via llvm-commits
- [compiler-rt] [compiler-rt] Propagate sysroot from CMake to msan tests (PR #132299)
Petr Hosek via llvm-commits
- [compiler-rt] [compiler-rt] Propagate sysroot from CMake to msan tests (PR #132299)
Petr Hosek via llvm-commits
- [llvm] AsmPrinter: Remove ELF's special lowerRelativeReference for unnamed_addr function (PR #132684)
Petr Hosek via llvm-commits
- [llvm] [RISCV] Use tablegen HasOneUse. NFC (PR #133974)
Philip Reames via llvm-commits
- [llvm] [MergeICmps] Merge adjacent comparisons to constants (PR #133817)
Philipp Rados via llvm-commits
- [llvm] [DAG] visitEXTRACT_SUBVECTOR - don't return early on failure of EXTRACT_SUBVECTOR(INSERT_SUBVECTOR()) -> BITCAST fold (PR #133695)
Phoebe Wang via llvm-commits
- [llvm] [X86] combineINSERT_SUBVECTOR - fold insert_subvector(base,extract_subvector(broadcast)) -> blend shuffle(base,broadcast) (REAPPLIED) (PR #133724)
Phoebe Wang via llvm-commits
- [llvm] [X86] combineINSERT_SUBVECTOR - fold insert_subvector(base,extract_subvector(broadcast)) -> blend shuffle(base,broadcast) (REAPPLIED) (PR #133724)
Phoebe Wang via llvm-commits
- [llvm] [X86] combineINSERT_SUBVECTOR - fold insert_subvector(base,extract_subvector(broadcast)) -> blend shuffle(base,broadcast) (REAPPLIED) (PR #133724)
Phoebe Wang via llvm-commits
- [llvm] [X86] combineINSERT_SUBVECTOR - fold insert_subvector(base,extract_subvector(broadcast)) -> blend shuffle(base,broadcast) (REAPPLIED) (PR #133724)
Phoebe Wang via llvm-commits
- [llvm] [X86] splitVector - split concat_vectors(a,b,c,d) -> concat_vectors(a,b) + concat_vectors(c,d) (PR #133753)
Phoebe Wang via llvm-commits
- [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - reduce the size of VPERMV/VPERMV3 nodes if the upper elements are not demanded (PR #133923)
Phoebe Wang via llvm-commits
- [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - reduce the size of VPERMV/VPERMV3 nodes if the upper elements are not demanded (PR #133923)
Phoebe Wang via llvm-commits
- [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - reduce the size of VPERMV/VPERMV3 nodes if the upper elements are not demanded (PR #133923)
Phoebe Wang via llvm-commits
- [llvm] [InlineSpiller] Check rematerialization before folding operand (PR #134015)
Phoebe Wang via llvm-commits
- [llvm] [InlineSpiller] Check rematerialization before folding operand (PR #134015)
Phoebe Wang via llvm-commits
- [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - reduce the size of VPERMV/VPERMV3 nodes if the upper elements are not demanded (PR #133923)
Phoebe Wang via llvm-commits
- [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - reduce the size of VPERMV/VPERMV3 nodes if the upper elements are not demanded (PR #133923)
Phoebe Wang via llvm-commits
- [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - reduce the size of VPERMV/VPERMV3 nodes if the upper elements are not demanded (PR #133923)
Phoebe Wang via llvm-commits
- [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - reduce the size of VPERMV/VPERMV3 nodes if the upper elements are not demanded (PR #133923)
Phoebe Wang via llvm-commits
- [llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - reduce the size of VPERMV/VPERMV3 nodes if the upper elements are not demanded (PR #133923)
Phoebe Wang via llvm-commits
- [llvm] [AMDGPU] Avoid crashes for non-byte-sized types in PromoteAlloca (PR #134042)
Pierre van Houtryve via llvm-commits
- [llvm] llvm-reduce: Avoid worklist in simplify-instruction (PR #134066)
Pierre van Houtryve via llvm-commits
- [llvm] [AMDGPU] (xor (cmp_eq x, 1), -1) -> cmp_neq x, 1 (PR #133698)
Pierre van Houtryve via llvm-commits
- [llvm] [AMDGPU] (xor (cmp_eq x, 1), -1) -> cmp_neq x, 1 (PR #133698)
Pierre van Houtryve via llvm-commits
- [llvm] [AMDGPU] (xor (cmp_eq x, 1), -1) -> cmp_neq x, 1 (PR #133698)
Pierre van Houtryve via llvm-commits
- [clang] [llvm] [IRBuilder] Add new overload for CreateIntrinsic (PR #131942)
Rahul Joshi via llvm-commits
- [llvm] [NFC][SPIRV] Misc code cleanup in SPIRV Target (PR #133764)
Rahul Joshi via llvm-commits
- [llvm] [NFC][SPIRV] Misc code cleanup in SPIRV Target (PR #133764)
Rahul Joshi via llvm-commits
- [llvm] [TableGen] Use size returned by encodeULEB128 to simplify some code. NFC (PR #133750)
Rahul Joshi via llvm-commits
- [llvm] [NFC][SPIRV] Misc code cleanup in SPIRV Target (PR #133764)
Rahul Joshi via llvm-commits
- [llvm] [NFC][SPIRV] Misc code cleanup in SPIRV Target (PR #133764)
Rahul Joshi via llvm-commits
- [llvm] [NFC][SPIRV] Misc code cleanup in SPIRV Target (PR #133764)
Rahul Joshi via llvm-commits
- [llvm] [NFC] Cleanup pass initialization for SPIRV passes (PR #134189)
Rahul Joshi via llvm-commits
- [llvm] [NFC] Cleanup pass initialization for SPIRV passes (PR #134189)
Rahul Joshi via llvm-commits
- [llvm] [LV] Regen a test with UTC (PR #133432)
Ramkumar Ramachandra via llvm-commits
- [llvm] [Reland][SCEV] teach isImpliedViaOperations about samesign (PR #133711)
Ramkumar Ramachandra via llvm-commits
- [llvm] [LV] Regen a test with UTC (PR #133432)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Add m_Deferred. NFC (PR #133736)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Add m_Deferred. NFC (PR #133736)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Add m_Deferred. NFC (PR #133736)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Add m_Deferred. NFC (PR #133736)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Add m_Deferred. NFC (PR #133736)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Add m_Deferred. NFC (PR #133736)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Add m_Deferred. NFC (PR #133736)
Ramkumar Ramachandra via llvm-commits
- [llvm] [Reland][SCEV] teach isImpliedViaOperations about samesign (PR #133711)
Ramkumar Ramachandra via llvm-commits
- [llvm] [IR] Add helper `CmpPredicate::withoutSameSign` (PR #134071)
Ramkumar Ramachandra via llvm-commits
- [llvm] [IR] Add helper `CmpPredicate::withoutSameSign` (PR #134071)
Ramkumar Ramachandra via llvm-commits
- [llvm] [IR] Add helper `CmpPredicate::withoutSameSign` (PR #134071)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Process simplifyRecipes via a worklist (PR #133977)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Process simplifyRecipes via a worklist (PR #133977)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Process simplifyRecipes via a worklist (PR #133977)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Process simplifyRecipes via a worklist (PR #133977)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Process simplifyRecipes via a worklist (PR #133977)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Process simplifyRecipes via a worklist (PR #133977)
Ramkumar Ramachandra via llvm-commits
- [llvm] [LV] Add tests for type-mismatch (PR #130295)
Ramkumar Ramachandra via llvm-commits
- [llvm] [LV] Add tests for type-mismatch (PR #130295)
Ramkumar Ramachandra via llvm-commits
- [llvm] [LV] Add tests for type-mismatch with RT-check conflict rdx (PR #130295)
Ramkumar Ramachandra via llvm-commits
- [llvm] [LV] Exercise type-mismatch with RT-check conflict rdx (PR #130295)
Ramkumar Ramachandra via llvm-commits
- [llvm] [LV] Exercise type-mismatch with RT-check conflict rdx (PR #130295)
Ramkumar Ramachandra via llvm-commits
- [llvm] [IR] Add helper `CmpPredicate::dropSameSign` (PR #134071)
Ramkumar Ramachandra via llvm-commits
- [llvm] [IR] Add helper `CmpPredicate::dropSameSign` (PR #134071)
Ramkumar Ramachandra via llvm-commits
- [llvm] [LV] Regen a test with UTC (PR #134076)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Split out VPBlendRecipe simplifications from simplifyRecipes. NFC (PR #134073)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Split out VPBlendRecipe simplifications from simplifyRecipes. NFC (PR #134073)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Split out VPBlendRecipe simplifications from simplifyRecipes. NFC (PR #134073)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Split out VPBlendRecipe simplifications from simplifyRecipes. NFC (PR #134073)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Split out VPBlendRecipe simplifications from simplifyRecipes. NFC (PR #134073)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Process simplifyRecipes via a worklist (PR #133977)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Introduce VPlanConstantFolder (PR #125365)
Ramkumar Ramachandra via llvm-commits
- [llvm] [VPlan] Introduce VPlanConstantFolder (PR #125365)
Ramkumar Ramachandra via llvm-commits
- [llvm] [DebugInfo] Preserve line and column number when merging debug info. (PR #129960)
Reid Kleckner via llvm-commits
- [llvm] [DebugInfo] Preserve line and column number when merging debug info. (PR #129960)
Reid Kleckner via llvm-commits
- [llvm] [DebugInfo] Preserve line and column number when merging debug info. (PR #129960)
Reid Kleckner via llvm-commits
- [llvm] [DebugInfo] Preserve line and column number when merging debug info. (PR #129960)
Reid Kleckner via llvm-commits
- [llvm] [DebugInfo] Preserve line and column number when merging debug info. (PR #129960)
Reid Kleckner via llvm-commits
- [llvm] [MachineVerifier] Fix LiveInterval verification of unwinding instructions (PR #131565)
Reid Kleckner via llvm-commits
- [llvm] [mlir] [mlir][x86vector] Simplify intrinsic generation (PR #133692)
Renato Golin via llvm-commits
- [llvm] [AArch64][SVE] Pair SVE fill/spill into LDP/STP with -msve-vector-bits=128. (PR #134068)
Ricardo Jesus via llvm-commits
- [llvm] [AArch64][SVE] Lower unpredicated loads/stores as fixed LDR/STR with -msve-vector-bits=128. (PR #127500)
Ricardo Jesus via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Robert Imschweiler via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Robert Imschweiler via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Robert Imschweiler via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Robert Imschweiler via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Robert Imschweiler via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Robert Imschweiler via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Robert Imschweiler via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Robert Imschweiler via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Robert Imschweiler via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Robert Imschweiler via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Robert Imschweiler via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Robert Imschweiler via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
Robert Imschweiler via llvm-commits
- [lldb] [llvm] [lldb] Implement CLI support for reverse-continue (PR #132783)
Robert O'Callahan via llvm-commits
- [lldb] [llvm] [lldb] Implement CLI support for reverse-continue (PR #132783)
Robert O'Callahan via llvm-commits
- [lldb] [llvm] [lldb] Implement CLI support for reverse-continue (PR #132783)
Robert O'Callahan via llvm-commits
- [llvm] [CodeGenPrepare][RISCV] Combine (X ^ Y) and (X == Y) where appropriate (PR #130922)
Ryan Buchner via llvm-commits
- [llvm] [CodeGenPrepare][RISCV] Combine (X ^ Y) and (X == Y) where appropriate (PR #130922)
Ryan Buchner via llvm-commits
- [llvm] [CodeGenPrepare][RISCV] Combine (X ^ Y) and (X == Y) where appropriate (PR #130922)
Ryan Buchner via llvm-commits
- [llvm] [CodeGenPrepare][RISCV] Combine (X ^ Y) and (X == Y) where appropriate (PR #130922)
Ryan Buchner via llvm-commits
- [llvm] [LoopInterchange] Add an option to control the cost heuristics applied (PR #133664)
Ryotaro Kasuga via llvm-commits
- [llvm] [LoopInterchange] Add tests for the vectorization profitability (NFC) (PR #133665)
Ryotaro Kasuga via llvm-commits
- [llvm] [LoopInterchange] Add tests for the vectorization profitability (NFC) (PR #133665)
Ryotaro Kasuga via llvm-commits
- [llvm] [LoopInterchange] Add tests for the vectorization profitability (NFC) (PR #133665)
Ryotaro Kasuga via llvm-commits
- [llvm] [LoopInterchange] Add tests for the vectorization profitability (NFC) (PR #133665)
Ryotaro Kasuga via llvm-commits
- [llvm] [LoopInterchange] Add tests for the vectorization profitability (NFC) (PR #133665)
Ryotaro Kasuga via llvm-commits
- [llvm] [LoopInterchange] Add tests for the vectorization profitability (NFC) (PR #133665)
Ryotaro Kasuga via llvm-commits
- [llvm] [LoopInterchange] Add tests for the vectorization profitability (NFC) (PR #133665)
Ryotaro Kasuga via llvm-commits
- [llvm] [LoopInterchange] Add tests for the vectorization profitability (NFC) (PR #133665)
Ryotaro Kasuga via llvm-commits
- [llvm] [DA] do not handle array accesses of different offsets (PR #123436)
Ryotaro Kasuga via llvm-commits
- [llvm] [LoopInterchange] Add metadata to control loop-interchange (PR #127474)
Ryotaro Kasuga via llvm-commits
- [llvm] [LoopInterchange] Add metadata to control loop-interchange (PR #127474)
Ryotaro Kasuga via llvm-commits
- [llvm] [LoopInterchange] Add metadata to control loop-interchange (PR #127474)
Ryotaro Kasuga via llvm-commits
- [llvm] [LoopInterchange] Add tests for the vectorization profitability (NFC) (PR #133665)
Ryotaro Kasuga via llvm-commits
- [llvm] [LoopInterchange] Fix the vectorizable check for a loop (PR #133667)
Ryotaro Kasuga via llvm-commits
- [llvm] [LoopInterchange] Fix the vectorizable check for a loop (PR #133667)
Ryotaro Kasuga via llvm-commits
- [llvm] Adding IR2Vec as an analysis pass (PR #134004)
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- [llvm] Adding IR2Vec as an analysis pass (PR #134004)
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Shilei Tian via llvm-commits
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Simon Pilgrim via llvm-commits
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Simon Pilgrim via llvm-commits
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- [llvm] [SLP]Fix same/alternate analysis in split node analysis for compares (PR #133769)
via llvm-commits
- [llvm] [DirectX] Fix build break caused by bitcode writer changes (PR #133770)
via llvm-commits
- [llvm] [DirectX] legalize frem so that modulo behavior is the same as fmod (PR #133772)
via llvm-commits
- [llvm] a415b7f - [WebAssembly] Add more lowerings for wide-arithmetic (#132430)
via llvm-commits
- [llvm] c1bf5e6 - [DirectX] Fix build break caused by bitcode writer changes (#133770)
via llvm-commits
- [llvm] [SLP]Support revectorization of the previously vectorized scalars (PR #133091)
via llvm-commits
- [llvm] [SLP]Support revectorization of the previously vectorized scalars (PR #133091)
via llvm-commits
- [llvm] [mlir] scan lowering changes (PR #133149)
via llvm-commits
- [llvm] [NVPTX] Cleanup and refactor atomic lowering (PR #133781)
via llvm-commits
- [llvm] [NVPTX] Cleanup and refactor atomic lowering (PR #133781)
via llvm-commits
- [llvm] 5a30794 - Add RISC-V support information to readme (#132699)
via llvm-commits
- [llvm] Add RISC-V support information to readme (PR #132699)
via llvm-commits
- [llvm] [WebAssembly] Add a missing `break` statement (PR #133783)
via llvm-commits
- [llvm] 89c25c5 - [Xtensa] Implement windowed register call ABI. (#130001)
via llvm-commits
- [compiler-rt] b01e5b2 - [ctxprof][nfc] Refactor `__llvm_ctx_profile_start_context` (#133744)
via llvm-commits
- [compiler-rt] [llvm] [ctxprof] root autodetection mechanism (PR #133147)
via llvm-commits
- [compiler-rt] 225f6dd - [ctxprof][nfc] Remove redundant `SANITIZER_NO_THREAD_SAFETY_ANALYSIS` (#133784)
via llvm-commits
- [llvm] c632466 - [WebAssembly] Add a missing `break` statement (#133783)
via llvm-commits
- [llvm] [AMDGPU] Split struct kernel arguments (PR #133786)
via llvm-commits
- [llvm] [AMDGPU] Split struct kernel arguments (PR #133786)
via llvm-commits
- [llvm] [AMDGPU] Split struct kernel arguments (PR #133786)
via llvm-commits
- [llvm] b739a3c - [VPlan] Add m_Deferred. NFC (#133736)
via llvm-commits
- [llvm] [RISCV] Use decodeCLUIImmOperand when disassembling C_LUI_HINT. (PR #133789)
via llvm-commits
- [llvm] [RISCV] Use decodeCLUIImmOperand when disassembling C_LUI_HINT. (PR #133789)
via llvm-commits
- [clang] [llvm] Revert "[HLSL][RootSignature] Implement parsing of a DescriptorTable with empty clauses" (PR #133790)
via llvm-commits
- [clang] [llvm] Revert "[HLSL][RootSignature] Implement parsing of a DescriptorTable with empty clauses" (PR #133790)
via llvm-commits
- [clang] [llvm] Revert "[HLSL][RootSignature] Implement parsing of a DescriptorTable with empty clauses" (PR #133790)
via llvm-commits
- [llvm] 6afe5e5 - [LV][EVL] Peek through combination tail-folded + predicated masks (#133430)
via llvm-commits
- [llvm] 5e2860a - Revert "[HLSL][RootSignature] Implement parsing of a DescriptorTable with empty clauses" (#133790)
via llvm-commits
- [llvm] Stop using __attribute__((retain)) in GCC builds (PR #133793)
via llvm-commits
- [llvm] [LV] Use frozen start value for FindLastIV if needed. (PR #132691)
via llvm-commits
- [llvm] [LV] Use frozen start value for FindLastIV if needed. (PR #132691)
via llvm-commits
- [llvm] Reland "Symbolize line zero as if no source info is available (#124846)" (PR #133798)
via llvm-commits
- [llvm] Reland "Symbolize line zero as if no source info is available (#124846)" (PR #133798)
via llvm-commits
- [llvm] Signed integer overflow in Constraint Elimination pass LLVM issue (PR #133668)
via llvm-commits
- [llvm] [bazel] Format BUILD files with buildifier (PR #133802)
via llvm-commits
- [llvm] [RISCV] Prevent disassembling RVC hint instructions with x16-x31 for RVE. (PR #133805)
via llvm-commits
- [lld] [LLD][ELF] Support OVERLAY NOCROSSREFS (PR #133807)
via llvm-commits
- [llvm] [VPlan] Add extra checks for LoopForBB. NFC. (PR #132306)
via llvm-commits
- [llvm] [VPlan] Add extra checks for LoopForBB. NFC. (PR #132306)
via llvm-commits
- [flang] [llvm] [flang][device] Enable Stop functions on device build (PR #133803)
via llvm-commits
- [llvm] [workflows] Add missing -y option to apt-get for abi tests (PR #133337)
via llvm-commits
- [llvm] 40c859a - [TableGen] Use size returned by encodeULEB128 to simplify some code. NFC (#133750)
via llvm-commits
- [llvm] [RISCV] Correct disassembly of cm.push/pop for RVE. (PR #133816)
via llvm-commits
- [llvm] [RISCV] Correct disassembly of cm.push/pop for RVE. (PR #133816)
via llvm-commits
- [llvm] [RISCV] Correct disassembly of cm.push/pop for RVE. (PR #133816)
via llvm-commits
- [llvm] [Xtensa] Implement SEXT, NSA, MINMAX and Loop Xtensa Options. (PR #133818)
via llvm-commits
- [llvm] [Xtensa] Implement SEXT, NSA, MINMAX and Loop Xtensa Options. (PR #133818)
via llvm-commits
- [llvm] 5d1f27f - GlobalISel: neg (and x, 1) --> SIGN_EXTEND_INREG x, 1 (#131367)
via llvm-commits
- [llvm] [RISCV] Add exhaustive diassember tests for c.slli64. NFC (PR #133820)
via llvm-commits
- [llvm] 3483740 - Reland "Symbolize line zero as if no source info is available (#124846)" (#133798)
via llvm-commits
- [flang] [llvm] [flang][intrinsics] Implement the time intrinsic (PR #133823)
via llvm-commits
- [llvm] 5b8d8bb - Inliner: Fix missing test coverage for incompatible gc rejection (#133708)
via llvm-commits
- [llvm] cf6a452 - [SLP]Fix same/alternate analysis in split node analysis for compares
via llvm-commits
- [llvm] [DebugInfo] Preserve line and column number when merging debug info. (PR #129960)
via llvm-commits
- [llvm] de053bb - LLVM/Test: Add vectorizing testcases for fminimumnum and fminimumnum (#133690)
via llvm-commits
- [compiler-rt] 02837ac - [Sanitizers][Darwin][Test] Remove community incompliant internal link from sources (#133187)
via llvm-commits
- [compiler-rt] XFAIL malloc_zone.cpp for darwin/lsan (PR #131234)
via llvm-commits
- [llvm] f77f2b9 - llvm-reduce: Try to preserve instruction metadata as argument attributes (#133557)
via llvm-commits
- [llvm] [BOLT][X86] Fix getTargetSymbol() (PR #133834)
via llvm-commits
- [llvm] 508a6b2 - [RISCV] Use decodeUImmLog2XLenNonZeroOperand in decodeRVCInstrRdRs1UImm. NFC (#133759)
via llvm-commits
- [llvm] [LoongArch][MC] Add relocation support for fld fst [x]vld [x]vst (PR #133225)
via llvm-commits
- [llvm] [AMDGPU][CodeGenPrepare] Narrow 64 bit math to 32 bit if profitable (PR #130577)
via llvm-commits
- [llvm] [AMDGPU] add tests for loop definition of bitconvert (PR #133052)
via llvm-commits
- [llvm] [AMDGPU] Implement vop3p complex pattern optmization for gisel (PR #130234)
via llvm-commits
- [llvm] [NFC] Remove the unused hasMinSize() (PR #133838)
via llvm-commits
- [llvm] [NFC] Remove the unused hasMinSize() (PR #133838)
via llvm-commits
- [llvm] Signed integer overflow in Constraint Elimination pass LLVM issue (PR #133668)
via llvm-commits
- [llvm] [LoongArch] Move fix-tle-le-sym-type test to test/MC. NFC (PR #133839)
via llvm-commits
- [llvm] [LoongArch] Move fix-tle-le-sym-type test to test/MC. NFC (PR #133839)
via llvm-commits
- [llvm] [NFC][SPIRV] Misc code cleanup in SPIRV Target (PR #133764)
via llvm-commits
- [llvm] LLVM/Test: Add vectorizing testcases for fminimumnum and fminimumnum (PR #133843)
via llvm-commits
- [llvm] [Target] Use llvm::append_range (NFC) (PR #133606)
via llvm-commits
- [llvm] 145b4a3 - [AMDGPU][CodeGenPrepare] Narrow 64 bit math to 32 bit if profitable (#130577)
via llvm-commits
- [llvm] [AMDGPU][CodeGenPrepare] Narrow 64 bit math to 32 bit if profitable (PR #130577)
via llvm-commits
- [lld] [lld] Use DenseMap::insert_range (NFC) (PR #133845)
via llvm-commits
- [llvm] [ConstantFolding] Add support for `sinh` and `cosh` intrinsics in constant folding (PR #132671)
via llvm-commits
- [llvm] dd86235 - AsmPrinter: Remove ELF's special lowerRelativeReference for unnamed_addr function
via llvm-commits
- [llvm] 27b4928 - [RISCV] Add exhaustive diassember tests for c.slli64. NFC (#133820)
via llvm-commits
- [llvm] ea68b22 - [RISCV] Prevent disassembling RVC hint instructions with x16-x31 for RVE. (#133805)
via llvm-commits
- [llvm] 386aca4 - [RISCV] Correct disassembly of cm.push/pop for RVE. (#133816)
via llvm-commits
- [lld] b3c7d59 - [lld] Use DenseMap::insert_range (NFC) (#133845)
via llvm-commits
- [llvm] [RFC][BPF] Support Jump Table (PR #133856)
via llvm-commits
- [llvm] e3adf6b - [RISCV] Use decodeCLUIImmOperand when disassembling C_LUI_HINT. (#133789)
via llvm-commits
- [llvm] [RFC][BPF] Support Jump Table (PR #133856)
via llvm-commits
- [llvm] 2de7b6c - [ExecutionEngine] Use DenseMap::insert_range (NFC) (#133847)
via llvm-commits
- [llvm] [RFC][BPF] Support Jump Table (PR #133856)
via llvm-commits
- [llvm] [X86] Construct SmallVector with ArrayRef (NFC) (PR #133860)
via llvm-commits
- [llvm] [AArch64] Use ArrayRef::slice (NFC) (PR #133862)
via llvm-commits
- [flang] [llvm] [mlir][llvm][OpenMP] Emit llvm.stacksave and llvm.stackrestore in __atomic_compare_exchange (PR #132888)
via llvm-commits
- [flang] [llvm] [mlir][llvm][OpenMP] Emit llvm.stacksave and llvm.stackrestore in __atomic_compare_exchange (PR #132888)
via llvm-commits
- [llvm] [RISCV] Validate the end of register ranges in Zcmp register lists. (PR #133866)
via llvm-commits
- [llvm] fe3e9c2 - [Analysis] Avoid repeated hash lookups (NFC) (#133045)
via llvm-commits
- [llvm] [RISCV] Merge RegStart with RegEnd in parseRegListCommon. NFC (PR #133867)
via llvm-commits
- [llvm] 6b647de - [NFC] Remove the unused hasMinSize() (#133838)
via llvm-commits
- [llvm] 5ff8c03 - [AArch64] Bugfix when using execute-only and memtag sanitizer together (#133084)
via llvm-commits
- [llvm] c5afcfe - [X86] combineINSERT_SUBVECTOR - fold insert_subvector(base,extract_subvector(broadcast)) -> blend shuffle(base,broadcast) (REAPPLIED) (#133724)
via llvm-commits
- [llvm] 14c5098 - llvm-reduce: Use takeName when moving arguments in operands-to-args (#133851)
via llvm-commits
- [llvm] af0b0ce - [AMDGPU] Fix SIFoldOperandsImpl::tryFoldZeroHighBits when met non-reg src1 operand. (#133761)
via llvm-commits
- [lld] e47d3a3 - [LLD][AArch64] Increase alignment of AArch64AbsLongThunk to 8 (#133738)
via llvm-commits
- [llvm] 197ead7 - [X86] splitVector - split concat_vectors(a, b, c, d) -> concat_vectors(a,b) + concat_vectors(c,d) (#133753)
via llvm-commits
- [llvm] 7581cb6 - [lldb] Remove lldb-server min and max gdbserver port options (#133275)
via llvm-commits
- [llvm] 7f14b2a - Revert "[AMDGPU][CodeGenPrepare] Narrow 64 bit math to 32 bit if profitable" (#133880)
via llvm-commits
- [llvm] 337bad3 - [EarlyIfConverter] Fix reg killed twice after early-if-predicator and ifcvt (#133554)
via llvm-commits
- [llvm] 4a68702 - [CodeGen][NPM] Port XRayInstrumentation to NPM (#129865)
via llvm-commits
- [llvm] 290d7b8 - llvm-reduce: Prune some unneeded includes and forward declares (#133883)
via llvm-commits
- [llvm] ba7feaa - [AMDGPU][Docs] Fix and update AMDGPUUsage.rst (#133894)
via llvm-commits
- [llvm] c192737 - [LLVM][InstCombine][AArch64] Refactor common SVE intrinsic combines. (#126928)
via llvm-commits
- [llvm] 6892d54 - [Clang][LLVM] Implement single-single vectors MOP4{A/S} (#127797)
via llvm-commits
- [llvm] 2c0b888 - [X86] combineX86ShuffleChain - prefer combining to X86ISD::SHUF128 if PERMQ operands are splittable (#133900)
via llvm-commits
- [llvm] 3a66760 - [LV] Improve a test, regen with UTC (#130092)
via llvm-commits
- [llvm] 1ebc308 - [DebugInfo][RemoveDIs] Remove debug-intrinsic printing cmdline options (#131855)
via llvm-commits
- [llvm] e92ff64 - [Clang][LLVM] Implement single-multi vectors MOP4{A/S} (#128854)
via llvm-commits
- [llvm] 173eb32 - [X86] Construct SmallVector with ArrayRef (NFC) (#133860)
via llvm-commits
- [llvm] c30776a - [AArch64] Use ArrayRef::slice (NFC) (#133862)
via llvm-commits
- [llvm] 19fb4b0 - [RISCV] Validate the end of register ranges in Zcmp register lists. (#133866)
via llvm-commits
- [llvm] 4e6c48f - [RISCV] Merge RegStart with RegEnd in parseRegListCommon. NFC (#133867)
via llvm-commits
- [llvm] 664e847 - llvm-reduce: Fix invalid reduction on tokens in operands-to-args (#133855)
via llvm-commits
- [llvm] ac55688 - llvm-reduce: Add test for token handling in operands-skip (#133857)
via llvm-commits
- [llvm] 4cb41d1 - [AArch64] Prefer zip over ushll for anyext. (#133433)
via llvm-commits
- [llvm] a8a33ba - [NFC][SPIRV] Misc code cleanup in SPIRV Target (#133764)
via llvm-commits
- [llvm] e871143 - [SCEV] Remove EqCacheSCEV (#133186)
via llvm-commits
- [llvm] 558ce50 - [Clang][LLVM] Implement multi-single vectors MOP4{A/S} (#129226)
via llvm-commits
- [llvm] 7e25b24 - IRNormalizer: Replace cl::opts with pass parameters (#133874)
via llvm-commits
- [llvm] 4b19db6 - Revert "AsmPrinter: Remove ELF's special lowerRelativeReference for unnamed_addr function" (#133935)
via llvm-commits
- [llvm] dd1d41f - [AMDGPU][True16][CodeGen] fix moveToVALU with proper subreg access in true16 (#132089)
via llvm-commits
- [llvm] ec290a4 - llvm-reduce: Reduce externally_initialized (#133859)
via llvm-commits
- [llvm] 5c43024 - llvm-reduce: Reduce global variable code model (#133865)
via llvm-commits
- [llvm] f60eed9 - llvm-reduce: Add target-features-attr reduction (#133887)
via llvm-commits
- [llvm] 75242a8 - [RISCV] Fix the c_slli disassembler test (NFC) (#133921)
via llvm-commits
- [llvm] 602d05f - llvm-reduce: Make myself maintainer (#133919)
via llvm-commits
- [llvm] a30caa6 - [WebAssembly] Add missing tests from #133289 (#133938)
via llvm-commits
- [llvm] bd7585b - [RISCV] Improve error for using x18-x27 in a register list with RVE. (#133936)
via llvm-commits
- [llvm] 4d1c827 - [WebAssembly] Support parsing .lto_set_conditional (#126546)
via llvm-commits
- [llvm] 7948775 - [Clang][LLVM] Implement multi-multi vectors MOP4{A/S} (#129230)
via llvm-commits
- [llvm] 0e3049c - [SLP]Support revectorization of the previously vectorized scalars
via llvm-commits
- [llvm] 3c7a0e6 - [NVPTX] Cleanup and refactor atomic lowering (#133781)
via llvm-commits
- [llvm] adba14a - Stop using __attribute__((retain)) in GCC builds (#133793)
via llvm-commits
- [llvm] 6767555 - Reland "[HLSL][RootSignature] Implement parsing of a DescriptorTable with empty clauses" (#133958)
via llvm-commits
- [clang] [llvm] Reland "[HLSL][RootSignature] Implement parsing of a DescriptorTable with empty clauses" (PR #133958)
via llvm-commits
- [llvm] [DebugInfo] Soft-disable the production of debug intrinsics (PR #133933)
via llvm-commits
- [compiler-rt] e0c8fc7 - Reapply "[sanitizer] intercept getservent_r, getservbyname_r, getservbyport_r" (#133358) (#133528)
via llvm-commits
- [clang] [llvm] Define LLVM_ABI and CLANG_ABI for __EMSCRIPTEN__ builds (PR #131578)
via llvm-commits
- [compiler-rt] XFAIL malloc_zone.cpp for darwin/lsan (PR #131234)
via llvm-commits
- [libc] [llvm] [libc] Stop depending on .cpp files libcxx_shared_headers library. (PR #133999)
via llvm-commits
- [llvm] 749535b - [RISCV] Use tablegen HasOneUse. NFC (#133974)
via llvm-commits
- [libc] [llvm] [libc] Stop depending on .cpp files libcxx_shared_headers library. (PR #133999)
via llvm-commits
- [llvm] [ctxprof] Option to move a whole tree to its own module (PR #133992)
via llvm-commits
- [llvm] Adding IR2Vec as an analysis pass (PR #134004)
via llvm-commits
- [llvm] [InferAS] Support getAssumedAddrSpace for Arguments for NVPTX (PR #133991)
via llvm-commits
- [llvm] [InferAS] Support getAssumedAddrSpace for Arguments for NVPTX (PR #133991)
via llvm-commits
- [llvm] [TTI] Make isLegalMasked{Load, Store} take an address space (PR #134006)
via llvm-commits
- [llvm] [TTI] Make isLegalMasked{Load, Store} take an address space (PR #134006)
via llvm-commits
- [llvm] [TTI] Make isLegalMasked{Load, Store} take an address space (PR #134006)
via llvm-commits
- [llvm] Signed integer overflow in Constraint Elimination pass (PR #133903)
via llvm-commits
- [clang-tools-extra] [llvm] [clang-doc] Adds a mustache backend (PR #133161)
via llvm-commits
- [lld] [lld-macho] Fix code section ordering in output binary (PR #134010)
via llvm-commits
- [llvm] Signed integer overflow in Constraint Elimination pass (PR #133903)
via llvm-commits
- [lld] [lld-macho] Fix code section ordering in output binary (PR #134010)
via llvm-commits
- [lld] [lld-macho] Fix code section ordering in output binary (PR #134010)
via llvm-commits
- [llvm] e25187b - LLVM/Test: Add vectorizing testcases for fminimumnum and fminimumnum (#133843)
via llvm-commits
- [llvm] [Offload] Implement the remaining initial Offload API (PR #122106)
via llvm-commits
- [llvm] 4696831 - [LoongArch] Move fix-tle-le-sym-type test to test/MC. NFC (#133839)
via llvm-commits
- [llvm] [LoongArch] Move fix-tle-le-sym-type test to test/MC. NFC (PR #133839)
via llvm-commits
- [llvm] Re apply 130577 narrow math for and operand (PR #133896)
via llvm-commits
- [llvm] [AMDGPU] Implement vop3p complex pattern optmization for gisel (PR #130234)
via llvm-commits
- [llvm] Re apply 130577 narrow math for and operand (PR #133896)
via llvm-commits
- [llvm] [LoongArch] Move fix-tle-le-sym-type test to test/MC. NFC (PR #133839)
via llvm-commits
- [llvm] [LoongArch] Move fix-tle-le-sym-type test to test/MC. NFC (PR #133839)
via llvm-commits
- [llvm] Signed integer overflow in Constraint Elimination pass (PR #133903)
via llvm-commits
- [llvm] [InlineSpiller] Check rematerialization before folding operand (PR #134015)
via llvm-commits
- [llvm] [InlineSpiller] Check rematerialization before folding operand (PR #134015)
via llvm-commits
- [llvm] [InlineSpiller] Check rematerialization before folding operand (PR #134015)
via llvm-commits
- [llvm] [InlineSpiller] Check rematerialization before folding operand (PR #134015)
via llvm-commits
- [llvm] [LV][NFC] Clean up tail-folding check for early-exit loops (PR #133931)
via llvm-commits
- [llvm] 55ac652 - llvm-reduce: Do not delete convergencectrl in operand-bundles (#133858)
via llvm-commits
- [llvm] MetaRenamer: replaced command line options with pass parameters (PR #133975)
via llvm-commits
- [llvm] MetaRenamer: replaced command line options with pass parameters (PR #133975)
via llvm-commits
- [llvm] [AMDGPU] Implement vop3p complex pattern optmization for gisel (PR #130234)
via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
via llvm-commits
- [clang] [llvm] [AMDGPU][clang][CodeGen][opt] Add late-resolved feature identifying predicates (PR #134016)
via llvm-commits
- [llvm] [SandboxVectorizer] Use llvm::erase (NFC) (PR #134018)
via llvm-commits
- [llvm] [SandboxVectorizer] Use llvm::erase (NFC) (PR #134018)
via llvm-commits
- [llvm] [Target] Construct SmallVector with ArrayRef (NFC) (PR #134019)
via llvm-commits
- [llvm] [Target] Construct SmallVector with ArrayRef (NFC) (PR #134019)
via llvm-commits
- [llvm] Signed integer overflow in Constraint Elimination pass (PR #133903)
via llvm-commits
- [llvm] llvm-reduce: Change exit code for uninteresting inputs (PR #134021)
via llvm-commits
- [llvm] Signed integer overflow in Constraint Elimination pass (PR #133903)
via llvm-commits
- [llvm] 0cfabd3 - [RISCV] Add Xqci Insn Formats (#132986)
via llvm-commits
- [llvm] adbe9e2 - llvm-reduce: Skip setting br conditions on already constant branches (#133841)
via llvm-commits
- [llvm] Signed integer overflow in Constraint Elimination pass (PR #133903)
via llvm-commits
- [llvm] [TableGen] Directly use SDNode functions to implement HasOneUse and HasNoUse. NFC (PR #133976)
via llvm-commits
- [llvm] [TableGen] Directly use SDNode functions to implement HasOneUse and HasNoUse. NFC (PR #133976)
via llvm-commits
- [llvm] [IR] Add CallBr intrinsics support (PR #133907)
via llvm-commits
- [llvm] [RISCV] Modify register type of extd* Xqcibm instructions (PR #134027)
via llvm-commits
- [llvm] cc10896 - [SandboxVectorizer] Use llvm::erase (NFC) (#134018)
via llvm-commits
- [llvm] 86c3825 - [Target] Construct SmallVector with ArrayRef (NFC) (#134019)
via llvm-commits
- [llvm] AMDGPU: Add round-to-odd rounding during f64 to bf16 conversion (PR #133995)
via llvm-commits
- [llvm] Signed integer overflow in Constraint Elimination pass (PR #133903)
via llvm-commits
- [llvm] e020fc1 - [TableGen] Directly use SDNode functions to implement HasOneUse and HasNoUse. NFC (#133976)
via llvm-commits
- [llvm] Signed integer overflow in Constraint Elimination pass (PR #133903)
via llvm-commits
- [llvm] [RISCV] Modify register type of extd* Xqcibm instructions (PR #134027)
via llvm-commits
- [llvm] Re apply 130577 narrow math for and operand (PR #133896)
via llvm-commits
- [llvm] MetaRenamer: replaced command line options with pass parameters (PR #133975)
via llvm-commits
- [llvm] [SLP][REVEC] getNumElements should not be used as VF when REVEC is enabled. (PR #134031)
via llvm-commits
- [llvm] Re apply 130577 narrow math for and operand (PR #133896)
via llvm-commits
- [llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #134033)
via llvm-commits
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- [llvm] 536fe74 - [RISCV] Modify register type of extd* Xqcibm instructions (#134027)
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- [llvm] cde2ea3 - llvm-reduce: Defer a shouldKeep call in operand reduction (#133387)
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- [llvm] [WIP][X86] combineX86ShufflesRecursively - attempt to combine shuffles with larger types from EXTRACT_SUBVECTOR nodes (PR #133947)
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- [llvm] 8107b43 - [VPlan] Simplify select c, x, x -> x (#133731)
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- [clang] [clang-tools-extra] [flang] [lldb] [llvm] [mlir] Fix typos: paramter, parametr, parametere (PR #134092)
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- [lld] [llvm] [lld][AArch64][Build Attributes] Add support for converting AArch64 Build Attributes to GNU Properties (PR #131990)
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- [lld] [llvm] [lld][AArch64][Build Attributes] Add support for converting AArch64 Build Attributes to GNU Properties (PR #131990)
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- [flang] [llvm] [flang][intrinsic] add nonstandard intrinsic unlink (PR #134162)
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- [llvm] [AMDGPU] add s_bitset[10]_b32 optimization for shl+[or, andn2] pattern (PR #134155)
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- [flang] [llvm] [flang] Remove runtime dependence on C++ support for types (PR #134164)
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- [libc] [llvm] [libc] Implemented utimes #133953 (PR #134167)
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- [llvm] [DSE] Add predicated vector length store support for masked store eli… (PR #134175)
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- [llvm] Allow this test to pass when the source is on a read-only filesystem (PR #134179)
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- [llvm] Allow this test to pass when the source is on a read-only filesystem (PR #134179)
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- [llvm] f68a518 - Allow this test to pass when the source is on a read-only filesystem (#134179)
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- [llvm] Allow this test to pass when the source is on a read-only filesystem (PR #134179)
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- [llvm] [RISCV] Check S0 register list check for qc.cm.pushfp to after we parsed the whole register list. (PR #134180)
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- [llvm] [RISCV] Check S0 register list check for qc.cm.pushfp to after we parsed the whole register list. (PR #134180)
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- [libc] [llvm] [libc] Implemented utimes (Issue #133953) (PR #134167)
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- [llvm] Re apply 130577 narrow math for and operand (PR #133896)
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- [llvm] [AMDGPU] Implement vop3p complex pattern optmization for gisel (PR #130234)
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- [llvm] 7559c64 - CloneModule: Map global initializers after mapping the function (#134082)
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- [llvm] e5809f0 - [LLVM] Only build the GPU loader utility if it has LLVM-libc (#134141)
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- [llvm] [RISCV] Don't allow '-' after 'ra' in Zcmp/Xqccmp register list. (PR #134182)
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- [llvm] 02467f9 - [ctxprof] Option to move a whole tree to its own module (#133992)
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- [llvm] d59b2c4 - [ctxprof][nfc] Make `computeImportForFunction` a member of `ModuleImportsManager` (#134011)
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- [llvm] ff0c2fb - [LoongArch] Pre-commit tests for vector absolute difference (#132898)
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- [llvm] [InlineSpiller] Check rematerialization before folding operand (PR #134015)
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- [llvm] [AMDGPU][NewPM] Port "AMDGPUResourceUsageAnalysis" to NPM (PR #130959)
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- [llvm] [X86Backend] Use GetExternalSymbolSymbol for MO_ExternalSymbol. (PR #133352)
weiwei chen via llvm-commits
- [llvm] [X86Backend] Use GetExternalSymbolSymbol for MO_ExternalSymbol. (PR #133352)
weiwei chen via llvm-commits
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weiwei chen via llvm-commits
- [llvm] [X86Backend] Use GetExternalSymbolSymbol for MO_ExternalSymbol. (PR #133352)
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- [llvm] Introducing a new ISD::POISON SDNode to represent the poison value in the IR. (PR #125883)
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- [llvm] Introducing a new ISD::POISON SDNode to represent the poison value in the IR. (PR #125883)
zhijian lin via llvm-commits
- [llvm] [PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (PR #133155)
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Archived on: Wed Apr 2 19:44:34 PDT 2025
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