[llvm] [RISCV] Add Xqci Insn Formats (PR #132986)

LLVM Continuous Integration via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 1 21:43:45 PDT 2025 

llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `amdgpu-offload-rhel-8-cmake-build-only` running on `rocm-docker-rhel-8` while building `llvm` at step 4 "annotate".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/204/builds/5244

<details>
<summary>Here is the relevant piece of the build log for the reference</summary>

```
Step 4 (annotate) failure: '../llvm-zorg/zorg/buildbot/builders/annotated/amdgpu-offload-cmake.py --jobs=32' (failure)
...
[1511/7717] Building ROCDLOpsAttributes.h.inc...
[1512/7717] Building SPIRVAvailability.cpp.inc...
[1513/7717] Building VCIXOps.cpp.inc...
[1514/7717] Building VCIXOpsDialect.cpp.inc...
[1515/7717] Building SPIRVAvailability.h.inc...
[1516/7717] Building VCIXOps.h.inc...
[1517/7717] Building VCIXOpsDialect.h.inc...
[1518/7717] Building VCIXOpsTypes.h.inc...
[1519/7717] Building VCIXOpsTypes.cpp.inc...
[1520/7717] Building RISCVTargetParserDef.inc...
FAILED: include/llvm/TargetParser/RISCVTargetParserDef.inc /home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/build/include/llvm/TargetParser/RISCVTargetParserDef.inc 
cd /home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/build && /home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/build/bin/llvm-min-tblgen -gen-riscv-target-def -I /home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/llvm-project/llvm/lib/Target/RISCV/ -I /home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/llvm-project/llvm/include/llvm/TargetParser -I/home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/build/include -I/home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/llvm-project/llvm/include /home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/llvm-project/llvm/lib/Target/RISCV/RISCV.td --write-if-changed -o include/llvm/TargetParser/RISCVTargetParserDef.inc -d include/llvm/TargetParser/RISCVTargetParserDef.inc.d
Included from /home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/llvm-project/llvm/lib/Target/RISCV/RISCV.td:36:
Included from /home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfo.td:2181:
/home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td:281:41: error: Variable not defined: 'simm13_lsb0'
                                        simm13_lsb0:$imm12),
                                        ^
[1521/7717] Building VCIXConversions.inc...
[1522/7717] Building VCIXOpsAttributes.cpp.inc...
[1523/7717] Building VCIXOpsAttributes.h.inc...
[1524/7717] Building X86GenRegisterInfo.inc...
[1525/7717] Building X86GenRegisterBank.inc...
[1526/7717] Building X86GenMnemonicTables.inc...
[1527/7717] Building X86GenAsmWriter1.inc...
[1528/7717] Building X86GenAsmWriter.inc...
[1529/7717] Building X86GenAsmMatcher.inc...
[1530/7717] Building X86GenFoldTables.inc...
[1531/7717] Building X86GenInstrMapping.inc...
[1532/7717] Building X86GenDisassemblerTables.inc...
[1533/7717] Building X86GenFastISel.inc...
[1534/7717] Building X86GenGlobalISel.inc...
[1535/7717] Building X86GenSubtargetInfo.inc...
[1536/7717] Building X86GenDAGISel.inc...
[1537/7717] Building X86GenInstrInfo.inc...
[1538/7717] Building AMDGPUGenMCPseudoLowering.inc...
[1539/7717] Building AMDGPUGenCallingConv.inc...
[1540/7717] Building AMDGPUGenPostLegalizeGICombiner.inc...
[1541/7717] Building AMDGPUGenMCCodeEmitter.inc...
[1542/7717] Building AMDGPUGenPreLegalizeGICombiner.inc...
[1543/7717] Building AMDGPUGenRegBankGICombiner.inc...
[1544/7717] Building AMDGPUGenSubtargetInfo.inc...
[1545/7717] Building AMDGPUGenDisassemblerTables.inc...
[1546/7717] Building AMDGPUGenSearchableTables.inc...
[1547/7717] Building AMDGPUGenAsmWriter.inc...
[1548/7717] Building AMDGPUGenGlobalISel.inc...
[1549/7717] Building AMDGPUGenAsmMatcher.inc...
[1550/7717] Building AMDGPUGenDAGISel.inc...
[1551/7717] Building AMDGPUGenInstrInfo.inc...
[1552/7717] Building AMDGPUGenRegisterBank.inc...
Step 7 (build cmake config) failure: build cmake config (failure)
...
[1511/7717] Building ROCDLOpsAttributes.h.inc...
[1512/7717] Building SPIRVAvailability.cpp.inc...
[1513/7717] Building VCIXOps.cpp.inc...
[1514/7717] Building VCIXOpsDialect.cpp.inc...
[1515/7717] Building SPIRVAvailability.h.inc...
[1516/7717] Building VCIXOps.h.inc...
[1517/7717] Building VCIXOpsDialect.h.inc...
[1518/7717] Building VCIXOpsTypes.h.inc...
[1519/7717] Building VCIXOpsTypes.cpp.inc...
[1520/7717] Building RISCVTargetParserDef.inc...
FAILED: include/llvm/TargetParser/RISCVTargetParserDef.inc /home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/build/include/llvm/TargetParser/RISCVTargetParserDef.inc 
cd /home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/build && /home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/build/bin/llvm-min-tblgen -gen-riscv-target-def -I /home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/llvm-project/llvm/lib/Target/RISCV/ -I /home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/llvm-project/llvm/include/llvm/TargetParser -I/home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/build/include -I/home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/llvm-project/llvm/include /home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/llvm-project/llvm/lib/Target/RISCV/RISCV.td --write-if-changed -o include/llvm/TargetParser/RISCVTargetParserDef.inc -d include/llvm/TargetParser/RISCVTargetParserDef.inc.d
Included from /home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/llvm-project/llvm/lib/Target/RISCV/RISCV.td:36:
Included from /home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfo.td:2181:
/home/botworker/bbot/amdgpu-offload-rhel-8-cmake-build-only/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td:281:41: error: Variable not defined: 'simm13_lsb0'
                                        simm13_lsb0:$imm12),
                                        ^
[1521/7717] Building VCIXConversions.inc...
[1522/7717] Building VCIXOpsAttributes.cpp.inc...
[1523/7717] Building VCIXOpsAttributes.h.inc...
[1524/7717] Building X86GenRegisterInfo.inc...
[1525/7717] Building X86GenRegisterBank.inc...
[1526/7717] Building X86GenMnemonicTables.inc...
[1527/7717] Building X86GenAsmWriter1.inc...
[1528/7717] Building X86GenAsmWriter.inc...
[1529/7717] Building X86GenAsmMatcher.inc...
[1530/7717] Building X86GenFoldTables.inc...
[1531/7717] Building X86GenInstrMapping.inc...
[1532/7717] Building X86GenDisassemblerTables.inc...
[1533/7717] Building X86GenFastISel.inc...
[1534/7717] Building X86GenGlobalISel.inc...
[1535/7717] Building X86GenSubtargetInfo.inc...
[1536/7717] Building X86GenDAGISel.inc...
[1537/7717] Building X86GenInstrInfo.inc...
[1538/7717] Building AMDGPUGenMCPseudoLowering.inc...
[1539/7717] Building AMDGPUGenCallingConv.inc...
[1540/7717] Building AMDGPUGenPostLegalizeGICombiner.inc...
[1541/7717] Building AMDGPUGenMCCodeEmitter.inc...
[1542/7717] Building AMDGPUGenPreLegalizeGICombiner.inc...
[1543/7717] Building AMDGPUGenRegBankGICombiner.inc...
[1544/7717] Building AMDGPUGenSubtargetInfo.inc...
[1545/7717] Building AMDGPUGenDisassemblerTables.inc...
[1546/7717] Building AMDGPUGenSearchableTables.inc...
[1547/7717] Building AMDGPUGenAsmWriter.inc...
[1548/7717] Building AMDGPUGenGlobalISel.inc...
[1549/7717] Building AMDGPUGenAsmMatcher.inc...
[1550/7717] Building AMDGPUGenDAGISel.inc...
[1551/7717] Building AMDGPUGenInstrInfo.inc...
[1552/7717] Building AMDGPUGenRegisterBank.inc...

```

</details>

https://github.com/llvm/llvm-project/pull/132986

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