[llvm] [AMDGPU] Handled G_UBSANTRAP GlobalIsel (PR #134492)

[via llvm-commits]

llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-amdgpu

Author: None (amansharma612)

<details>
<summary>Changes</summary>

Fixes #<!-- -->131740

---
Full diff: https://github.com/llvm/llvm-project/pull/134492.diff


3 Files Affected:

- (modified) llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (+25-1) 
- (modified) llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h (+3) 
- (added) llvm/test/CodeGen/AMDGPU/ubsan_trap.ll (+7) 


``````````diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
index 275d0193452a5..dd8a010adb6df 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
@@ -2103,7 +2103,7 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST_,
   getActionDefinitionsBuilder({G_MEMCPY, G_MEMCPY_INLINE, G_MEMMOVE, G_MEMSET})
       .lower();
 
-  getActionDefinitionsBuilder({G_TRAP, G_DEBUGTRAP}).custom();
+  getActionDefinitionsBuilder({G_TRAP, G_DEBUGTRAP, G_UBSANTRAP}).custom();
 
   getActionDefinitionsBuilder({G_VASTART, G_VAARG, G_BRJT, G_JUMP_TABLE,
         G_INDEXED_LOAD, G_INDEXED_SEXTLOAD,
@@ -2222,6 +2222,8 @@ bool AMDGPULegalizerInfo::legalizeCustom(
     return legalizeTrap(MI, MRI, B);
   case TargetOpcode::G_DEBUGTRAP:
     return legalizeDebugTrap(MI, MRI, B);
+  case TargetOpcode::G_UBSANTRAP:
+    return legalizeUbsanTrap(MI, MRI, B);
   default:
     return false;
   }
@@ -7045,6 +7047,28 @@ bool AMDGPULegalizerInfo::legalizeDebugTrap(MachineInstr &MI,
   return true;
 }
 
+bool AMDGPULegalizerInfo::legalizeUbsanTrap(MachineInstr &MI,
+                                            MachineRegisterInfo &MRI,
+                                            MachineIRBuilder &B) const {
+  // Is non-HSA path or trap-handler disabled? Then, report a warning
+  // accordingly
+  if (!ST.isTrapHandlerEnabled() ||
+      ST.getTrapHandlerAbi() != GCNSubtarget::TrapHandlerAbi::AMDHSA) {
+    DiagnosticInfoUnsupported NoTrap(B.getMF().getFunction(),
+                                     "ubsantrap handler not supported",
+                                     MI.getDebugLoc(), DS_Warning);
+    LLVMContext &Ctx = B.getMF().getFunction().getContext();
+    Ctx.diagnose(NoTrap);
+  } else {
+    // Insert trap instruction
+    B.buildInstr(AMDGPU::S_TRAP)
+        .addImm(static_cast<unsigned>(GCNSubtarget::TrapID::LLVMAMDHSATrap));
+  }
+
+  MI.eraseFromParent();
+  return true;
+}
+
 bool AMDGPULegalizerInfo::legalizeBVHIntersectRayIntrinsic(
     MachineInstr &MI, MachineIRBuilder &B) const {
   MachineRegisterInfo &MRI = *B.getMRI();
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
index 1f4e02b0d600a..076a66bb6012f 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
@@ -244,6 +244,9 @@ class AMDGPULegalizerInfo final : public LegalizerInfo {
   bool legalizeDebugTrap(MachineInstr &MI, MachineRegisterInfo &MRI,
                          MachineIRBuilder &B) const;
 
+  bool legalizeUbsanTrap(MachineInstr &MI, MachineRegisterInfo &MRI,
+                         MachineIRBuilder &B) const;
+
   bool legalizeIntrinsic(LegalizerHelper &Helper,
                          MachineInstr &MI) const override;
 };
diff --git a/llvm/test/CodeGen/AMDGPU/ubsan_trap.ll b/llvm/test/CodeGen/AMDGPU/ubsan_trap.ll
new file mode 100644
index 0000000000000..9f961031a1ddb
--- /dev/null
+++ b/llvm/test/CodeGen/AMDGPU/ubsan_trap.ll
@@ -0,0 +1,7 @@
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -global-isel < %s
+; LLVM ERROR: cannot select: G_UBSANTRAP 0 (in function: ubsan_trap)
+
+define void @ubsan_trap() {
+  call void @llvm.ubsantrap(i8 0)
+  ret void
+}
\ No newline at end of file

``````````

</details>


https://github.com/llvm/llvm-project/pull/134492