[llvm] [RISCV] Add Xqci Insn Formats (PR #132986)

LLVM Continuous Integration via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 1 21:44:01 PDT 2025


llvm-ci wrote:

LLVM Buildbot has detected a new failure on builder `lld-x86_64-ubuntu-fast` running on `as-builder-4` while building `llvm` at step 5 "build-unified-tree".

Full details are available at: https://lab.llvm.org/buildbot/#/builders/33/builds/14176

<details>
<summary>Here is the relevant piece of the build log for the reference</summary>

```
Step 5 (build-unified-tree) failure: build (failure)
...
5.277 [3341/64/549] Building MipsGenCallingConv.inc...
5.284 [3340/64/550] Building ARMGenInstrInfo.inc...
5.284 [3339/64/551] Building MipsGenExegesis.inc...
5.311 [3338/64/552] Building CXX object lib/Target/ARM/Utils/CMakeFiles/LLVMARMUtils.dir/ARMBaseInfo.cpp.o
5.312 [3337/64/553] Building MSP430GenMCCodeEmitter.inc...
5.327 [3336/64/554] Building MSP430GenAsmWriter.inc...
5.332 [3335/64/555] Linking CXX static library lib/libLLVMARMUtils.a
5.351 [3334/64/556] Building MSP430GenRegisterInfo.inc...
5.352 [3333/64/557] Building MipsGenAsmWriter.inc...
5.361 [3332/64/558] Building RISCVTargetParserDef.inc...
FAILED: include/llvm/TargetParser/RISCVTargetParserDef.inc /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/build/include/llvm/TargetParser/RISCVTargetParserDef.inc 
cd /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/build && /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/build/bin/llvm-min-tblgen -gen-riscv-target-def -I /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/lib/Target/RISCV/ -I /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/include/llvm/TargetParser -I/home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/build/include -I/home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/include /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/lib/Target/RISCV/RISCV.td --write-if-changed -o include/llvm/TargetParser/RISCVTargetParserDef.inc -d include/llvm/TargetParser/RISCVTargetParserDef.inc.d
Included from /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/lib/Target/RISCV/RISCV.td:36:
Included from /home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfo.td:2181:
/home/buildbot/worker/as-builder-4/ramdisk/lld-x86_64/llvm-project/llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td:281:41: error: Variable not defined: 'simm13_lsb0'
                                        simm13_lsb0:$imm12),
                                        ^
5.382 [3332/63/559] Building MipsGenAsmMatcher.inc...
5.438 [3332/62/560] Building MipsGenDisassemblerTables.inc...
5.466 [3332/61/561] Building MipsGenMCPseudoLowering.inc...
5.531 [3332/60/562] Building MSP430GenSubtargetInfo.inc...
5.548 [3332/59/563] Building MipsGenPostLegalizeGICombiner.inc...
5.548 [3332/58/564] Building MipsGenRegisterBank.inc...
5.603 [3332/57/565] Building MipsGenRegisterInfo.inc...
5.689 [3332/56/566] Building LoongArchGenInstrInfo.inc...
5.702 [3332/55/567] Building LoongArchGenDAGISel.inc...
5.813 [3332/54/568] Building MipsGenFastISel.inc...
5.815 [3332/53/569] Building MipsGenDAGISel.inc...
5.856 [3332/52/570] Building MipsGenInstrInfo.inc...
5.879 [3332/51/571] Building MipsGenGlobalISel.inc...
6.025 [3332/50/572] Building PPCGenDisassemblerTables.inc...
6.042 [3332/49/573] Building NVPTXGenRegisterInfo.inc...
6.054 [3332/48/574] Building MipsGenSubtargetInfo.inc...
6.085 [3332/47/575] Building PPCGenCallingConv.inc...
6.105 [3332/46/576] Building AArch64GenFastISel.inc...
6.115 [3332/45/577] Building NVPTXGenAsmWriter.inc...
6.121 [3332/44/578] Building PPCGenExegesis.inc...
6.154 [3332/43/579] Building PPCGenRegisterInfo.inc...
6.170 [3332/42/580] Building HexagonGenInstrInfo.inc...
6.199 [3332/41/581] Building PPCGenAsmMatcher.inc...
6.225 [3332/40/582] Building PPCGenAsmWriter.inc...
6.282 [3332/39/583] Building NVPTXGenSubtargetInfo.inc...
6.369 [3332/38/584] Building HexagonGenDAGISel.inc...
6.571 [3332/37/585] Building PPCGenSubtargetInfo.inc...
6.682 [3332/36/586] Building PPCGenFastISel.inc...
6.699 [3332/35/587] Building NVPTXGenDAGISel.inc...
6.889 [3332/34/588] Building NVPTXGenInstrInfo.inc...
6.982 [3332/33/589] Building PPCGenGlobalISel.inc...
7.038 [3332/32/590] Building PPCGenInstrInfo.inc...

```

</details>

https://github.com/llvm/llvm-project/pull/132986


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