[llvm] [AMDGPU] add s_bitset[10]_b32 optimization for shl+[or, andn2] pattern (PR #134155)

[Juan Manuel Martinez Caamaño via llvm-commits]

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@@ -534,6 +535,56 @@ bool SIShrinkInstructions::shrinkScalarLogicOp(MachineInstr &MI) const {
   MachineOperand *SrcReg = Src0;
   MachineOperand *SrcImm = Src1;
 
+  //  case 1:
+  //  From:
+  //  s_lshl_b32 s1, 1, s1
+  //  s_or_b32 s0, s0, s1
+  //  To:
+  //  s_bitset1_b32 s0, s1
+  //
+  //  case 2:
+  //  s_lshl_b32 s1, 1, s1
+  //  s_andn2_b32 s0, s0, s1
+  //  To:
+  //  s_bitset0_b32 s0, s1
+  if ((MI.getOpcode() == AMDGPU::S_OR_B32 ||
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jmmartinez wrote:

Please move this code into its own function (in the same way as it is done for `shrinkScalarLogicOp`). It would help reduce the nesting of the ifs and have simpler conditions.

https://github.com/llvm/llvm-project/pull/134155