[llvm] [AMDGPU][NPM] Add isRequired to passes missing it (PR #134033)

via llvm-commits llvm-commits at lists.llvm.org
Tue Apr 1 23:28:36 PDT 2025


llvmbot wrote:


<!--LLVM PR SUMMARY COMMENT-->

@llvm/pr-subscribers-backend-amdgpu

Author: Akshat Oke (optimisan)

<details>
<summary>Changes</summary>



---
Full diff: https://github.com/llvm/llvm-project/pull/134033.diff


13 Files Affected:

- (modified) llvm/lib/Target/AMDGPU/AMDGPU.h (+3) 
- (modified) llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h (+1) 
- (modified) llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h (+1) 
- (modified) llvm/lib/Target/AMDGPU/GCNNSAReassign.h (+1) 
- (modified) llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h (+1) 
- (modified) llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h (+1) 
- (modified) llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h (+1) 
- (modified) llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h (+1) 
- (modified) llvm/lib/Target/AMDGPU/SILowerControlFlow.h (+1) 
- (modified) llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h (+1) 
- (modified) llvm/lib/Target/AMDGPU/SILowerWWMCopies.h (+1) 
- (modified) llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.h (+1) 
- (modified) llvm/lib/Target/AMDGPU/SIWholeQuadMode.h (+1) 


``````````diff
diff --git a/llvm/lib/Target/AMDGPU/AMDGPU.h b/llvm/lib/Target/AMDGPU/AMDGPU.h
index a8e4ea9429f50..5236c83c6e99f 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPU.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPU.h
@@ -89,6 +89,7 @@ class SILowerI1CopiesPass : public PassInfoMixin<SILowerI1CopiesPass> {
   SILowerI1CopiesPass() = default;
   PreservedAnalyses run(MachineFunction &MF,
                         MachineFunctionAnalysisManager &MFAM);
+  static bool isRequired() { return true; }
 };
 
 void initializeAMDGPUDAGToDAGISelLegacyPass(PassRegistry &);
@@ -356,6 +357,7 @@ class SIModeRegisterPass : public PassInfoMixin<SIModeRegisterPass> {
 public:
   SIModeRegisterPass() {}
   PreservedAnalyses run(MachineFunction &F, MachineFunctionAnalysisManager &AM);
+  static bool isRequired() { return true; }
 };
 
 class SIMemoryLegalizerPass : public PassInfoMixin<SIMemoryLegalizerPass> {
@@ -458,6 +460,7 @@ class SIAnnotateControlFlowPass
 public:
   SIAnnotateControlFlowPass(const AMDGPUTargetMachine &TM) : TM(TM) {}
   PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
+  static bool isRequired() { return true; }
 };
 
 void initializeSIAnnotateControlFlowLegacyPass(PassRegistry &);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
index f3b9364fdb92b..db5a1c0ac71aa 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
@@ -287,6 +287,7 @@ class AMDGPUISelDAGToDAGPass : public SelectionDAGISelPass {
 
   PreservedAnalyses run(MachineFunction &MF,
                         MachineFunctionAnalysisManager &MFAM);
+  static bool isRequired() { return true; }
 };
 
 class AMDGPUDAGToDAGISelLegacy : public SelectionDAGISelLegacy {
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h b/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
index 2fd98a2ee1a93..d6fb0e53e1169 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.h
@@ -29,6 +29,7 @@ class AMDGPUUnifyDivergentExitNodesPass
     : public PassInfoMixin<AMDGPUUnifyDivergentExitNodesPass> {
 public:
   PreservedAnalyses run(Function &F, FunctionAnalysisManager &AM);
+  static bool isRequired() { return true; }
 };
 
 } // end namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/GCNNSAReassign.h b/llvm/lib/Target/AMDGPU/GCNNSAReassign.h
index 97a72e7ddbb24..4f2abe0dd0086 100644
--- a/llvm/lib/Target/AMDGPU/GCNNSAReassign.h
+++ b/llvm/lib/Target/AMDGPU/GCNNSAReassign.h
@@ -16,6 +16,7 @@ class GCNNSAReassignPass : public PassInfoMixin<GCNNSAReassignPass> {
 public:
   PreservedAnalyses run(MachineFunction &MF,
                         MachineFunctionAnalysisManager &MFAM);
+  static bool isRequired() { return true; }
 };
 } // namespace llvm
 
diff --git a/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h b/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
index 4cd7dea83a061..4c4ac344cb206 100644
--- a/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
+++ b/llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.h
@@ -17,6 +17,7 @@ class GCNPreRALongBranchRegPass
 public:
   PreservedAnalyses run(MachineFunction &MF,
                         MachineFunctionAnalysisManager &MFAM);
+  static bool isRequired() { return true; }
 };
 } // namespace llvm
 
diff --git a/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h b/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
index b2c3190b5c6ba..4e97128bdc2d5 100644
--- a/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
+++ b/llvm/lib/Target/AMDGPU/GCNRewritePartialRegUses.h
@@ -17,6 +17,7 @@ class GCNRewritePartialRegUsesPass
 public:
   PreservedAnalyses run(MachineFunction &MF,
                         MachineFunctionAnalysisManager &MFAM);
+  static bool isRequired() { return true; }
 };
 } // namespace llvm
 
diff --git a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h
index d7551a45887b9..12b87d756e664 100644
--- a/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h
+++ b/llvm/lib/Target/AMDGPU/SIFixSGPRCopies.h
@@ -18,6 +18,7 @@ class SIFixSGPRCopiesPass : public PassInfoMixin<SIFixSGPRCopiesPass> {
   SIFixSGPRCopiesPass() = default;
   PreservedAnalyses run(MachineFunction &MF,
                         MachineFunctionAnalysisManager &MFAM);
+  static bool isRequired() { return true; }
 };
 
 } // namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h b/llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h
index 7b098b71597ff..0637b5d1750f9 100644
--- a/llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h
+++ b/llvm/lib/Target/AMDGPU/SIFixVGPRCopies.h
@@ -16,6 +16,7 @@ class SIFixVGPRCopiesPass : public PassInfoMixin<SIFixVGPRCopiesPass> {
 public:
   PreservedAnalyses run(MachineFunction &MF,
                         MachineFunctionAnalysisManager &MFAM);
+  static bool isRequired() { return true; }
 };
 } // namespace llvm
 
diff --git a/llvm/lib/Target/AMDGPU/SILowerControlFlow.h b/llvm/lib/Target/AMDGPU/SILowerControlFlow.h
index 23803c679c246..478558dfbf97f 100644
--- a/llvm/lib/Target/AMDGPU/SILowerControlFlow.h
+++ b/llvm/lib/Target/AMDGPU/SILowerControlFlow.h
@@ -16,6 +16,7 @@ class SILowerControlFlowPass : public PassInfoMixin<SILowerControlFlowPass> {
 public:
   PreservedAnalyses run(MachineFunction &MF,
                         MachineFunctionAnalysisManager &MFAM);
+  static bool isRequired() { return true; }
 };
 } // namespace llvm
 
diff --git a/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h b/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h
index a9ffb5705d094..55c1e914d9a6a 100644
--- a/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h
+++ b/llvm/lib/Target/AMDGPU/SILowerSGPRSpills.h
@@ -23,6 +23,7 @@ class SILowerSGPRSpillsPass : public PassInfoMixin<SILowerSGPRSpillsPass> {
         .set(MachineFunctionProperties::Property::IsSSA)
         .set(MachineFunctionProperties::Property::NoVRegs);
   }
+  static bool isRequired() { return true; }
 };
 } // namespace llvm
 
diff --git a/llvm/lib/Target/AMDGPU/SILowerWWMCopies.h b/llvm/lib/Target/AMDGPU/SILowerWWMCopies.h
index cfc8100901760..5c17a479d953c 100644
--- a/llvm/lib/Target/AMDGPU/SILowerWWMCopies.h
+++ b/llvm/lib/Target/AMDGPU/SILowerWWMCopies.h
@@ -16,6 +16,7 @@ class SILowerWWMCopiesPass : public PassInfoMixin<SILowerWWMCopiesPass> {
 public:
   PreservedAnalyses run(MachineFunction &MF,
                         MachineFunctionAnalysisManager &MFAM);
+  static bool isRequired() { return true; }
 };
 } // namespace llvm
 
diff --git a/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.h b/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.h
index 9964817649168..6eae4756d59b2 100644
--- a/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.h
+++ b/llvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.h
@@ -18,6 +18,7 @@ class SIPreAllocateWWMRegsPass
 public:
   PreservedAnalyses run(MachineFunction &MF,
                         MachineFunctionAnalysisManager &MFAM);
+  static bool isRequired() { return true; }
 };
 
 } // namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/SIWholeQuadMode.h b/llvm/lib/Target/AMDGPU/SIWholeQuadMode.h
index e30b46721841b..b33c7d4a632bb 100644
--- a/llvm/lib/Target/AMDGPU/SIWholeQuadMode.h
+++ b/llvm/lib/Target/AMDGPU/SIWholeQuadMode.h
@@ -21,6 +21,7 @@ class SIWholeQuadModePass : public PassInfoMixin<SIWholeQuadModePass> {
     return MachineFunctionProperties().set(
         MachineFunctionProperties::Property::IsSSA);
   }
+  static bool isRequired() { return true; }
 };
 } // namespace llvm
 

``````````

</details>


https://github.com/llvm/llvm-project/pull/134033


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