[clang] [compiler-rt] [llvm] [SystemZ] Add support for half (fp16) (PR #109164)

[Jonas Paulsson via llvm-commits]

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@@ -0,0 +1,65 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=zEC12 -verify-machineinstrs \
+; RUN:   | FileCheck %s --check-prefix=NOVEC
+; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z16 -verify-machineinstrs \
+; RUN:   | FileCheck %s  --check-prefix=VECTOR
+
+declare void @foo(ptr)
+
+; Test an alloca.
+define half @f1() {
+; NOVEC-LABEL: f1:
+; NOVEC:       # %bb.0:
+; NOVEC-NEXT:    stmg %r14, %r15, 112(%r15)
+; NOVEC-NEXT:    .cfi_offset %r14, -48
+; NOVEC-NEXT:    .cfi_offset %r15, -40
+; NOVEC-NEXT:    aghi %r15, -168
+; NOVEC-NEXT:    .cfi_def_cfa_offset 328
+; NOVEC-NEXT:    la %r2, 166(%r15)
+; NOVEC-NEXT:    brasl %r14, foo at PLT
+; NOVEC-NEXT:    lh %r0, 166(%r15)
+; NOVEC-NEXT:    sll %r0, 16
+; NOVEC-NEXT:    risbhg %r0, %r0, 0, 159, 32
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JonPsson1 wrote:

ok - better to convert via i64 since there is no 32-bit extraction/insertion instruction.

https://github.com/llvm/llvm-project/pull/109164