[llvm] [SLP] Make getSameOpcode support interchangeable instructions. (PR #133888)

[Han-Kuan Chen via llvm-commits]

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@@ -813,6 +835,271 @@ static std::optional<unsigned> getExtractIndex(const Instruction *E) {
 }
 
 namespace {
+/// \returns true if \p Opcode is allowed as part of the main/alternate
+/// instruction for SLP vectorization.
+///
+/// Example of unsupported opcode is SDIV that can potentially cause UB if the
+/// "shuffled out" lane would result in division by zero.
+bool isValidForAlternation(unsigned Opcode) {
+  return !Instruction::isIntDivRem(Opcode);
+}
+
+/// Helper class that determines VL can use the same opcode.
+/// Alternate instruction is supported. In addition, it supports interchangeable
+/// instruction. An interchangeable instruction is an instruction that can be
+/// converted to another instruction with same semantics. For example, x << 1 is
+/// equal to x * 2. x * 1 is equal to x | 0.
+class BinOpSameOpcodeHelper {
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HanKuanChen wrote:

I agree. In `llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp`, there is a function called `getAlternateBinop` which does the same thing. However, the problem is I only consider an instruction with `ConstantInt`. It would be difficult to provide a general implementation for this. I hope there would be someone can do this 😄 

https://github.com/llvm/llvm-project/pull/133888