[llvm] [X86] SimplifyDemandedVectorEltsForTargetNode - reduce the size of VPERMV/VPERMV3 nodes if the upper elements are not demanded (PR #133923)
Phoebe Wang via llvm-commits
llvm-commits at lists.llvm.org
Wed Apr 2 05:47:21 PDT 2025
================
@@ -43814,6 +43815,66 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
}
break;
}
+ case X86ISD::VPERMV: {
+ SmallVector<int, 16> Mask;
+ SmallVector<SDValue, 2> Ops;
+ // TODO: Handle 128-bit PERMD/Q -> PSHUFD
+ if (Subtarget.hasVLX() &&
+ (VT.is512BitVector() || VT.getScalarSizeInBits() <= 16) &&
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phoebewang wrote:
Do you mean https://github.com/llvm/llvm-project/commit/2426ac647f33451a92833ab752d74d16ab3330ed? I don't see the test in this patch?
https://github.com/llvm/llvm-project/pull/133923
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