[llvm] [AArch64] Make use of byte FPR stores for bytes extracted from vectors (PR #131793)

[Benjamin Maxwell via llvm-commits]

MacDue wrote:

> Sure but I would rather implement isel for a truncating store that might be generically useful (perhaps even allowing some cleanup of existing isel patterns to make streaming and non-streaming consistent assuming there are not performance compromises) than going down the route of needing to create a dedicated MVT for this one use case.

I've created an alternative patch that lowers thing to `v1i64` -> `v1i8` truncstores, which then are lowered in ISEL to bsub stores. I still need the `vi8` MVT for the ISEL lowering though (to create bsub sub-register extracts). 

https://github.com/llvm/llvm-project/pull/134117

https://github.com/llvm/llvm-project/pull/131793