[llvm] [AArch64][SVE] Add dot product lowering for PARTIAL_REDUCE_MLA node (PR #130933)

[Nicholas Guy via llvm-commits]

================
@@ -1585,6 +1585,26 @@ AArch64TargetLowering::AArch64TargetLowering(const TargetMachine &TM,
       setOperationAction(ISD::MSTORE, VT, Custom);
     }
 
+    if (EnablePartialReduceNodes) {
+      for (MVT VT : MVT::integer_scalable_vector_valuetypes()) {
+        for (MVT InnerVT : MVT::integer_scalable_vector_valuetypes()) {
----------------
NickGuy-Arm wrote:

We're now implicitly specifying the default for all valid types in `getPartialReduceMLAAction`, whereas the initial implementation iterated over `MVT::all_valuetypes()` to achieve this.

https://github.com/llvm/llvm-project/pull/130933