[llvm] [NFC][LLVM][AMDGPU] Cleanup pass initialization for AMDGPU (PR #134410)
Rahul Joshi via llvm-commits
llvm-commits at lists.llvm.org
Fri Apr 4 14:08:50 PDT 2025
https://github.com/jurahul updated https://github.com/llvm/llvm-project/pull/134410
>From 633717f09f5b9b34e58b9c3bb60363c0d432bc4b Mon Sep 17 00:00:00 2001
From: Rahul Joshi <rjoshi at nvidia.com>
Date: Fri, 4 Apr 2025 09:26:27 -0700
Subject: [PATCH] [NFC][LLVM][AMDGPU] Cleanup pass initialization for AMDGPU
- Remove calls to pass initialization from pass constructors.
---
llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp | 4 +---
llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp | 5 +----
llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp | 4 +---
llvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp | 7 ++-----
.../AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp | 5 +----
llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp | 6 +-----
.../lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp | 5 +----
llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp | 6 ++----
llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.cpp | 4 +---
llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp | 5 +----
llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp | 6 +-----
llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp | 6 +-----
llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp | 10 ++--------
llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp | 6 +-----
llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp | 4 +---
llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp | 4 +---
llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp | 4 +---
llvm/lib/Target/AMDGPU/AMDGPURewriteUndefForPHI.cpp | 4 +---
llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp | 4 +---
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 2 ++
.../Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp | 5 +----
llvm/lib/Target/AMDGPU/R600.h | 3 +++
llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp | 10 +---------
llvm/lib/Target/AMDGPU/R600MachineCFGStructurizer.cpp | 10 +---------
24 files changed, 30 insertions(+), 99 deletions(-)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
index 5a6868f96d970..7bcc128cb114f 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
@@ -38,9 +38,7 @@ ImmutablePass *llvm::createAMDGPUExternalAAWrapperPass() {
return new AMDGPUExternalAAWrapper();
}
-AMDGPUAAWrapperPass::AMDGPUAAWrapperPass() : ImmutablePass(ID) {
- initializeAMDGPUAAWrapperPassPass(*PassRegistry::getPassRegistry());
-}
+AMDGPUAAWrapperPass::AMDGPUAAWrapperPass() : ImmutablePass(ID) {}
void AMDGPUAAWrapperPass::getAnalysisUsage(AnalysisUsage &AU) const {
AU.setPreservesAll();
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
index 0cee3c3cb5e92..87fa845f3cff7 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp
@@ -17,15 +17,12 @@
#include "llvm/CodeGen/TargetPassConfig.h"
#include "llvm/IR/IntrinsicsAMDGPU.h"
#include "llvm/IR/IntrinsicsR600.h"
+#include "llvm/InitializePasses.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Transforms/IPO/Attributor.h"
#define DEBUG_TYPE "amdgpu-attributor"
-namespace llvm {
-void initializeCycleInfoWrapperPassPass(PassRegistry &);
-} // namespace llvm
-
using namespace llvm;
static cl::opt<unsigned> KernargPreloadCount(
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
index 9c482aeb3ea5c..df92847c1ba71 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp
@@ -336,9 +336,7 @@ class AMDGPUCodeGenPrepareImpl
class AMDGPUCodeGenPrepare : public FunctionPass {
public:
static char ID;
- AMDGPUCodeGenPrepare() : FunctionPass(ID) {
- initializeAMDGPUCodeGenPreparePass(*PassRegistry::getPassRegistry());
- }
+ AMDGPUCodeGenPrepare() : FunctionPass(ID) {}
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addRequired<AssumptionCacheTracker>();
AU.addRequired<UniformityInfoWrapperPass>();
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp
index 8236ff609f851..2b64146a32675 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUExportClustering.cpp
@@ -139,10 +139,7 @@ void ExportClustering::apply(ScheduleDAGInstrs *DAG) {
} // end namespace
-namespace llvm {
-
-std::unique_ptr<ScheduleDAGMutation> createAMDGPUExportClusteringDAGMutation() {
+std::unique_ptr<ScheduleDAGMutation>
+llvm::createAMDGPUExportClusteringDAGMutation() {
return std::make_unique<ExportClustering>();
}
-
-} // end namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
index a5660432603fd..f924335844da2 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
@@ -34,10 +34,7 @@ class AMDGPUGlobalISelDivergenceLowering : public MachineFunctionPass {
static char ID;
public:
- AMDGPUGlobalISelDivergenceLowering() : MachineFunctionPass(ID) {
- initializeAMDGPUGlobalISelDivergenceLoweringPass(
- *PassRegistry::getPassRegistry());
- }
+ AMDGPUGlobalISelDivergenceLowering() : MachineFunctionPass(ID) {}
bool runOnMachineFunction(MachineFunction &MF) override;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp b/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
index bbd262748d680..7b4d00c8214cb 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
@@ -2696,16 +2696,12 @@ bool IGroupLPDAGMutation::initIGLPOpt(SUnit &SU) {
} // namespace
-namespace llvm {
-
/// \p Phase specifes whether or not this is a reentry into the
/// IGroupLPDAGMutation. Since there may be multiple scheduling passes on the
/// same scheduling region (e.g. pre and post-RA scheduling / multiple
/// scheduling "phases"), we can reenter this mutation framework more than once
/// for a given region.
std::unique_ptr<ScheduleDAGMutation>
-createIGroupLPDAGMutation(AMDGPU::SchedulingPhase Phase) {
+llvm::createIGroupLPDAGMutation(AMDGPU::SchedulingPhase Phase) {
return std::make_unique<IGroupLPDAGMutation>(Phase);
}
-
-} // end namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp b/llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
index e6250ddf2c26b..766a4ea250942 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
@@ -2291,10 +2291,7 @@ class AMDGPULowerBufferFatPointers : public ModulePass {
public:
static char ID;
- AMDGPULowerBufferFatPointers() : ModulePass(ID) {
- initializeAMDGPULowerBufferFatPointersPass(
- *PassRegistry::getPassRegistry());
- }
+ AMDGPULowerBufferFatPointers() : ModulePass(ID) {}
bool run(Module &M, const TargetMachine &TM);
bool runOnModule(Module &M) override;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp b/llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
index 3c08d1edb4991..f9f2d43a5b041 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPULowerModuleLDSPass.cpp
@@ -1502,10 +1502,8 @@ class AMDGPULowerModuleLDSLegacy : public ModulePass {
const AMDGPUTargetMachine *TM;
static char ID;
- AMDGPULowerModuleLDSLegacy(const AMDGPUTargetMachine *TM_ = nullptr)
- : ModulePass(ID), TM(TM_) {
- initializeAMDGPULowerModuleLDSLegacyPass(*PassRegistry::getPassRegistry());
- }
+ AMDGPULowerModuleLDSLegacy(const AMDGPUTargetMachine *TM = nullptr)
+ : ModulePass(ID), TM(TM) {}
void getAnalysisUsage(AnalysisUsage &AU) const override {
if (!TM)
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.cpp
index 4d9f08b3af01d..eda479064d7b2 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUMachineModuleInfo.cpp
@@ -15,7 +15,7 @@
#include "AMDGPUMachineModuleInfo.h"
#include "llvm/IR/Module.h"
-namespace llvm {
+using namespace llvm;
AMDGPUMachineModuleInfo::AMDGPUMachineModuleInfo(const MachineModuleInfo &MMI)
: MachineModuleInfoELF(MMI) {
@@ -34,5 +34,3 @@ AMDGPUMachineModuleInfo::AMDGPUMachineModuleInfo(const MachineModuleInfo &MMI)
SingleThreadOneAddressSpaceSSID =
CTX.getOrInsertSyncScopeID("singlethread-one-as");
}
-
-} // end namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp b/llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp
index 937e9e812ec44..9b6bb56c85d24 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUMarkLastScratchLoad.cpp
@@ -42,10 +42,7 @@ class AMDGPUMarkLastScratchLoadLegacy : public MachineFunctionPass {
public:
static char ID;
- AMDGPUMarkLastScratchLoadLegacy() : MachineFunctionPass(ID) {
- initializeAMDGPUMarkLastScratchLoadLegacyPass(
- *PassRegistry::getPassRegistry());
- }
+ AMDGPUMarkLastScratchLoadLegacy() : MachineFunctionPass(ID) {}
bool runOnMachineFunction(MachineFunction &MF) override;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp b/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
index b2a8143b82ab6..a52a6aef2bc39 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
@@ -473,8 +473,6 @@ void AMDGPUPostLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
AMDGPUPostLegalizerCombiner::AMDGPUPostLegalizerCombiner(bool IsOptNone)
: MachineFunctionPass(ID), IsOptNone(IsOptNone) {
- initializeAMDGPUPostLegalizerCombinerPass(*PassRegistry::getPassRegistry());
-
if (!RuleConfig.parseCommandLineOption())
report_fatal_error("Invalid rule identifier");
}
@@ -519,8 +517,6 @@ INITIALIZE_PASS_END(AMDGPUPostLegalizerCombiner, DEBUG_TYPE,
"Combine AMDGPU machine instrs after legalization", false,
false)
-namespace llvm {
-FunctionPass *createAMDGPUPostLegalizeCombiner(bool IsOptNone) {
+FunctionPass *llvm::createAMDGPUPostLegalizeCombiner(bool IsOptNone) {
return new AMDGPUPostLegalizerCombiner(IsOptNone);
}
-} // end namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp b/llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
index 4ce3c0107d566..ca97591a87110 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
@@ -248,8 +248,6 @@ void AMDGPUPreLegalizerCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
AMDGPUPreLegalizerCombiner::AMDGPUPreLegalizerCombiner(bool IsOptNone)
: MachineFunctionPass(ID), IsOptNone(IsOptNone) {
- initializeAMDGPUPreLegalizerCombinerPass(*PassRegistry::getPassRegistry());
-
if (!RuleConfig.parseCommandLineOption())
report_fatal_error("Invalid rule identifier");
}
@@ -296,8 +294,6 @@ INITIALIZE_PASS_END(AMDGPUPreLegalizerCombiner, DEBUG_TYPE,
"Combine AMDGPU machine instrs before legalization", false,
false)
-namespace llvm {
-FunctionPass *createAMDGPUPreLegalizeCombiner(bool IsOptNone) {
+FunctionPass *llvm::createAMDGPUPreLegalizeCombiner(bool IsOptNone) {
return new AMDGPUPreLegalizerCombiner(IsOptNone);
}
-} // end namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp b/llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
index 459f85ae6169a..9847fbf108b0c 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUPrintfRuntimeBinding.cpp
@@ -42,7 +42,7 @@ class AMDGPUPrintfRuntimeBinding final : public ModulePass {
public:
static char ID;
- explicit AMDGPUPrintfRuntimeBinding();
+ explicit AMDGPUPrintfRuntimeBinding() : ModulePass(ID) {}
private:
bool runOnModule(Module &M) override;
@@ -76,15 +76,9 @@ INITIALIZE_PASS_END(AMDGPUPrintfRuntimeBinding, "amdgpu-printf-runtime-binding",
char &llvm::AMDGPUPrintfRuntimeBindingID = AMDGPUPrintfRuntimeBinding::ID;
-namespace llvm {
-ModulePass *createAMDGPUPrintfRuntimeBinding() {
+ModulePass *llvm::createAMDGPUPrintfRuntimeBinding() {
return new AMDGPUPrintfRuntimeBinding();
}
-} // namespace llvm
-
-AMDGPUPrintfRuntimeBinding::AMDGPUPrintfRuntimeBinding() : ModulePass(ID) {
- initializeAMDGPUPrintfRuntimeBindingPass(*PassRegistry::getPassRegistry());
-}
void AMDGPUPrintfRuntimeBindingImpl::getConversionSpecifiers(
SmallVectorImpl<char> &OpConvSpecifiers, StringRef Fmt,
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
index b416d9756297c..8f9ad38d101a1 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
@@ -427,8 +427,6 @@ void AMDGPURegBankCombiner::getAnalysisUsage(AnalysisUsage &AU) const {
AMDGPURegBankCombiner::AMDGPURegBankCombiner(bool IsOptNone)
: MachineFunctionPass(ID), IsOptNone(IsOptNone) {
- initializeAMDGPURegBankCombinerPass(*PassRegistry::getPassRegistry());
-
if (!RuleConfig.parseCommandLineOption())
report_fatal_error("Invalid rule identifier");
}
@@ -473,8 +471,6 @@ INITIALIZE_PASS_END(AMDGPURegBankCombiner, DEBUG_TYPE,
"Combine AMDGPU machine instrs after regbankselect", false,
false)
-namespace llvm {
-FunctionPass *createAMDGPURegBankCombiner(bool IsOptNone) {
+FunctionPass *llvm::createAMDGPURegBankCombiner(bool IsOptNone) {
return new AMDGPURegBankCombiner(IsOptNone);
}
-} // end namespace llvm
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
index d5a83903e2b13..ad6a0772fe8b6 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankLegalize.cpp
@@ -40,9 +40,7 @@ class AMDGPURegBankLegalize : public MachineFunctionPass {
static char ID;
public:
- AMDGPURegBankLegalize() : MachineFunctionPass(ID) {
- initializeAMDGPURegBankLegalizePass(*PassRegistry::getPassRegistry());
- }
+ AMDGPURegBankLegalize() : MachineFunctionPass(ID) {}
bool runOnMachineFunction(MachineFunction &MF) override;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
index 8a0c9faa34631..fe73aac0763e0 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURegBankSelect.cpp
@@ -35,9 +35,7 @@ class AMDGPURegBankSelect : public MachineFunctionPass {
public:
static char ID;
- AMDGPURegBankSelect() : MachineFunctionPass(ID) {
- initializeAMDGPURegBankSelectPass(*PassRegistry::getPassRegistry());
- }
+ AMDGPURegBankSelect() : MachineFunctionPass(ID) {}
bool runOnMachineFunction(MachineFunction &MF) override;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp b/llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
index f255bfc128d6b..3183f617a2628 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUReserveWWMRegs.cpp
@@ -32,9 +32,7 @@ class AMDGPUReserveWWMRegsLegacy : public MachineFunctionPass {
public:
static char ID;
- AMDGPUReserveWWMRegsLegacy() : MachineFunctionPass(ID) {
- initializeAMDGPUReserveWWMRegsLegacyPass(*PassRegistry::getPassRegistry());
- }
+ AMDGPUReserveWWMRegsLegacy() : MachineFunctionPass(ID) {}
bool runOnMachineFunction(MachineFunction &MF) override;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURewriteUndefForPHI.cpp b/llvm/lib/Target/AMDGPU/AMDGPURewriteUndefForPHI.cpp
index 79e9312034da4..1c135f09080e1 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPURewriteUndefForPHI.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPURewriteUndefForPHI.cpp
@@ -72,9 +72,7 @@ namespace {
class AMDGPURewriteUndefForPHILegacy : public FunctionPass {
public:
static char ID;
- AMDGPURewriteUndefForPHILegacy() : FunctionPass(ID) {
- initializeAMDGPURewriteUndefForPHILegacyPass(*PassRegistry::getPassRegistry());
- }
+ AMDGPURewriteUndefForPHILegacy() : FunctionPass(ID) {}
bool runOnFunction(Function &F) override;
StringRef getPassName() const override {
return "AMDGPU Rewrite Undef for PHI";
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp b/llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
index cc0d374c99254..0c60ba4db29ae 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
@@ -1285,9 +1285,7 @@ class AMDGPUSwLowerLDSLegacy : public ModulePass {
const AMDGPUTargetMachine *AMDGPUTM;
static char ID;
AMDGPUSwLowerLDSLegacy(const AMDGPUTargetMachine *TM)
- : ModulePass(ID), AMDGPUTM(TM) {
- initializeAMDGPUSwLowerLDSLegacyPass(*PassRegistry::getPassRegistry());
- }
+ : ModulePass(ID), AMDGPUTM(TM) {}
bool runOnModule(Module &M) override;
void getAnalysisUsage(AnalysisUsage &AU) const override {
AU.addPreserved<DominatorTreeWrapperPass>();
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
index 4b5c70f09155f..f9029d3e496f8 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
@@ -489,6 +489,8 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTarget() {
initializeR600PacketizerPass(*PR);
initializeR600ExpandSpecialInstrsPassPass(*PR);
initializeR600VectorRegMergerPass(*PR);
+ initializeR600EmitClauseMarkersPass(*PR);
+ initializeR600MachineCFGStructurizerPass(*PR);
initializeGlobalISel(*PR);
initializeAMDGPUDAGToDAGISelLegacyPass(*PR);
initializeGCNDPPCombineLegacyPass(*PR);
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp b/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
index d087fbc86545c..733c5d520fb23 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
@@ -74,10 +74,7 @@ class AMDGPUUnifyDivergentExitNodesImpl {
class AMDGPUUnifyDivergentExitNodes : public FunctionPass {
public:
static char ID;
- AMDGPUUnifyDivergentExitNodes() : FunctionPass(ID) {
- initializeAMDGPUUnifyDivergentExitNodesPass(
- *PassRegistry::getPassRegistry());
- }
+ AMDGPUUnifyDivergentExitNodes() : FunctionPass(ID) {}
void getAnalysisUsage(AnalysisUsage &AU) const override;
bool runOnFunction(Function &F) override;
};
diff --git a/llvm/lib/Target/AMDGPU/R600.h b/llvm/lib/Target/AMDGPU/R600.h
index 6c40c2813e204..9236675ce082a 100644
--- a/llvm/lib/Target/AMDGPU/R600.h
+++ b/llvm/lib/Target/AMDGPU/R600.h
@@ -45,6 +45,9 @@ extern char &R600VectorRegMergerID;
void initializeR600PacketizerPass(PassRegistry &);
extern char &R600PacketizerID;
+void initializeR600EmitClauseMarkersPass(PassRegistry &);
+void initializeR600MachineCFGStructurizerPass(PassRegistry &);
+
} // End namespace llvm
#endif
diff --git a/llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp b/llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp
index 0fa8d4847931a..b88d655d4e613 100644
--- a/llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp
+++ b/llvm/lib/Target/AMDGPU/R600EmitClauseMarkers.cpp
@@ -21,12 +21,6 @@
using namespace llvm;
-namespace llvm {
-
- void initializeR600EmitClauseMarkersPass(PassRegistry&);
-
-} // end namespace llvm
-
namespace {
class R600EmitClauseMarkers : public MachineFunctionPass {
@@ -289,9 +283,7 @@ class R600EmitClauseMarkers : public MachineFunctionPass {
public:
static char ID;
- R600EmitClauseMarkers() : MachineFunctionPass(ID) {
- initializeR600EmitClauseMarkersPass(*PassRegistry::getPassRegistry());
- }
+ R600EmitClauseMarkers() : MachineFunctionPass(ID) {}
bool runOnMachineFunction(MachineFunction &MF) override {
const R600Subtarget &ST = MF.getSubtarget<R600Subtarget>();
diff --git a/llvm/lib/Target/AMDGPU/R600MachineCFGStructurizer.cpp b/llvm/lib/Target/AMDGPU/R600MachineCFGStructurizer.cpp
index f8b40b0a1cdfc..b3dd68b6a1433 100644
--- a/llvm/lib/Target/AMDGPU/R600MachineCFGStructurizer.cpp
+++ b/llvm/lib/Target/AMDGPU/R600MachineCFGStructurizer.cpp
@@ -41,12 +41,6 @@ STATISTIC(numIfPatternMatch, "CFGStructurizer number of if pattern "
STATISTIC(numClonedBlock, "CFGStructurizer cloned blocks");
STATISTIC(numClonedInstr, "CFGStructurizer cloned instructions");
-namespace llvm {
-
-void initializeR600MachineCFGStructurizerPass(PassRegistry &);
-
-} // end namespace llvm
-
namespace {
//===----------------------------------------------------------------------===//
@@ -104,9 +98,7 @@ class R600MachineCFGStructurizer : public MachineFunctionPass {
static char ID;
- R600MachineCFGStructurizer() : MachineFunctionPass(ID) {
- initializeR600MachineCFGStructurizerPass(*PassRegistry::getPassRegistry());
- }
+ R600MachineCFGStructurizer() : MachineFunctionPass(ID) {}
StringRef getPassName() const override {
return "AMDGPU Control Flow Graph structurizer Pass";
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