[llvm] 19e0233 - [RISCV] Make decodeXqccmpRlistS0 defer to decodeZcmpRlist after checking for S0 being included. NFC

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2025-04-04T13:59:49-07:00
New Revision: 19e0233eb844e653a3108de411366bd0165cf3ec

URL: https://github.com/llvm/llvm-project/commit/19e0233eb844e653a3108de411366bd0165cf3ec
DIFF: https://github.com/llvm/llvm-project/commit/19e0233eb844e653a3108de411366bd0165cf3ec.diff

LOG: [RISCV] Make decodeXqccmpRlistS0 defer to decodeZcmpRlist after checking for S0 being included. NFC

This reduces code duplication.

Added: 
    

Modified: 
    llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
index b705d03b5d1fc..366291b53bebb 100644
--- a/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
+++ b/llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
@@ -658,11 +658,9 @@ static DecodeStatus decodeZcmpRlist(MCInst &Inst, uint32_t Imm,
 static DecodeStatus decodeXqccmpRlistS0(MCInst &Inst, uint32_t Imm,
                                         uint64_t Address,
                                         const MCDisassembler *Decoder) {
-  bool IsRVE = Decoder->getSubtargetInfo().hasFeature(RISCV::FeatureStdExtE);
-  if (Imm < RISCVZC::RA_S0 || (IsRVE && Imm >= RISCVZC::RA_S0_S2))
+  if (Imm < RISCVZC::RA_S0)
     return MCDisassembler::Fail;
-  Inst.addOperand(MCOperand::createImm(Imm));
-  return MCDisassembler::Success;
+  return decodeZcmpRlist(Inst, Imm, Address, Decoder);
 }
 
 // Add implied SP operand for C.*SP compressed instructions. The SP operand