[llvm] [NVPTX][Docs] [NFC] Update docs on intrinsics (PR #133136)

[Durgadoss R via llvm-commits]

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@@ -10,6 +10,70 @@
 //
 //===----------------------------------------------------------------------===//
 
+//===----------------------------------------------------------------------===//
+// Guidelines on NVPTX Intrinsic design
+//===----------------------------------------------------------------------===//
+// 
+// The NVPTX intrinsics are used to model instructions in the PTX ISA.
+// While simpler intrinsics can represent certain features effectively,
+// more complex instructions like TMA and MMA are not as straightforward
+// to model. A single variant of these complex instructions can expand
+// into hundreds of intrinsics. Additionally, any expansion in the
+// corresponding ISA can exponentially increase these numbers, making it
+// difficult to manage them in the IR and backend passes. Therefore,
+// a careful design of intrinsic interfaces can ease maintenance and
+// contribute to a sustainable, long-term solution.
+// 
+// Below are a set of guidelines that may help in choosing
+// an appropriate design for the complex intrinsics:
+// 
+// 1. If there are only a few intrinsics, prefer a flat design
+//    where the intrinsic name encodes all relevant details,
+//    and includes only the arguments used by the actual instruction.
+// 2. As the number of intrinsics grows, it is desirable to consolidate
+//    them. NVPTX uses a 'flags'-based design where each flag argument
+//    represents one set of instruction modifiers. These flags are
+//    compile-time integer constants.
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durga4github wrote:

Yes, I have added this as a separate point (no. 6) to align with the flow of the content.

https://github.com/llvm/llvm-project/pull/133136