[llvm] [MachineScheduler] Add more debug prints w.r.t hazards and pending SUnits (PR #134328)
via llvm-commits
llvm-commits at lists.llvm.org
Thu Apr 3 17:20:18 PDT 2025
llvmbot wrote:
<!--LLVM PR SUMMARY COMMENT-->
@llvm/pr-subscribers-backend-aarch64
Author: Min-Yih Hsu (mshockwave)
<details>
<summary>Changes</summary>
While we already have some detailed debug messages on the candidate selection process -- which selects a SUnit from the Available queue, we didn't say much about why a SUnit was not moved from Pending queue to Available queue in the first place, which is just as important as why we scheduled a node IMHO. Therefore, I added some debug prints for this very purpose.
I decide to print these extra messages by default (instead of being guarded by command line like `-misched-detail-resource-booking`) because we have been printing some of the hazard remarks, so I thought we might as well print these new messages -- which are mostly about hazard -- by default.
---
Patch is 41.58 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/134328.diff
3 Files Affected:
- (modified) llvm/lib/CodeGen/MachineScheduler.cpp (+32-10)
- (modified) llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir (+106-29)
- (modified) llvm/test/CodeGen/AArch64/misched-detail-resource-booking-02.mir (+63-57)
``````````diff
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp
index 5086ee8829b25..97f27277aface 100644
--- a/llvm/lib/CodeGen/MachineScheduler.cpp
+++ b/llvm/lib/CodeGen/MachineScheduler.cpp
@@ -2617,21 +2617,25 @@ SchedBoundary::getNextResourceCycle(const MCSchedClassDesc *SC, unsigned PIdx,
bool SchedBoundary::checkHazard(SUnit *SU) {
if (HazardRec->isEnabled()
&& HazardRec->getHazardType(SU) != ScheduleHazardRecognizer::NoHazard) {
+ LLVM_DEBUG(dbgs().indent(2)
+ << "hazard: SU(" << SU->NodeNum << ") reported by HazardRec\n");
return true;
}
unsigned uops = SchedModel->getNumMicroOps(SU->getInstr());
if ((CurrMOps > 0) && (CurrMOps + uops > SchedModel->getIssueWidth())) {
- LLVM_DEBUG(dbgs() << " SU(" << SU->NodeNum << ") uops="
- << SchedModel->getNumMicroOps(SU->getInstr()) << '\n');
+ LLVM_DEBUG(dbgs().indent(2) << "hazard: SU(" << SU->NodeNum << ") uops="
+ << uops << ", CurrMOps = " << CurrMOps << ", "
+ << "CurrMOps + uops > issue width of "
+ << SchedModel->getIssueWidth() << "\n");
return true;
}
if (CurrMOps > 0 &&
((isTop() && SchedModel->mustBeginGroup(SU->getInstr())) ||
(!isTop() && SchedModel->mustEndGroup(SU->getInstr())))) {
- LLVM_DEBUG(dbgs() << " hazard: SU(" << SU->NodeNum << ") must "
- << (isTop() ? "begin" : "end") << " group\n");
+ LLVM_DEBUG(dbgs().indent(2) << "hazard: SU(" << SU->NodeNum << ") must "
+ << (isTop() ? "begin" : "end") << " group\n");
return true;
}
@@ -2650,10 +2654,12 @@ bool SchedBoundary::checkHazard(SUnit *SU) {
#if LLVM_ENABLE_ABI_BREAKING_CHECKS
MaxObservedStall = std::max(ReleaseAtCycle, MaxObservedStall);
#endif
- LLVM_DEBUG(dbgs() << " SU(" << SU->NodeNum << ") "
- << SchedModel->getResourceName(ResIdx)
- << '[' << InstanceIdx - ReservedCyclesIndex[ResIdx] << ']'
- << "=" << NRCycle << "c\n");
+ LLVM_DEBUG(dbgs().indent(2)
+ << "hazard: SU(" << SU->NodeNum << ") "
+ << SchedModel->getResourceName(ResIdx) << '['
+ << InstanceIdx - ReservedCyclesIndex[ResIdx] << ']' << "="
+ << NRCycle << "c, is later than "
+ << "CurrCycle = " << CurrCycle << "c\n");
return true;
}
}
@@ -2728,11 +2734,25 @@ void SchedBoundary::releaseNode(SUnit *SU, unsigned ReadyCycle, bool InPQueue,
// Check for interlocks first. For the purpose of other heuristics, an
// instruction that cannot issue appears as if it's not in the ReadyQueue.
bool IsBuffered = SchedModel->getMicroOpBufferSize() != 0;
- bool HazardDetected = (!IsBuffered && ReadyCycle > CurrCycle) ||
- checkHazard(SU) || (Available.size() >= ReadyListLimit);
+ bool HazardDetected = !IsBuffered && ReadyCycle > CurrCycle;
+ if (HazardDetected)
+ LLVM_DEBUG(dbgs().indent(2) << "hazard: SU(" << SU->NodeNum
+ << ") ReadyCycle = " << ReadyCycle
+ << " is later than CurrCycle = " << CurrCycle
+ << " on an unbuffered resource" << "\n");
+ else
+ HazardDetected = checkHazard(SU);
+
+ if (!HazardDetected && Available.size() >= ReadyListLimit) {
+ HazardDetected = true;
+ LLVM_DEBUG(dbgs().indent(2) << "hazard: Available Q is full (size: "
+ << Available.size() << ")\n");
+ }
if (!HazardDetected) {
Available.push(SU);
+ LLVM_DEBUG(dbgs().indent(2)
+ << "Move SU(" << SU->NodeNum << ") into Available Q\n");
if (InPQueue)
Pending.remove(Pending.begin() + Idx);
@@ -3011,6 +3031,8 @@ void SchedBoundary::releasePending() {
SUnit *SU = *(Pending.begin() + I);
unsigned ReadyCycle = isTop() ? SU->TopReadyCycle : SU->BotReadyCycle;
+ LLVM_DEBUG(dbgs() << "Checking pending node SU(" << SU->NodeNum << ")\n");
+
if (ReadyCycle < MinReadyCycle)
MinReadyCycle = ReadyCycle;
diff --git a/llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir b/llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
index 6fc36a9b5df2e..cbf0455c3a9aa 100644
--- a/llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
+++ b/llvm/test/CodeGen/AArch64/misched-detail-resource-booking-01.mir
@@ -297,6 +297,7 @@ body: |
# CHECK-NEXT: Instance 0 available @0c
# CHECK-NEXT: Instance 1 available @0c
# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: Move SU(0) into Available Q
# CHECK-NEXT: Resource booking (@0c):
# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
@@ -314,6 +315,7 @@ body: |
# CHECK-NEXT: Instance 0 available @0c
# CHECK-NEXT: Instance 1 available @0c
# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: Move SU(1) into Available Q
# CHECK-NEXT: Resource booking (@0c):
# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
@@ -331,6 +333,7 @@ body: |
# CHECK-NEXT: Instance 0 available @0c
# CHECK-NEXT: Instance 1 available @0c
# CHECK-NEXT: selecting CortexA55UnitALU[0] available @0c
+# CHECK-NEXT: Move SU(2) into Available Q
# CHECK-NEXT: Resource booking (@0c):
# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
@@ -348,9 +351,13 @@ body: |
# CHECK-NEXT: Instance 0 available @0c
# CHECK-NEXT: Instance 1 available @0c
# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @0c
+# CHECK-NEXT: Move SU(4) into Available Q
+# CHECK-NEXT: hazard: SU(12) ReadyCycle = 3 is later than CurrCycle = 0 on an unbuffered resource
+# CHECK-NEXT: hazard: SU(11) ReadyCycle = 3 is later than CurrCycle = 0 on an unbuffered resource
# CHECK-NEXT: Critical Path(GS-RR ): 14
# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
# CHECK-NEXT: Cycle: 3 BotQ.A
+# CHECK-NEXT: Checking pending node SU(12)
# CHECK-NEXT: Resource booking (@3c):
# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
@@ -368,6 +375,8 @@ body: |
# CHECK-NEXT: Instance 0 available @3c
# CHECK-NEXT: Instance 1 available @3c
# CHECK-NEXT: selecting CortexA55UnitALU[0] available @3c
+# CHECK-NEXT: Move SU(12) into Available Q
+# CHECK-NEXT: Checking pending node SU(11)
# CHECK-NEXT: Resource booking (@3c):
# CHECK-NEXT: CortexA55UnitALU(0) = 4294967295
# CHECK-NEXT: CortexA55UnitALU(1) = 4294967295
@@ -385,6 +394,7 @@ body: |
# CHECK-NEXT: Instance 0 available @3c
# CHECK-NEXT: Instance 1 available @3c
# CHECK-NEXT: selecting CortexA55UnitALU[0] available @3c
+# CHECK-NEXT: Move SU(11) into Available Q
# CHECK-NEXT: Queue BotQ.P:
# CHECK-NEXT: Queue BotQ.A: 12 11
# CHECK-NEXT: Cand SU(12) FIRST
@@ -446,6 +456,7 @@ body: |
# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: hazard: SU(10) ReadyCycle = 7 is later than CurrCycle = 3 on an unbuffered resource
# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
# CHECK-NEXT: Resource booking (@3c):
# CHECK-NEXT: CortexA55UnitALU(0) = 3
@@ -523,8 +534,14 @@ body: |
# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: hazard: SU(8) ReadyCycle = 7 is later than CurrCycle = 4 on an unbuffered resource
# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Checking pending node SU(10)
+# CHECK-NEXT: hazard: SU(10) ReadyCycle = 7 is later than CurrCycle = 4 on an unbuffered resource
+# CHECK-NEXT: Checking pending node SU(8)
+# CHECK-NEXT: hazard: SU(8) ReadyCycle = 7 is later than CurrCycle = 4 on an unbuffered resource
# CHECK-NEXT: Cycle: 7 BotQ.A
+# CHECK-NEXT: Checking pending node SU(10)
# CHECK-NEXT: Resource booking (@7c):
# CHECK-NEXT: CortexA55UnitALU(0) = 3
# CHECK-NEXT: CortexA55UnitALU(1) = 3
@@ -542,6 +559,8 @@ body: |
# CHECK-NEXT: Instance 0 available @7c
# CHECK-NEXT: Instance 1 available @7c
# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @7c
+# CHECK-NEXT: Move SU(10) into Available Q
+# CHECK-NEXT: Checking pending node SU(8)
# CHECK-NEXT: Resource booking (@7c):
# CHECK-NEXT: CortexA55UnitALU(0) = 3
# CHECK-NEXT: CortexA55UnitALU(1) = 3
@@ -559,6 +578,7 @@ body: |
# CHECK-NEXT: Instance 0 available @7c
# CHECK-NEXT: Instance 1 available @7c
# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @7c
+# CHECK-NEXT: Move SU(8) into Available Q
# CHECK-NEXT: Queue BotQ.P:
# CHECK-NEXT: Queue BotQ.A: 10 8
# CHECK-NEXT: Cand SU(10) FIRST
@@ -621,7 +641,13 @@ body: |
# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: hazard: SU(9) ReadyCycle = 9 is later than CurrCycle = 8 on an unbuffered resource
+# CHECK-NEXT: hazard: SU(3) ReadyCycle = 11 is later than CurrCycle = 8 on an unbuffered resource
# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Checking pending node SU(9)
+# CHECK-NEXT: hazard: SU(9) ReadyCycle = 9 is later than CurrCycle = 8 on an unbuffered resource
+# CHECK-NEXT: Checking pending node SU(3)
+# CHECK-NEXT: hazard: SU(3) ReadyCycle = 11 is later than CurrCycle = 8 on an unbuffered resource
# CHECK-NEXT: Resource booking (@8c):
# CHECK-NEXT: CortexA55UnitALU(0) = 3
# CHECK-NEXT: CortexA55UnitALU(1) = 3
@@ -699,7 +725,9 @@ body: |
# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: hazard: SU(7) ReadyCycle = 10 is later than CurrCycle = 9 on an unbuffered resource
# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Checking pending node SU(9)
# CHECK-NEXT: Resource booking (@9c):
# CHECK-NEXT: CortexA55UnitALU(0) = 3
# CHECK-NEXT: CortexA55UnitALU(1) = 3
@@ -717,6 +745,11 @@ body: |
# CHECK-NEXT: Instance 0 available @9c
# CHECK-NEXT: Instance 1 available @9c
# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @9c
+# CHECK-NEXT: Move SU(9) into Available Q
+# CHECK-NEXT: Checking pending node SU(7)
+# CHECK-NEXT: hazard: SU(7) ReadyCycle = 10 is later than CurrCycle = 9 on an unbuffered resource
+# CHECK-NEXT: Checking pending node SU(3)
+# CHECK-NEXT: hazard: SU(3) ReadyCycle = 11 is later than CurrCycle = 9 on an unbuffered resource
# CHECK-NEXT: Resource booking (@9c):
# CHECK-NEXT: CortexA55UnitALU(0) = 3
# CHECK-NEXT: CortexA55UnitALU(1) = 3
@@ -792,8 +825,10 @@ body: |
# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: hazard: SU(5) ReadyCycle = 10 is later than CurrCycle = 9 on an unbuffered resource
# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
# CHECK-NEXT: Cycle: 10 BotQ.A
+# CHECK-NEXT: Checking pending node SU(7)
# CHECK-NEXT: Resource booking (@10c):
# CHECK-NEXT: CortexA55UnitALU(0) = 3
# CHECK-NEXT: CortexA55UnitALU(1) = 3
@@ -811,6 +846,8 @@ body: |
# CHECK-NEXT: Instance 0 available @10c
# CHECK-NEXT: Instance 1 available @10c
# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @10c
+# CHECK-NEXT: Move SU(7) into Available Q
+# CHECK-NEXT: Checking pending node SU(5)
# CHECK-NEXT: Resource booking (@10c):
# CHECK-NEXT: CortexA55UnitALU(0) = 3
# CHECK-NEXT: CortexA55UnitALU(1) = 3
@@ -828,6 +865,9 @@ body: |
# CHECK-NEXT: Instance 0 available @11c
# CHECK-NEXT: Instance 1 available @10c
# CHECK-NEXT: selecting CortexA55UnitFPALU[1] available @10c
+# CHECK-NEXT: Move SU(5) into Available Q
+# CHECK-NEXT: Checking pending node SU(3)
+# CHECK-NEXT: hazard: SU(3) ReadyCycle = 11 is later than CurrCycle = 10 on an unbuffered resource
# CHECK-NEXT: Queue BotQ.P: 3
# CHECK-NEXT: Queue BotQ.A: 7 5
# CHECK-NEXT: Cand SU(7) FIRST
@@ -887,6 +927,7 @@ body: |
# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: hazard: SU(6) ReadyCycle = 11 is later than CurrCycle = 10 on an unbuffered resource
# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
# CHECK-NEXT: Resource booking (@10c):
# CHECK-NEXT: CortexA55UnitALU(0) = 3
@@ -966,7 +1007,9 @@ body: |
# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: hazard: SU(0) ReadyCycle = 13 is later than CurrCycle = 11 on an unbuffered resource
# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Checking pending node SU(3)
# CHECK-NEXT: Resource booking (@11c):
# CHECK-NEXT: CortexA55UnitALU(0) = 3
# CHECK-NEXT: CortexA55UnitALU(1) = 3
@@ -984,7 +1027,8 @@ body: |
# CHECK-NEXT: Instance 0 available @12c
# CHECK-NEXT: Instance 1 available @12c
# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @12c
-# CHECK-NEXT: SU(3) CortexA55UnitFPALU[0]=12c
+# CHECK-NEXT: hazard: SU(3) CortexA55UnitFPALU[0]=12c, is later than CurrCycle = 11c
+# CHECK-NEXT: Checking pending node SU(6)
# CHECK-NEXT: Resource booking (@11c):
# CHECK-NEXT: CortexA55UnitALU(0) = 3
# CHECK-NEXT: CortexA55UnitALU(1) = 3
@@ -1002,8 +1046,11 @@ body: |
# CHECK-NEXT: Instance 0 available @12c
# CHECK-NEXT: Instance 1 available @12c
# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @12c
-# CHECK-NEXT: SU(6) CortexA55UnitFPALU[0]=12c
+# CHECK-NEXT: hazard: SU(6) CortexA55UnitFPALU[0]=12c, is later than CurrCycle = 11c
+# CHECK-NEXT: Checking pending node SU(0)
+# CHECK-NEXT: hazard: SU(0) ReadyCycle = 13 is later than CurrCycle = 11 on an unbuffered resource
# CHECK-NEXT: Cycle: 12 BotQ.A
+# CHECK-NEXT: Checking pending node SU(3)
# CHECK-NEXT: Resource booking (@12c):
# CHECK-NEXT: CortexA55UnitALU(0) = 3
# CHECK-NEXT: CortexA55UnitALU(1) = 3
@@ -1021,6 +1068,10 @@ body: |
# CHECK-NEXT: Instance 0 available @12c
# CHECK-NEXT: Instance 1 available @12c
# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @12c
+# CHECK-NEXT: Move SU(3) into Available Q
+# CHECK-NEXT: Checking pending node SU(0)
+# CHECK-NEXT: hazard: SU(0) ReadyCycle = 13 is later than CurrCycle = 12 on an unbuffered resource
+# CHECK-NEXT: Checking pending node SU(6)
# CHECK-NEXT: Resource booking (@12c):
# CHECK-NEXT: CortexA55UnitALU(0) = 3
# CHECK-NEXT: CortexA55UnitALU(1) = 3
@@ -1038,6 +1089,7 @@ body: |
# CHECK-NEXT: Instance 0 available @12c
# CHECK-NEXT: Instance 1 available @12c
# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @12c
+# CHECK-NEXT: Move SU(6) into Available Q
# CHECK-NEXT: Queue BotQ.P: 0
# CHECK-NEXT: Queue BotQ.A: 3 6
# CHECK-NEXT: Cand SU(3) FIRST
@@ -1101,7 +1153,10 @@ body: |
# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: hazard: SU(4) ReadyCycle = 16 is later than CurrCycle = 13 on an unbuffered resource
+# CHECK-NEXT: hazard: SU(1) ReadyCycle = 15 is later than CurrCycle = 13 on an unbuffered resource
# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Checking pending node SU(0)
# CHECK-NEXT: Resource booking (@13c):
# CHECK-NEXT: CortexA55UnitALU(0) = 3
# CHECK-NEXT: CortexA55UnitALU(1) = 3
@@ -1119,6 +1174,11 @@ body: |
# CHECK-NEXT: Instance 0 available @13c
# CHECK-NEXT: Instance 1 available @13c
# CHECK-NEXT: selecting CortexA55UnitALU[0] available @13c
+# CHECK-NEXT: Move SU(0) into Available Q
+# CHECK-NEXT: Checking pending node SU(1)
+# CHECK-NEXT: hazard: SU(1) ReadyCycle = 15 is later than CurrCycle = 13 on an unbuffered resource
+# CHECK-NEXT: Checking pending node SU(4)
+# CHECK-NEXT: hazard: SU(4) ReadyCycle = 16 is later than CurrCycle = 13 on an unbuffered resource
# CHECK-NEXT: Resource booking (@13c):
# CHECK-NEXT: CortexA55UnitALU(0) = 3
# CHECK-NEXT: CortexA55UnitALU(1) = 3
@@ -1215,7 +1275,14 @@ body: |
# CHECK-NEXT: CortexA55UnitLd(0) = 4294967295
# CHECK-NEXT: CortexA55UnitMAC(0) = 4294967295
# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
+# CHECK-NEXT: hazard: SU(2) ReadyCycle = 16 is later than CurrCycle = 14 on an unbuffered resource
# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
+# CHECK-NEXT: Checking pending node SU(1)
+# CHECK-NEXT: hazard: SU(1) ReadyCycle = 15 is later than CurrCycle = 14 on an unbuffered resource
+# CHECK-NEXT: Checking pending node SU(4)
+# CHECK-NEXT: hazard: SU(4) ReadyCycle = 16 is later than CurrCycle = 14 on an unbuffered resource
+# CHECK-NEXT: Checking pending node SU(2)
+# CHECK-NEXT: hazard: SU(2) ReadyCycle = 16 is later than CurrCycle = 14 on an unbuffered resource
# CHECK-NEXT: Resource booking (@14c):
# CHECK-NEXT: CortexA55UnitALU(0) = 3
# CHECK-NEXT: CortexA55UnitALU(1) = 3
@@ -1293,6 +1360,7 @@ body: |
# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
# CHECK-NEXT: Cycle: 15 BotQ.A
+# CHECK-NEXT: Checking pending node SU(1)
# CHECK-NEXT: Resource booking (@15c):
# CHECK-NEXT: CortexA55UnitALU(0) = 14
# CHECK-NEXT: CortexA55UnitALU(1) = 3
@@ -1310,6 +1378,11 @@ body: |
# CHECK-NEXT: Instance 0 available @15c
# CHECK-NEXT: Instance 1 available @15c
# CHECK-NEXT: selecting CortexA55UnitALU[0] available @15c
+# CHECK-NEXT: Move SU(1) into Available Q
+# CHECK-NEXT: Checking pending node SU(2)
+# CHECK-NEXT: hazard: SU(2) ReadyCycle = 16 is later than CurrCycle = 15 on an unbuffered resource
+# CHECK-NEXT: Checking pending node SU(4)
+# CHECK-NEXT: hazard: SU(4) ReadyCycle = 16 is later than CurrCycle = 15 on an unbuffered resource
# CHECK-NEXT: Queue BotQ.P: 2 4
# CHECK-NEXT: Queue BotQ.A: 1
# CHECK-NEXT: Scheduling SU(1) %1:fpr128 = COPY $q1
@@ -1369,6 +1442,7 @@ body: |
# CHECK-NEXT: CortexA55UnitSt(0) = 4294967295
# CHECK-NEXT: ** ScheduleDAGMILive::schedule picking next node
# CHECK-NEXT: Cycle: 16 BotQ.A
+# CHECK-NEXT: Checking pending node SU(2)
# CHECK-NEXT: Resource booking (@16c):
# CHECK-NEXT: CortexA55UnitALU(0) = 15
# CHECK-NEXT: CortexA55UnitALU(1) = 3
@@ -1386,6 +1460,8 @@ body: |
# CHECK-NEXT: Instance 0 available @16c
# CHECK-NEXT: Instance 1 available @16c
# CHECK-NEXT: selecting CortexA55UnitALU[0] available @16c
+# CHECK-NEXT: Move SU(2) into Available Q
+# CHECK-NEXT: Checking pending node SU(4)
# CHECK-NEXT: Resource booking (@16c):
# CHECK-NEXT: CortexA55UnitALU(0) = 15
# CHECK-NEXT: CortexA55UnitALU(1) = 3
@@ -1403,6 +1479,7 @@ body: |
# CHECK-NEXT: Instance 0 available @16c
# CHECK-NEXT: Instance 1 available @16c
# CHECK-NEXT: selecting CortexA55UnitFPALU[0] available @16c
+# CHECK-NEXT: Move SU(4) into Available Q
# CHECK-NEXT: Queue BotQ.P:
# CHECK-NEXT: Queue BotQ.A: 2 4
# CHECK-NEXT: Cand SU(2) FIRST
@@ -1546,33 +1623,33 @@ body: |
# CHECK-NEXT: * Schedule table (BottomUp):
# CHECK-NEXT: i: issue
# CHECK-NEXT: x: resource booked
-# CHECK-NEXT: Cycle | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 |
-# CHECK-NEXT: SU(2) | i | | | | | | | | | | | | | | |
-# CHECK-NEXT: CortexA55UnitALU | x | | | | | | | | | | | | | | |
-# CHECK-NEXT: SU(4) | | i | | | | | | | |...
[truncated]
``````````
</details>
https://github.com/llvm/llvm-project/pull/134328
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